Intel ACPI Component Architecture ACPI Binary Table Extraction Utility version 20200326 Copyright (c) 2000 - 2020 Intel Corporation Signature Length Version Oem Oem Oem Compiler Compiler Id TableId RevisionId Name Revision _________ __________ ____ ________ __________ __________ _______ __________ 01) MCFG 0x0000003C 0x01 "ALASKA" "A M I " 0x01072009 "MSFT" 0x00000097 02) ASF! 0x000000A0 0x20 "INTEL " " HCG " 0x00000001 "TFSM" 0x000F4240 03) APIC 0x00000100 0x03 "ALASKA" "A M I " 0x01072009 "AMI " 0x00010013 04) SSDT 0x000151C1 0x02 "ALASKA" "PmMgt " 0x00000001 "INTL" 0x20120913 05) SLIT 0x0000002D 0x01 "ALASKA" "A M I " 0x00000001 "INTL" 0x20091013 06) MSCT 0x00000090 0x01 "ALASKA" "A M I " 0x00000001 "INTL" 0x20091013 07) UEFI 0x00000042 0x01 "ALASKA" "A M I " 0x01072009 " " 0x00000000 08) DSDT 0x00036360 0x02 "ALASKA" "A M I " 0x01072009 "INTL" 0x20091013 09) SRAT 0x00001158 0x03 "ALASKA" "A M I " 0x00000001 "INTL" 0x20091013 10) WDDT 0x00000040 0x01 "ALASKA" "A M I " 0x00000000 "INTL" 0x20091013 11) FACP 0x0000010C 0x05 "ALASKA" "A M I " 0x01072009 "AMI " 0x00010013 12) FPDT 0x00000044 0x01 "ALASKA" "A M I " 0x01072009 "AMI " 0x00010013 13) SSDT 0x0000036D 0x01 "SataRe" "SataTabl" 0x00001000 "INTL" 0x20120913 14) HPET 0x00000038 0x01 "ALASKA" "A M I " 0x00000001 "INTL" 0x20091013 15) FIDT 0x0000009C 0x01 "ALASKA" "A M I " 0x01072009 "AMI " 0x00010013 16) FACS 0x00000040 0x02 17) BGRT 0x00000038 0x01 "ALASKA" "A M I " 0x01072009 "AMI " 0x00010013 Found 17 ACPI tables in /root/HW_PROBE/LATEST/pIAw6WDnuA/hw.info/logs/acpidump APIC ---- [000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] [004h 0004 4] Table Length : 00000100 [008h 0008 1] Revision : 03 [009h 0009 1] Checksum : F4 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "AMI " [020h 0032 4] Asl Compiler Revision : 00010013 [024h 0036 4] Local Apic Address : FEE00000 [028h 0040 4] Flags (decoded below) : 00000001 PC-AT Compatibility : 1 [02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] [02Dh 0045 1] Length : 08 [02Eh 0046 1] Processor ID : 00 [02Fh 0047 1] Local Apic ID : 00 [030h 0048 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [034h 0052 1] Subtable Type : 00 [Processor Local APIC] [035h 0053 1] Length : 08 [036h 0054 1] Processor ID : 02 [037h 0055 1] Local Apic ID : 02 [038h 0056 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] [03Dh 0061 1] Length : 08 [03Eh 0062 1] Processor ID : 04 [03Fh 0063 1] Local Apic ID : 04 [040h 0064 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [044h 0068 1] Subtable Type : 00 [Processor Local APIC] [045h 0069 1] Length : 08 [046h 0070 1] Processor ID : 06 [047h 0071 1] Local Apic ID : 06 [048h 0072 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [04Ch 0076 1] Subtable Type : 00 [Processor Local APIC] [04Dh 0077 1] Length : 08 [04Eh 0078 1] Processor ID : 08 [04Fh 0079 1] Local Apic ID : 08 [050h 0080 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [054h 0084 1] Subtable Type : 00 [Processor Local APIC] [055h 0085 1] Length : 08 [056h 0086 1] Processor ID : 0A [057h 0087 1] Local Apic ID : 0A [058h 0088 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [05Ch 0092 1] Subtable Type : 00 [Processor Local APIC] [05Dh 0093 1] Length : 08 [05Eh 0094 1] Processor ID : 01 [05Fh 0095 1] Local Apic ID : 01 [060h 0096 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [064h 0100 1] Subtable Type : 00 [Processor Local APIC] [065h 0101 1] Length : 08 [066h 0102 1] Processor ID : 03 [067h 0103 1] Local Apic ID : 03 [068h 0104 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [06Ch 0108 1] Subtable Type : 00 [Processor Local APIC] [06Dh 0109 1] Length : 08 [06Eh 0110 1] Processor ID : 05 [06Fh 0111 1] Local Apic ID : 05 [070h 0112 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [074h 0116 1] Subtable Type : 00 [Processor Local APIC] [075h 0117 1] Length : 08 [076h 0118 1] Processor ID : 07 [077h 0119 1] Local Apic ID : 07 [078h 0120 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [07Ch 0124 1] Subtable Type : 00 [Processor Local APIC] [07Dh 0125 1] Length : 08 [07Eh 0126 1] Processor ID : 09 [07Fh 0127 1] Local Apic ID : 09 [080h 0128 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [084h 0132 1] Subtable Type : 00 [Processor Local APIC] [085h 0133 1] Length : 08 [086h 0134 1] Processor ID : 0B [087h 0135 1] Local Apic ID : 0B [088h 0136 4] Flags (decoded below) : 00000001 Processor Enabled : 1 Runtime Online Capable : 0 [08Ch 0140 1] Subtable Type : 04 [Local APIC NMI] [08Dh 0141 1] Length : 06 [08Eh 0142 1] Processor ID : 00 [08Fh 0143 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [091h 0145 1] Interrupt Input LINT : 01 [092h 0146 1] Subtable Type : 04 [Local APIC NMI] [093h 0147 1] Length : 06 [094h 0148 1] Processor ID : 02 [095h 0149 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [097h 0151 1] Interrupt Input LINT : 01 [098h 0152 1] Subtable Type : 04 [Local APIC NMI] [099h 0153 1] Length : 06 [09Ah 0154 1] Processor ID : 04 [09Bh 0155 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [09Dh 0157 1] Interrupt Input LINT : 01 [09Eh 0158 1] Subtable Type : 04 [Local APIC NMI] [09Fh 0159 1] Length : 06 [0A0h 0160 1] Processor ID : 06 [0A1h 0161 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0A3h 0163 1] Interrupt Input LINT : 01 [0A4h 0164 1] Subtable Type : 04 [Local APIC NMI] [0A5h 0165 1] Length : 06 [0A6h 0166 1] Processor ID : 08 [0A7h 0167 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0A9h 0169 1] Interrupt Input LINT : 01 [0AAh 0170 1] Subtable Type : 04 [Local APIC NMI] [0ABh 0171 1] Length : 06 [0ACh 0172 1] Processor ID : 0A [0ADh 0173 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0AFh 0175 1] Interrupt Input LINT : 01 [0B0h 0176 1] Subtable Type : 04 [Local APIC NMI] [0B1h 0177 1] Length : 06 [0B2h 0178 1] Processor ID : 01 [0B3h 0179 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0B5h 0181 1] Interrupt Input LINT : 01 [0B6h 0182 1] Subtable Type : 04 [Local APIC NMI] [0B7h 0183 1] Length : 06 [0B8h 0184 1] Processor ID : 03 [0B9h 0185 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0BBh 0187 1] Interrupt Input LINT : 01 [0BCh 0188 1] Subtable Type : 04 [Local APIC NMI] [0BDh 0189 1] Length : 06 [0BEh 0190 1] Processor ID : 05 [0BFh 0191 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0C1h 0193 1] Interrupt Input LINT : 01 [0C2h 0194 1] Subtable Type : 04 [Local APIC NMI] [0C3h 0195 1] Length : 06 [0C4h 0196 1] Processor ID : 07 [0C5h 0197 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0C7h 0199 1] Interrupt Input LINT : 01 [0C8h 0200 1] Subtable Type : 04 [Local APIC NMI] [0C9h 0201 1] Length : 06 [0CAh 0202 1] Processor ID : 09 [0CBh 0203 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0CDh 0205 1] Interrupt Input LINT : 01 [0CEh 0206 1] Subtable Type : 04 [Local APIC NMI] [0CFh 0207 1] Length : 06 [0D0h 0208 1] Processor ID : 0B [0D1h 0209 2] Flags (decoded below) : 0005 Polarity : 1 Trigger Mode : 1 [0D3h 0211 1] Interrupt Input LINT : 01 [0D4h 0212 1] Subtable Type : 01 [I/O APIC] [0D5h 0213 1] Length : 0C [0D6h 0214 1] I/O Apic ID : 01 [0D7h 0215 1] Reserved : 00 [0D8h 0216 4] Address : FEC00000 [0DCh 0220 4] Interrupt : 00000000 [0E0h 0224 1] Subtable Type : 01 [I/O APIC] [0E1h 0225 1] Length : 0C [0E2h 0226 1] I/O Apic ID : 02 [0E3h 0227 1] Reserved : 00 [0E4h 0228 4] Address : FEC01000 [0E8h 0232 4] Interrupt : 00000018 [0ECh 0236 1] Subtable Type : 02 [Interrupt Source Override] [0EDh 0237 1] Length : 0A [0EEh 0238 1] Bus : 00 [0EFh 0239 1] Source : 00 [0F0h 0240 4] Interrupt : 00000002 [0F4h 0244 2] Flags (decoded below) : 0000 Polarity : 0 Trigger Mode : 0 [0F6h 0246 1] Subtable Type : 02 [Interrupt Source Override] [0F7h 0247 1] Length : 0A [0F8h 0248 1] Bus : 00 [0F9h 0249 1] Source : 09 [0FAh 0250 4] Interrupt : 00000009 [0FEh 0254 2] Flags (decoded below) : 000D Polarity : 1 Trigger Mode : 3 Raw Table Data: Length 256 (0x100) 0000: 41 50 49 43 00 01 00 00 03 F4 41 4C 41 53 4B 41 // APIC......ALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 // A M I ... ..AMI 0020: 13 00 01 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ 0030: 01 00 00 00 00 08 02 02 01 00 00 00 00 08 04 04 // ................ 0040: 01 00 00 00 00 08 06 06 01 00 00 00 00 08 08 08 // ................ 0050: 01 00 00 00 00 08 0A 0A 01 00 00 00 00 08 01 01 // ................ 0060: 01 00 00 00 00 08 03 03 01 00 00 00 00 08 05 05 // ................ 0070: 01 00 00 00 00 08 07 07 01 00 00 00 00 08 09 09 // ................ 0080: 01 00 00 00 00 08 0B 0B 01 00 00 00 04 06 00 05 // ................ 0090: 00 01 04 06 02 05 00 01 04 06 04 05 00 01 04 06 // ................ 00A0: 06 05 00 01 04 06 08 05 00 01 04 06 0A 05 00 01 // ................ 00B0: 04 06 01 05 00 01 04 06 03 05 00 01 04 06 05 05 // ................ 00C0: 00 01 04 06 07 05 00 01 04 06 09 05 00 01 04 06 // ................ 00D0: 0B 05 00 01 01 0C 01 00 00 00 C0 FE 00 00 00 00 // ................ 00E0: 01 0C 02 00 00 10 C0 FE 18 00 00 00 02 0A 00 00 // ................ 00F0: 02 00 00 00 00 00 02 0A 00 09 09 00 00 00 0D 00 // ................ ASF! ---- [000h 0000 4] Signature : "ASF!" [Alert Standard Format table] [004h 0004 4] Table Length : 000000A0 [008h 0008 1] Revision : 20 [009h 0009 1] Checksum : 1E [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : " HCG" [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "TFSM" [020h 0032 4] Asl Compiler Revision : 000F4240 [024h 0036 1] Subtable Type : 00 [ASF Information] [025h 0037 1] Reserved : 00 [026h 0038 2] Length : 0010 [028h 0040 1] Minimum Reset Value : FF [029h 0041 1] Minimum Polling Interval : FF [02Ah 0042 2] System ID : 0001 [02Ch 0044 4] Manufacturer ID : 57010000 [030h 0048 1] Flags : 00 [031h 0049 3] Reserved : 000000 [034h 0052 1] Subtable Type : 01 [ASF Alerts] [035h 0053 1] Reserved : 00 [036h 0054 2] Length : 002C [038h 0056 1] AssertMask : 00 [039h 0057 1] DeassertMask : 00 [03Ah 0058 1] Alert Count : 03 [03Bh 0059 1] Alert Data Length : 0C [03Ch 0060 1] Address : 89 [03Dh 0061 1] Command : 04 [03Eh 0062 1] Mask : 01 [03Fh 0063 1] Value : 01 [040h 0064 1] SensorType : 05 [041h 0065 1] Type : 6F [042h 0066 1] Offset : 00 [043h 0067 1] SourceType : 68 [044h 0068 1] Severity : 08 [045h 0069 1] SensorNumber : 88 [046h 0070 1] Entity : 17 [047h 0071 1] Instance : 00 [048h 0072 1] Address : 89 [049h 0073 1] Command : 04 [04Ah 0074 1] Mask : 04 [04Bh 0075 1] Value : 04 [04Ch 0076 1] SensorType : 07 [04Dh 0077 1] Type : 6F [04Eh 0078 1] Offset : 00 [04Fh 0079 1] SourceType : 68 [050h 0080 1] Severity : 20 [051h 0081 1] SensorNumber : 88 [052h 0082 1] Entity : 03 [053h 0083 1] Instance : 00 [054h 0084 1] Address : 89 [055h 0085 1] Command : 05 [056h 0086 1] Mask : 01 [057h 0087 1] Value : 01 [058h 0088 1] SensorType : 19 [059h 0089 1] Type : 6F [05Ah 0090 1] Offset : 00 [05Bh 0091 1] SourceType : 68 [05Ch 0092 1] Severity : 20 [05Dh 0093 1] SensorNumber : 88 [05Eh 0094 1] Entity : 22 [05Fh 0095 1] Instance : 00 [060h 0096 1] Subtable Type : 02 [ASF Remote Control] [061h 0097 1] Reserved : 00 [062h 0098 2] Length : 0018 [064h 0100 1] Control Count : 04 [065h 0101 1] Control Data Length : 04 [066h 0102 2] Reserved : 0000 [068h 0104 1] Function : 00 [069h 0105 1] Address : 88 [06Ah 0106 1] Command : 00 [06Bh 0107 1] Value : 03 [06Ch 0108 1] Function : 01 [06Dh 0109 1] Address : 88 [06Eh 0110 1] Command : 00 [06Fh 0111 1] Value : 02 [070h 0112 1] Function : 02 [071h 0113 1] Address : 88 [072h 0114 1] Command : 00 [073h 0115 1] Value : 01 [074h 0116 1] Function : 03 [075h 0117 1] Address : 88 [076h 0118 1] Command : 00 [077h 0119 1] Value : 04 [078h 0120 1] Subtable Type : 03 [ASF RMCP Boot Options] [079h 0121 1] Reserved : 00 [07Ah 0122 2] Length : 0017 [07Ch 0124 7] Capabilities : 20 18 00 00 00 13 F0 [083h 0131 1] Completion Code : 00 [084h 0132 4] Enterprise ID : 57010000 [088h 0136 1] Command : 00 [089h 0137 2] Parameter : 0000 [08Bh 0139 2] Boot Options : 0100 [08Dh 0141 2] Oem Parameters : 0000 [08Fh 0143 1] Subtable Type : 84 [ASF Address] [090h 0144 1] Reserved : 00 [091h 0145 2] Length : 0011 [093h 0147 1] Eprom Address : 00 [094h 0148 1] Device Count : 0B [095h 0149 1] Addresses : 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 Raw Table Data: Length 160 (0xA0) 0000: 41 53 46 21 A0 00 00 00 20 1E 49 4E 54 45 4C 20 // ASF!.... .INTEL 0010: 20 48 43 47 00 00 00 00 01 00 00 00 54 46 53 4D // HCG........TFSM 0020: 40 42 0F 00 00 00 10 00 FF FF 01 00 00 00 01 57 // @B.............W 0030: 00 00 00 00 01 00 2C 00 00 00 03 0C 89 04 01 01 // ......,......... 0040: 05 6F 00 68 08 88 17 00 89 04 04 04 07 6F 00 68 // .o.h.........o.h 0050: 20 88 03 00 89 05 01 01 19 6F 00 68 20 88 22 00 // ........o.h .". 0060: 02 00 18 00 04 04 00 00 00 88 00 03 01 88 00 02 // ................ 0070: 02 88 00 01 03 88 00 04 03 00 17 00 20 18 00 00 // ............ ... 0080: 00 13 F0 00 00 00 01 57 00 00 00 00 01 00 00 84 // .......W........ 0090: 00 11 00 00 0B 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 // .....\h......... BGRT ---- [000h 0000 4] Signature : "BGRT" [Boot Graphics Resource Table] [004h 0004 4] Table Length : 00000038 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 61 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "AMI " [020h 0032 4] Asl Compiler Revision : 00010013 [024h 0036 2] Version : 0001 [026h 0038 1] Status (decoded below) : 00 Displayed : 0 Orientation Offset : 0 [027h 0039 1] Image Type : 00 [028h 0040 8] Image Address : 00000000B6E43018 [030h 0048 4] Image OffsetX : 00000240 [034h 0052 4] Image OffsetY : 000000F2 Raw Table Data: Length 56 (0x38) 0000: 42 47 52 54 38 00 00 00 01 61 41 4C 41 53 4B 41 // BGRT8....aALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 // A M I ... ..AMI 0020: 13 00 01 00 01 00 00 00 18 30 E4 B6 00 00 00 00 // .........0...... 0030: 40 02 00 00 F2 00 00 00 // @....... DSDT ---- DefinitionBlock ("", "DSDT", 2, "ALASKA", "A M I ", 0x01072009) { Name (ENTK, 0x87) Name (EXTK, 0xAA) Name (IO1B, 0x00) Name (IO1L, 0x00) Name (IO2B, 0x0290) Name (IO2L, 0x10) Name (IO3B, 0x00) Name (IO3L, 0x00) Name (IO4B, 0x00) Name (IO4L, 0x00) Name (SP1O, 0x2E) Name (IOES, 0x00) Name (IOHW, 0x0290) Name (IOHB, 0x0290) Name (IOHL, 0x10) Name (ASSB, 0x00) Name (AOTB, 0x00) Name (AAXB, 0x00) Name (PEHP, 0x01) Name (PEPM, 0x01) Name (PEER, 0x01) Name (PECS, 0x01) Name (ITKE, 0x00) Name (MBEC, 0xFFFF) Name (PEBS, 0xE0000000) Name (PELN, 0x10000000) Name (SRSI, 0xB2) Name (CSMI, 0x61) Name (MFCT, 0xAA) Name (DSSP, 0x00) Name (FHPP, 0x00) Name (SMIM, 0x80000009) Name (AMWV, 0x09) Name (SMIA, 0xB2) Name (SMIB, 0xB3) Name (OFST, 0x35) Name (TRST, 0x02) Name (TCMF, 0x00) Name (TMF1, 0x00) Name (TMF2, 0x00) Name (TMF3, 0x00) Name (TTPF, 0x01) Name (DTPT, 0x00) Name (TTDP, 0x00) Name (TPMB, 0xFFFFFFFF) Name (TPMC, 0xFFFFFFFF) Name (TPMM, 0xFED40000) Name (FTPM, 0xFFFFFFFF) Name (PPIM, 0xFFFF0000) Name (PPIL, 0xF0) Name (AMDT, 0x00) Name (TPMF, 0x00) Name (PPIV, 0x00) Name (TBSW, 0xBC) Name (SRCB, 0xFED1C000) Name (SRCL, 0x4000) Name (SUSW, 0xFF) Name (PMBA, 0x0400) Name (PMLN, 0x80) Name (SMCR, 0x0430) Name (SMIP, 0xB2) Name (APCB, 0xFEC00000) Name (APCL, 0x00100000) Name (PM30, 0x0430) Name (GPBS, 0x0500) Name (GPLN, 0x80) Name (SMBS, 0x0580) Name (SMBL, 0x20) Name (SHPC, 0x00) Name (PICM, 0x00) Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model { If (Arg0) { DBG8 = 0xAA } Else { DBG8 = 0xAC } PICM = Arg0 } Name (OSVR, Ones) Method (OSFL, 0, NotSerialized) { If ((OSVR != Ones)) { Return (OSVR) /* \OSVR */ } If ((PICM == 0x00)) { DBG8 = 0xAC } OSVR = 0x03 If (CondRefOf (\_OSI, Local0)) { If (_OSI ("Windows 2001")) { OSVR = 0x04 } If (_OSI ("Windows 2001.1")) { OSVR = 0x05 } If (_OSI ("FreeBSD")) { OSVR = 0x06 } If (_OSI ("HP-UX")) { OSVR = 0x07 } If (_OSI ("OpenVMS")) { OSVR = 0x08 } If (_OSI ("Windows 2001 SP1")) { OSVR = 0x09 } If (_OSI ("Windows 2001 SP2")) { OSVR = 0x0A } If (_OSI ("Windows 2001 SP3")) { OSVR = 0x0B } If (_OSI ("Windows 2006")) { OSVR = 0x0C } If (_OSI ("Windows 2006 SP1")) { OSVR = 0x0D } If (_OSI ("Windows 2009")) { OSVR = 0x0E } If (_OSI ("Windows 2012")) { OSVR = 0x0F } If (_OSI ("Windows 2013")) { OSVR = 0x10 } } Else { If (MCTH (_OS, "Microsoft Windows NT")) { OSVR = 0x00 } If (MCTH (_OS, "Microsoft Windows")) { OSVR = 0x01 } If (MCTH (_OS, "Microsoft WindowsME: Millennium Edition")) { OSVR = 0x02 } If (MCTH (_OS, "Linux")) { OSVR = 0x03 } If (MCTH (_OS, "FreeBSD")) { OSVR = 0x06 } If (MCTH (_OS, "HP-UX")) { OSVR = 0x07 } If (MCTH (_OS, "OpenVMS")) { OSVR = 0x08 } } Return (OSVR) /* \OSVR */ } Method (MCTH, 2, NotSerialized) { If ((SizeOf (Arg0) < SizeOf (Arg1))) { Return (Zero) } Local0 = (SizeOf (Arg0) + 0x01) Name (BUF0, Buffer (Local0){}) Name (BUF1, Buffer (Local0){}) BUF0 = Arg0 BUF1 = Arg1 While (Local0) { Local0-- If ((DerefOf (BUF0 [Local0]) != DerefOf (BUF1 [Local0] ))) { Return (Zero) } } Return (One) } Name (PRWP, Package (0x02) { Zero, Zero }) Method (GPRW, 2, NotSerialized) { PRWP [0x00] = Arg0 Local0 = (SS1 << 0x01) Local0 |= (SS2 << 0x02) Local0 |= (SS3 << 0x03) Local0 |= (SS4 << 0x04) If (((0x01 << Arg1) & Local0)) { PRWP [0x01] = Arg1 } Else { Local0 >>= 0x01 If (((OSFL () == 0x01) || (OSFL () == 0x02))) { FindSetLeftBit (Local0, PRWP [0x01]) } Else { FindSetRightBit (Local0, PRWP [0x01]) } } Return (PRWP) /* \PRWP */ } Name (WAKP, Package (0x02) { Zero, Zero }) Method (UPWP, 1, NotSerialized) { If (DerefOf (WAKP [0x00])) { WAKP [0x01] = 0x00 } Else { WAKP [0x01] = Arg0 } } OperationRegion (DEB0, SystemIO, 0x80, 0x01) Field (DEB0, ByteAcc, NoLock, Preserve) { DBG8, 8 } OperationRegion (DEB1, SystemIO, 0x90, 0x02) Field (DEB1, WordAcc, NoLock, Preserve) { DBG9, 16 } Name (SS1, 0x01) Name (SS2, 0x00) Name (SS3, 0x01) Name (SS4, 0x01) Name (IOST, 0x0000) Name (TOPM, 0x00000000) Name (ROMS, 0xFFE00000) Name (VGAF, 0x01) Name (OSHF, 0x00) Scope (_SB) { Name (XCNT, 0x00) Name (ECNT, 0x00) Name (OSYS, 0x00) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("663e35af-cc10-41a4-88ea-5470af055295"))) { Switch (ToInteger (Arg2)) { Case (0x00) { Switch (ToInteger (Arg1)) { Case (0x00) { If ((EMCA == 0x01)) { Return (Buffer (0x01) { 0x03 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } } } Case (0x01) { Return (LDIR) /* \LDIR */ } Default { } } } Return (Buffer (0x01) { 0x00 // . }) } Method (_INI, 0, NotSerialized) // _INI: Initialize { If (CondRefOf (_OSI, Local0)) { If (_OSI ("Windows 2001.1 SP1")) { OSYS = 0x05 } If (_OSI ("Windows 2001.1")) { OSYS = 0x06 } If (_OSI ("Windows 2001 SP2")) { OSYS = 0x07 } If (_OSI ("Windows 2001")) { OSYS = 0x08 } If (_OSI ("Windows 2006.1")) { OSYS = 0x09 } If (_OSI ("Windows 2006 SP1")) { OSYS = 0x0A } If (_OSI ("Windows 2006")) { OSYS = 0x0B } If (_OSI ("Windows 2009")) { OSYS = 0x0C } If (_OSI ("Windows 2012")) { OSYS = 0x0D } If (_OSI ("Linux")) { OSYS = 0x01 } If (_OSI ("FreeBSD")) { OSYS = 0x02 } If (_OSI ("HP-UX")) { OSYS = 0x03 } If (_OSI ("OpenVMS")) { OSYS = 0x04 } If ((OSYS >= 0x0D)) { If ((XCNT == 0x00)) { ^PCI0.XHCI.XSEL (0x00) XCNT++ } } Else { IO80 = OSYS /* \_SB_.OSYS */ } } ^PCI0.RP05.TINI () } } Name (BBI0, 0x00000000) Name (BBI1, 0x00000000) Name (BBI2, 0x00000000) Name (BBI3, 0x00000000) Name (BBU0, 0x000000FF) Name (BBU1, 0x000000FF) Name (BBU2, 0x000000FF) Name (BBU3, 0x000000FF) OperationRegion (DBG0, SystemIO, 0x80, 0x02) Field (DBG0, ByteAcc, NoLock, Preserve) { IO80, 8, IO81, 8 } OperationRegion (ACMS, SystemIO, 0x72, 0x02) Field (ACMS, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } OperationRegion (GPCT, SystemIO, 0x0442, 0x01) Field (GPCT, ByteAcc, NoLock, Preserve) { , 1, SGPC, 1 } OperationRegion (GPIV, SystemIO, 0x052C, 0x02) Field (GPIV, ByteAcc, NoLock, Preserve) { GP0I, 1, , 13, RASI, 1 } OperationRegion (PSYS, SystemMemory, 0xBBFFD000, 0x0400) Field (PSYS, ByteAcc, NoLock, Preserve) { PLAT, 32, APC0, 1, APC1, 1, APC2, 1, APC3, 1, APC4, 1, Offset (0x05), RES0, 8, TPME, 1, CSEN, 1, C3EN, 1, C6EN, 1, C7EN, 1, MWOS, 1, PSEN, 1, EMCA, 1, HWAL, 1, KPRS, 1, MPRS, 1, TSEN, 1, FGTS, 1, OSCX, 1, RESX, 2, CPHP, 8, IIOP, 8, IIOH, 8, CPUT, 8, PRBM, 32, P0ID, 32, P1ID, 32, P2ID, 32, P3ID, 32, P0BM, 64, P1BM, 64, P2BM, 64, P3BM, 64, MEBM, 16, MEBC, 16, CFMM, 32, TSSZ, 32, M0BS, 64, M1BS, 64, M2BS, 64, M3BS, 64, M4BS, 64, M5BS, 64, M6BS, 64, M7BS, 64, M0RN, 64, M1RN, 64, M2RN, 64, M3RN, 64, M4RN, 64, M5RN, 64, M6RN, 64, M7RN, 64, SMI0, 32, SMI1, 32, SMI2, 32, SMI3, 32, SCI0, 32, SCI1, 32, SCI2, 32, SCI3, 32, MADD, 64, CUU0, 128, CUU1, 128, CUU2, 128, CUU3, 128, CUU4, 128, CUU5, 128, CUU6, 128, CUU7, 128, CPSP, 8, ME00, 128, ME01, 128, ME10, 128, ME11, 128, ME20, 128, ME21, 128, ME30, 128, ME31, 128, ME40, 128, ME41, 128, ME50, 128, ME51, 128, ME60, 128, ME61, 128, ME70, 128, ME71, 128, MESP, 16, DHRD, 192, ATSR, 192, RHSA, 192, LDIR, 64, PRID, 32, WSIC, 8, WSIS, 16, WSIB, 8, WSID, 8, WSIF, 8, WSTS, 8, WHEA, 8, PFMA, 64, PFMS, 8, PFIO, 16, CNBS, 8, XHMD, 8, SBV1, 8, SBV2, 8, SBS3, 8, SBS4, 8, AHPE, 8, CLOD, 8, HWEN, 2, ACEN, 1, RES1, 5, SCUF, 8 } OperationRegion (GSTS, SystemIO, 0x0422, 0x02) Field (GSTS, ByteAcc, NoLock, Preserve) { GP00, 1, , 12, GP13, 1 } OperationRegion (GPE0, SystemIO, 0x0428, 0x08) Field (GPE0, ByteAcc, NoLock, Preserve) { , 1, GPEH, 1, , 1, USB1, 1, USB2, 1, USB5, 1, , 3, PCIE, 1, , 1, PMEE, 1, USB3, 1, PMB0, 1, USB4, 1, Offset (0x03), , 1, Offset (0x04), USB6, 1, Offset (0x06) } OperationRegion (GPES, SystemIO, 0x0420, 0x08) Field (GPES, ByteAcc, NoLock, Preserve) { , 1, GPSH, 1, SGPS, 1, US1S, 1, US2S, 1, US5S, 1, , 1, SMWS, 1, , 1, PEES, 1, , 1, PMES, 1, US3S, 1, PMBS, 1, US4S, 1, Offset (0x03), , 1, Offset (0x04), US6S, 1, Offset (0x06) } Method (IPTS, 1, NotSerialized) { IO80 = Arg0 US1S = 0x01 US2S = 0x01 US5S = 0x01 SMWS = 0x01 PMES = 0x01 US3S = 0x01 PMBS = 0x01 US4S = 0x01 US6S = 0x01 GPEH = 0x01 USB1 = 0x01 USB2 = 0x01 USB5 = 0x01 PCIE = 0x01 PMEE = 0x01 USB3 = 0x01 PMB0 = 0x01 USB4 = 0x01 USB6 = 0x01 } Method (_GTS, 1, NotSerialized) // _GTS: Going To Sleep { IO80 = Arg0 } Scope (_SB) { Name (PRUN, Package (0x54) { Package (0x04) { 0x0008FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0008FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0008FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0008FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0009FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0009FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0009FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0009FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000AFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000AFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000AFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000AFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000BFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000BFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000BFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000BFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000CFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000CFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000CFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000CFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000DFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000DFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000DFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000DFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000EFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000EFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000EFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000EFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x000FFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x000FFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x000FFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x000FFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0010FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0010FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0010FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0010FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0011FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0011FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0011FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0011FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0012FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0012FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0012FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0012FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0013FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0013FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0013FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0013FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0014FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0014FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0014FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0014FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0016FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0016FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0016FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0016FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0017FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0017FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0017FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0017FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0018FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0018FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0018FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0018FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0019FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0019FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0019FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0019FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x001CFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001CFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001CFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x001DFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001DFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001DFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001DFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x001EFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001EFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001EFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001EFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x001FFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001FFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001FFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001FFFFF, 0x03, LNKD, 0x00 } }) Name (ARUN, Package (0x54) { Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0008FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0008FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0008FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000AFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000AFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000AFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000AFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000BFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000BFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000BFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000BFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000CFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000CFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000CFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000CFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000DFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000DFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000DFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000DFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000EFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000EFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000EFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000EFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x000FFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x000FFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0011FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0011FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0011FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0011FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0012FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0012FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0012FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0012FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0013FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0013FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0013FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0013FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0014FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0014FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0014FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0014FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0016FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0016FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0016FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0016FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0017FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0017FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0017FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0017FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0018FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0018FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0018FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0018FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0019FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0019FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0019FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0019FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001DFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001DFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001DFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001EFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001EFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001EFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001EFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001FFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001FFFFF, 0x03, 0x00, 0x13 } }) Method (USTA, 1, NotSerialized) { Local6 = 0x00 Local6 = (PRBM >> Arg0) Local6 &= 0x01 If ((Local6 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Device (UNC3) { Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID Name (_UID, 0xFF) // _UID: Unique ID Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BBU3) /* \BBU3 */ } Name (_ADR, 0x00) // _ADR: Address Name (_EJD, "\\_SB.SCK3") // _EJD: Ejection Dependent Device Method (_STA, 0, NotSerialized) // _STA: Status { Return (USTA (0x03)) } Name (SUPP, 0x00) Name (CTRL, 0x00) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.UNC3._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.UNC3._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () GPSH = 0x01 } } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.UNC3.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x00FF, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, ) }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If ((PICM == Zero)) { Return (PRUN) /* \_SB_.PRUN */ } Return (ARUN) /* \_SB_.ARUN */ } } Device (UNC2) { Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID Name (_UID, 0xBF) // _UID: Unique ID Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BBU2) /* \BBU2 */ } Name (_ADR, 0x00) // _ADR: Address Name (_EJD, "\\_SB.SCK2") // _EJD: Ejection Dependent Device Method (_STA, 0, NotSerialized) // _STA: Status { Return (USTA (0x02)) } Name (SUPP, 0x00) Name (CTRL, 0x00) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.UNC2._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.UNC2._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () GPSH = 0x01 } } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.UNC2.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x00FF, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, ) }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If ((PICM == Zero)) { Return (PRUN) /* \_SB_.PRUN */ } Return (ARUN) /* \_SB_.ARUN */ } } Device (UNC1) { Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID Name (_UID, 0x7F) // _UID: Unique ID Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BBU1) /* \BBU1 */ } Name (_ADR, 0x00) // _ADR: Address Name (_EJD, "\\_SB.SCK1") // _EJD: Ejection Dependent Device Method (_STA, 0, NotSerialized) // _STA: Status { Return (USTA (0x01)) } Name (SUPP, 0x00) Name (CTRL, 0x00) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.UNC1._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.UNC1._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () GPSH = 0x01 } } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.UNC1.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x00FF, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, ) }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If ((PICM == Zero)) { Return (PRUN) /* \_SB_.PRUN */ } Return (ARUN) /* \_SB_.ARUN */ } } Device (UNC0) { Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID Name (_UID, 0x3F) // _UID: Unique ID Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BBU0) /* \BBU0 */ } Name (_ADR, 0x00) // _ADR: Address Name (_EJD, "\\_SB.SCK0") // _EJD: Ejection Dependent Device Method (_STA, 0, NotSerialized) // _STA: Status { Return (USTA (0x00)) } Name (SUPP, 0x00) Name (CTRL, 0x00) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (^^PCI0.XHCI.POSC (Arg1, Arg2, Arg3)) } ElseIf ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.UNC0._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.UNC0._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () GPSH = 0x01 } } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.UNC0.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x00FF, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, ) }) Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If ((PICM == Zero)) { Return (PRUN) /* \_SB_.PRUN */ } Return (ARUN) /* \_SB_.ARUN */ } } } Method (IWAK, 1, Serialized) { IO80 = (Arg0 << 0x04) Notify (\_SB.PCI0.EHC1, 0x00) // Bus Check Notify (\_SB.PCI0.EHC2, 0x00) // Bus Check If (((Arg0 == 0x03) || (Arg0 == 0x04))) { \_SB.PCI0.XHCI.XWAK () } Return (Package (0x02) { 0x00, 0x00 }) } Scope (_SB) { Scope (\_SB) { Method (PSTA, 1, NotSerialized) { Local6 = (PRBM >> Arg0) Local6 &= 0x01 If ((Local6 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Method (TMID, 2, NotSerialized) { Local0 = (Arg0 * 0x02) Local1 = (Local0 + Arg1) Return (Local1) } Name (APTC, Buffer (0x30) { /* 0000 */ 0x00, 0x02, 0x04, 0x06, 0x08, 0x0A, 0x01, 0x03, // ........ /* 0008 */ 0x05, 0x07, 0x09, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF, // ........ /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ /* 0018 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ /* 0020 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........ /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........ }) Method (TPID, 2, NotSerialized) { Local0 = 0x00 If ((Arg0 == 0x00)) { Local0 = P0ID /* \P0ID */ } If ((Arg0 == 0x01)) { Local0 = P1ID /* \P1ID */ } If ((Arg0 == 0x02)) { Local0 = P2ID /* \P2ID */ } If ((Arg0 == 0x03)) { Local0 = P3ID /* \P3ID */ } Local0 += DerefOf (APTC [Arg1]) Return (Local0) } Method (MSTA, 1, NotSerialized) { Local6 = (MEBM >> Arg0) Local6 &= 0x01 If ((Local6 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Method (CSTA, 2, NotSerialized) { Local0 = 0x00 Local1 = 0x00 Local1 = TPID (Arg0, Arg1) Local2 = 0x00 Local2 += DerefOf (APTC [Arg1]) If ((Local2 == 0xFF)) { Return (0x00) } If ((Arg0 == 0x00)) { Local0 = (P0BM >> Local2) } If ((Arg0 == 0x01)) { Local0 = (P1BM >> Local2) } If ((Arg0 == 0x02)) { Local0 = (P2BM >> Local2) } If ((Arg0 == 0x03)) { Local0 = (P3BM >> Local2) } Local0 &= 0x01 If ((Local0 == 0x00)) { Return (0x00) } Else { Return (0x01) } } Method (LAPC, 2, NotSerialized) { Name (APIC, Buffer (0x08){}) CreateByteField (APIC, 0x00, TYPE) CreateByteField (APIC, 0x01, LLEN) CreateByteField (APIC, 0x02, PRID) CreateByteField (APIC, 0x03, APID) CreateDWordField (APIC, 0x04, FLAG) TYPE = 0x00 LLEN = 0x08 APID = TPID (Arg0, Arg1) If ((CSTA (Arg0, Arg1) == 0x00)) { FLAG = 0x00 PRID = 0xFF APID = 0xFF } Else { Local0 = APID /* \_SB_.LAPC.APID */ PRID = Local0 FLAG = 0x01 } Return (APIC) /* \_SB_.LAPC.APIC */ } Device (SCK0) { Name (_HID, "ACPI0004" /* Module Device */) // _HID: Hardware ID Name (_UID, "CPUSCK0") // _UID: Unique ID Name (LSTA, 0xFF) Method (_STA, 0, NotSerialized) // _STA: Status { CUU0 = "CPUSCK0" Local0 = PSTA (0x00) Local1 = (Local0 & 0x03) If (((LSTA != 0xFF) && (Local1 != LSTA))) { If ((Local1 == 0x03)){} Else { } } LSTA = Local1 Return (Local0) } Method (THNU, 0, NotSerialized) { Local0 = 0x00 Local1 = P0BM /* \P0BM */ While (Local1) { Local0 += (Local1 & 0x01) Local1 >>= 0x01 } Return ((0x00 | Local0)) } Processor (CP00, 0x00, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP00") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x00]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x00) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x00)) } } Processor (CP01, 0x02, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP01") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x01]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x01) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x01)) } } Processor (CP02, 0x04, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP02") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x02]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x02) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x02)) } } Processor (CP03, 0x06, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP03") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x03]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x03) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x03)) } } Processor (CP04, 0x08, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP04") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x04]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x04) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x04)) } } Processor (CP05, 0x0A, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP05") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x05]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x05) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x05)) } } Processor (CP06, 0x01, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP06") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x06]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x06) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x06)) } } Processor (CP07, 0x03, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP07") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x07]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x07) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x07)) } } Processor (CP08, 0x05, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP08") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x08]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x08) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x08)) } } Processor (CP09, 0x07, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP09") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x09]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x09) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x09)) } } Processor (CP0A, 0x09, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0A)) } } Processor (CP0B, 0x0B, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0B)) } } Processor (CP0C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0C)) } } Processor (CP0D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0D)) } } Processor (CP0E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0E)) } } Processor (CP0F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP0F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x0F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x0F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x0F)) } } Processor (CP10, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP10") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x10]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x10) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x10)) } } Processor (CP11, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP11") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x11]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x11) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x11)) } } Processor (CP12, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP12") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x12]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x12) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x12)) } } Processor (CP13, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP13") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x13]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x13) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x13)) } } Processor (CP14, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP14") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x14]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x14) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x14)) } } Processor (CP15, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP15") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x15]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x15) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x15)) } } Processor (CP16, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP16") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x16]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x16) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x16)) } } Processor (CP17, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP17") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x17]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x17) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x17)) } } Processor (CP18, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP18") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x18]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x18) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x18)) } } Processor (CP19, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP19") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x19]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x19) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x19)) } } Processor (CP1A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1A)) } } Processor (CP1B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1B)) } } Processor (CP1C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1C)) } } Processor (CP1D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1D)) } } Processor (CP1E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1E)) } } Processor (CP1F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP1F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x1F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x1F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x1F)) } } Processor (CP20, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP20") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x20]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x20) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x20)) } } Processor (CP21, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP21") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x21]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x21) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x21)) } } Processor (CP22, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP22") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x22]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x22) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x22)) } } Processor (CP23, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP23") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x23]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x23) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x23)) } } Processor (CP24, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP24") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x24]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x24) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x24)) } } Processor (CP25, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP25") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x25]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x25) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x25)) } } Processor (CP26, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP26") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x26]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x26) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x26)) } } Processor (CP27, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP27") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x27]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x27) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x27)) } } Processor (CP28, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP28") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x28]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x28) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x28)) } } Processor (CP29, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP29") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x29]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x29) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x29)) } } Processor (CP2A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2A)) } } Processor (CP2B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2B)) } } Processor (CP2C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2C)) } } Processor (CP2D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2D)) } } Processor (CP2E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2E)) } } Processor (CP2F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK0-CP2F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x00) } Else { Local0 = DerefOf (APTC [0x2F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x00 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x00, 0x2F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x00, 0x2F)) } } } Device (SCK1) { Name (_HID, "ACPI0004" /* Module Device */) // _HID: Hardware ID Name (_UID, "CPUSCK1") // _UID: Unique ID Name (LSTA, 0xFF) Method (_STA, 0, NotSerialized) // _STA: Status { CUU1 = "CPUSCK1" Local0 = PSTA (0x01) Local1 = (Local0 & 0x03) If (((LSTA != 0xFF) && (Local1 != LSTA))) { If ((Local1 == 0x03)){} Else { } } LSTA = Local1 Return (Local0) } Method (THNU, 0, NotSerialized) { Local0 = 0x00 Local1 = P1BM /* \P1BM */ While (Local1) { Local0 += (Local1 & 0x01) Local1 >>= 0x01 } Return ((0x0100 | Local0)) } Processor (CP00, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP00") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x00]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x00) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x00)) } } Processor (CP01, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP01") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x01]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x01) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x01)) } } Processor (CP02, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP02") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x02]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x02) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x02)) } } Processor (CP03, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP03") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x03]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x03) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x03)) } } Processor (CP04, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP04") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x04]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x04) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x04)) } } Processor (CP05, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP05") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x05]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x05) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x05)) } } Processor (CP06, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP06") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x06]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x06) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x06)) } } Processor (CP07, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP07") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x07]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x07) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x07)) } } Processor (CP08, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP08") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x08]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x08) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x08)) } } Processor (CP09, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP09") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x09]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x09) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x09)) } } Processor (CP0A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0A)) } } Processor (CP0B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0B)) } } Processor (CP0C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0C)) } } Processor (CP0D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0D)) } } Processor (CP0E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0E)) } } Processor (CP0F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP0F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x0F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x0F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x0F)) } } Processor (CP10, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP10") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x10]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x10) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x10)) } } Processor (CP11, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP11") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x11]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x11) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x11)) } } Processor (CP12, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP12") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x12]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x12) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x12)) } } Processor (CP13, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP13") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x13]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x13) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x13)) } } Processor (CP14, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP14") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x14]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x14) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x14)) } } Processor (CP15, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP15") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x15]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x15) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x15)) } } Processor (CP16, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP16") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x16]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x16) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x16)) } } Processor (CP17, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP17") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x17]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x17) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x17)) } } Processor (CP18, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP18") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x18]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x18) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x18)) } } Processor (CP19, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP19") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x19]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x19) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x19)) } } Processor (CP1A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1A)) } } Processor (CP1B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1B)) } } Processor (CP1C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1C)) } } Processor (CP1D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1D)) } } Processor (CP1E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1E)) } } Processor (CP1F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP1F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x1F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x1F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x1F)) } } Processor (CP20, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP20") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x20]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x20) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x20)) } } Processor (CP21, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP21") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x21]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x21) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x21)) } } Processor (CP22, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP22") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x22]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x22) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x22)) } } Processor (CP23, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP23") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x23]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x23) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x23)) } } Processor (CP24, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP24") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x24]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x24) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x24)) } } Processor (CP25, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP25") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x25]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x25) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x25)) } } Processor (CP26, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP26") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x26]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x26) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x26)) } } Processor (CP27, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP27") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x27]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x27) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x27)) } } Processor (CP28, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP28") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x28]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x28) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x28)) } } Processor (CP29, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP29") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x29]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x29) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x29)) } } Processor (CP2A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2A)) } } Processor (CP2B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2B)) } } Processor (CP2C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2C)) } } Processor (CP2D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2D)) } } Processor (CP2E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2E)) } } Processor (CP2F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK1-CP2F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Local0 = DerefOf (APTC [0x2F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x01 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x01, 0x2F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x01, 0x2F)) } } } Device (SCK2) { Name (_HID, "ACPI0004" /* Module Device */) // _HID: Hardware ID Name (_UID, "CPUSCK2") // _UID: Unique ID Name (LSTA, 0xFF) Method (_STA, 0, NotSerialized) // _STA: Status { CUU2 = "CPUSCK2" Local0 = PSTA (0x02) Local1 = (Local0 & 0x03) If (((LSTA != 0xFF) && (Local1 != LSTA))) { If ((Local1 == 0x03)){} Else { } } LSTA = Local1 Return (Local0) } Method (THNU, 0, NotSerialized) { Local0 = 0x00 Local1 = P2BM /* \P2BM */ While (Local1) { Local0 += (Local1 & 0x01) Local1 >>= 0x01 } Return ((0x0200 | Local0)) } Processor (CP00, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP00") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x00]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x00) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x00)) } } Processor (CP01, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP01") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x01]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x01) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x01)) } } Processor (CP02, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP02") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x02]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x02) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x02)) } } Processor (CP03, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP03") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x03]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x03) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x03)) } } Processor (CP04, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP04") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x04]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x04) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x04)) } } Processor (CP05, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP05") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x05]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x05) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x05)) } } Processor (CP06, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP06") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x06]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x06) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x06)) } } Processor (CP07, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP07") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x07]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x07) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x07)) } } Processor (CP08, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP08") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x08]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x08) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x08)) } } Processor (CP09, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP09") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x09]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x09) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x09)) } } Processor (CP0A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0A)) } } Processor (CP0B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0B)) } } Processor (CP0C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0C)) } } Processor (CP0D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0D)) } } Processor (CP0E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0E)) } } Processor (CP0F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP0F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x0F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x0F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x0F)) } } Processor (CP10, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP10") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x10]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x10) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x10)) } } Processor (CP11, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP11") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x11]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x11) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x11)) } } Processor (CP12, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP12") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x12]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x12) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x12)) } } Processor (CP13, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP13") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x13]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x13) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x13)) } } Processor (CP14, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP14") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x14]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x14) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x14)) } } Processor (CP15, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP15") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x15]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x15) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x15)) } } Processor (CP16, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP16") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x16]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x16) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x16)) } } Processor (CP17, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP17") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x17]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x17) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x17)) } } Processor (CP18, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP18") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x18]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x18) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x18)) } } Processor (CP19, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP19") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x19]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x19) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x19)) } } Processor (CP1A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1A)) } } Processor (CP1B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1B)) } } Processor (CP1C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1C)) } } Processor (CP1D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1D)) } } Processor (CP1E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1E)) } } Processor (CP1F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP1F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x1F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x1F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x1F)) } } Processor (CP20, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP20") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x20]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x20) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x20)) } } Processor (CP21, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP21") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x21]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x21) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x21)) } } Processor (CP22, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP22") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x22]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x22) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x22)) } } Processor (CP23, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP23") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x23]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x23) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x23)) } } Processor (CP24, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP24") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x24]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x24) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x24)) } } Processor (CP25, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP25") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x25]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x25) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x25)) } } Processor (CP26, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP26") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x26]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x26) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x26)) } } Processor (CP27, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP27") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x27]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x27) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x27)) } } Processor (CP28, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP28") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x28]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x28) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x28)) } } Processor (CP29, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP29") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x29]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x29) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x29)) } } Processor (CP2A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2A)) } } Processor (CP2B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2B)) } } Processor (CP2C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2C)) } } Processor (CP2D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2D)) } } Processor (CP2E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2E)) } } Processor (CP2F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK2-CP2F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Local0 = DerefOf (APTC [0x2F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x02 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x02, 0x2F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x02, 0x2F)) } } } Device (SCK3) { Name (_HID, "ACPI0004" /* Module Device */) // _HID: Hardware ID Name (_UID, "CPUSCK3") // _UID: Unique ID Name (LSTA, 0xFF) Method (_STA, 0, NotSerialized) // _STA: Status { CUU3 = "CPUSCK3" Local0 = PSTA (0x03) Local1 = (Local0 & 0x03) If (((LSTA != 0xFF) && (Local1 != LSTA))) { If ((Local1 == 0x03)){} Else { } } LSTA = Local1 Return (Local0) } Method (THNU, 0, NotSerialized) { Local0 = 0x00 Local1 = P3BM /* \P3BM */ While (Local1) { Local0 += (Local1 & 0x01) Local1 >>= 0x01 } Return ((0x0300 | Local0)) } Processor (CP00, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP00") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x00]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x00) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x00)) } } Processor (CP01, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP01") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x01]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x01) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x01)) } } Processor (CP02, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP02") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x02]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x02) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x02)) } } Processor (CP03, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP03") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x03]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x03) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x03)) } } Processor (CP04, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP04") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x04]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x04) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x04)) } } Processor (CP05, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP05") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x05]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x05) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x05)) } } Processor (CP06, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP06") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x06]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x06) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x06)) } } Processor (CP07, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP07") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x07]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x07) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x07)) } } Processor (CP08, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP08") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x08]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x08) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x08)) } } Processor (CP09, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP09") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x09]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x09) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x09)) } } Processor (CP0A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0A)) } } Processor (CP0B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0B)) } } Processor (CP0C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0C)) } } Processor (CP0D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0D)) } } Processor (CP0E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0E)) } } Processor (CP0F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP0F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x0F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x0F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x0F)) } } Processor (CP10, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP10") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x10]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x10) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x10)) } } Processor (CP11, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP11") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x11]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x11) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x11)) } } Processor (CP12, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP12") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x12]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x12) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x12)) } } Processor (CP13, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP13") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x13]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x13) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x13)) } } Processor (CP14, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP14") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x14]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x14) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x14)) } } Processor (CP15, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP15") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x15]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x15) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x15)) } } Processor (CP16, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP16") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x16]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x16) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x16)) } } Processor (CP17, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP17") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x17]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x17) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x17)) } } Processor (CP18, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP18") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x18]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x18) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x18)) } } Processor (CP19, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP19") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x19]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x19) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x19)) } } Processor (CP1A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1A)) } } Processor (CP1B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1B)) } } Processor (CP1C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1C)) } } Processor (CP1D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1D)) } } Processor (CP1E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1E)) } } Processor (CP1F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP1F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x1F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x1F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x1F)) } } Processor (CP20, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP20") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x20]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x20) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x20)) } } Processor (CP21, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP21") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x21]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x21) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x21)) } } Processor (CP22, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP22") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x22]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x22) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x22)) } } Processor (CP23, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP23") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x23]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x23) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x23)) } } Processor (CP24, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP24") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x24]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x24) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x24)) } } Processor (CP25, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP25") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x25]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x25) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x25)) } } Processor (CP26, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP26") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x26]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x26) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x26)) } } Processor (CP27, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP27") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x27]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x27) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x27)) } } Processor (CP28, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP28") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x28]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x28) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x28)) } } Processor (CP29, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP29") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x29]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x29) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x29)) } } Processor (CP2A, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2A") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2A]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2A) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2A)) } } Processor (CP2B, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2B") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2B]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2B) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2B)) } } Processor (CP2C, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2C") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2C]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2C) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2C)) } } Processor (CP2D, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2D") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2D]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2D) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2D)) } } Processor (CP2E, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2E") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2E]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2E) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2E)) } } Processor (CP2F, 0xFF, 0x00000410, 0x06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, "SCK3-CP2F") // _UID: Unique ID Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Local0 = DerefOf (APTC [0x2F]) Local1 = CNBS /* \CNBS */ Local1 -= 0x01 Local0 >>= Local1 Local0 &= 0x01 Local1 = 0x03 Local1 *= 0x02 If ((Local0 == 0x01)) { Local1 += 0x01 } Return (Local1) } } Method (_STA, 0, NotSerialized) // _STA: Status { If ((CSTA (0x03, 0x2F) == 0x00)) { Return (0x00) } ElseIf ((OSYS >= 0x0C)) { Return (0x0F) } Else { Return (0x0B) } } Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table Entry { Return (LAPC (0x03, 0x2F)) } } } } OperationRegion (IOB2, SystemIO, 0xB2, 0x02) Field (IOB2, ByteAcc, NoLock, Preserve) { SMIC, 8, SMIS, 8 } } Scope (_SB) { Name (PRSA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,11,12,14,15} }) Alias (PRSA, PRSB) Name (PRSC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,10,11,12,14,15} }) Alias (PRSC, PRSD) Alias (PRSA, PRSE) Alias (PRSA, PRSF) Alias (PRSA, PRSG) Alias (PRSA, PRSH) Name (PG12, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG12, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) Name (PG15, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKC, 0x00 } }) Name (AG15, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) Name (PG16, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG16, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) Name (PG18, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKB, 0x00 } }) Name (AG18, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x11 } }) Name (PG19, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKC, 0x00 } }) Name (AG19, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) Name (PR00, Package (0x25) { Package (0x04) { 0x001FFFFF, 0x00, LNKB, 0x00 }, Package (0x04) { 0x001FFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0014FFFF, 0x03, LNKH, 0x00 }, Package (0x04) { 0x001DFFFF, 0x00, LNKF, 0x00 }, Package (0x04) { 0x001AFFFF, 0x00, LNKC, 0x00 }, Package (0x04) { 0x001BFFFF, 0x00, LNKG, 0x00 }, Package (0x04) { 0x0016FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0016FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x001CFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x001CFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0011FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0011FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0011FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0011FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0002FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0002FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0002FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0003FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0003FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0003FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0004FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0004FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0019FFFF, 0x00, LNKE, 0x00 } }) Name (AR00, Package (0x25) { Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0014FFFF, 0x03, 0x00, 0x17 }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x15 }, Package (0x04) { 0x001AFFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0x001BFFFF, 0x00, 0x00, 0x16 }, Package (0x04) { 0x0016FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0016FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0011FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0011FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0011FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0011FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x00, 0x00, 0x18 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x19 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x19 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x19 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1A }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1C }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1D }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x1E }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x20 }, Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x24 }, Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x25 }, Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x26 }, Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x28 }, Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x2C }, Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x2D }, Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x2E }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1F }, Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x27 }, Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1F }, Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x27 }, Package (0x04) { 0x0019FFFF, 0x00, 0x00, 0x14 } }) Name (PG22, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG22, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x1A }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x1C }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x1D }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x1E } }) Name (PG23, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG23, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x1B }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x1E }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x1C }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x1D } }) Name (PG24, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG24, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x20 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x24 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x25 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x26 } }) Name (PG25, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG25, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x21 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x25 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x26 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x24 } }) Name (PG26, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG26, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x22 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x25 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x24 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x26 } }) Name (PG27, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG27, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x23 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x24 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x26 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x25 } }) Name (PG28, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG28, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x28 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x2C }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x2D }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x2E } }) Name (PG29, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG29, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x29 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x2D }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x2E }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x2C } }) Name (PG2A, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG2A, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x2A }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x2D }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x2C }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x2E } }) Name (PG2B, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 } }) Name (AG2B, Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x2B }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x2C }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x2E }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x2D } }) Name (PR80, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0002FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0002FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0002FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0003FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0003FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0003FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0004FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0004FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, 0x00 } }) Name (AR80, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x30 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x31 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x31 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x31 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x32 }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x34 }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x35 }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x36 }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x38 }, Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x3C }, Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x3D }, Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x3E }, Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x40 }, Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x44 }, Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x45 }, Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x46 }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x37 }, Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x3F }, Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x37 }, Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x3F } }) Name (PRC0, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0002FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0002FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0002FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0003FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0003FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0003FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0004FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0004FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, 0x00 } }) Name (ARC0, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x48 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x49 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x49 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x49 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x4A }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x4C }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x4D }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x4E }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x50 }, Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x54 }, Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x55 }, Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x56 }, Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x58 }, Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x5C }, Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x5D }, Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x5E }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x4F }, Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x57 }, Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x4F }, Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x57 } }) Name (PRE0, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0002FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0002FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0002FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0003FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0003FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0003FFFF, 0x03, LNKD, 0x00 }, Package (0x04) { 0x0004FFFF, 0x00, LNKA, 0x00 }, Package (0x04) { 0x0004FFFF, 0x01, LNKB, 0x00 }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, 0x00 }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, 0x00 } }) Name (ARE0, Package (0x14) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x60 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x61 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x61 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x61 }, Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x62 }, Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x64 }, Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x65 }, Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x66 }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x68 }, Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x6C }, Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x6D }, Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x6E }, Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x70 }, Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x74 }, Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x75 }, Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x76 }, Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x67 }, Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x6F }, Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x67 }, Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x6F } }) } Scope (_SB) { Device (PCI0) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, 0x00) // _ADR: Address Method (^BN00, 0, NotSerialized) { Return (0x00) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BN00 ()) } Name (_UID, 0x00) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR00) /* \_SB_.AR00 */ } Return (PR00) /* \_SB_.PR00 */ } Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Name (SUPP, 0x00) Name (CTRL, 0x00) CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } Local0 = _BBN () If ((Local0 == 0x00)) { If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (^XHCI.POSC (Arg1, Arg2, Arg3)) } } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^BR1A.OSHP () ^BR1B.OSHP () ^BR2A.OSHP () ^BR2B.OSHP () ^BR2C.OSHP () ^BR2D.OSHP () ^BR3A.OSHP () ^BR3B.OSHP () ^BR3C.OSHP () ^BR3D.OSHP () Local1 = (IIOH >> 0x01) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () } Local1 = (IIOH >> 0x02) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () } Local1 = (IIOH >> 0x03) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () } GPSH = 0x01 } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI0._OSC.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } } Name (SUPP, 0x00) Name (CTRL, 0x00) Name (_PXM, 0x00) // _PXM: Device Proximity Device (APIC) { Name (_HID, EisaId ("PNP0003") /* IO-APIC Interrupt Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFEC00000, // Address Base 0x00100000, // Address Length ) }) } Device (IIOP) { Name (_ADR, 0x00) // _ADR: Address Name (_UID, "PCI0PRES") // _UID: Unique ID OperationRegion (IIOR, PCI_Config, 0x00, 0x02) Field (IIOR, ByteAcc, NoLock, Preserve) { VID0, 16 } } Name (P0RS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FE, // Range Maximum 0x0000, // Translation Offset 0x00FF, // Length ,, ) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x0000, // Range Minimum 0x0CF7, // Range Maximum 0x0000, // Translation Offset 0x0CF8, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x1000, // Range Minimum 0xFFFF, // Range Maximum 0x0000, // Translation Offset 0xF000, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity 0xC0000000, // Range Minimum 0xFBFFBFFF, // Range Maximum 0x00000000, // Translation Offset 0x3BFFC000, // Length ,, _Y00, AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000000, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) OperationRegion (TMEM, PCI_Config, 0x00, 0x0100) Field (TMEM, ByteAcc, NoLock, Preserve) { Offset (0x40), , 4, BSEG, 4, PAMS, 48, Offset (0x52), DIM0, 4, DIM1, 4, Offset (0x54), DIM2, 4 } Name (MTBL, Package (0x10) { 0x00, 0x20, 0x20, 0x30, 0x40, 0x40, 0x60, 0x80, 0x80, 0x80, 0x80, 0xC0, 0x0100, 0x0100, 0x0100, 0x0200 }) Name (ERNG, Package (0x0D) { 0x000C0000, 0x000C4000, 0x000C8000, 0x000CC000, 0x000D0000, 0x000D4000, 0x000D8000, 0x000DC000, 0x000E0000, 0x000E4000, 0x000E8000, 0x000EC000, 0x000F0000 }) Name (PAMB, Buffer (0x07){}) Method (EROM, 0, NotSerialized) { CreateDWordField (P0RS, \_SB.PCI0._Y00._MIN, RMIN) // _MIN: Minimum Base Address CreateDWordField (P0RS, \_SB.PCI0._Y00._MAX, RMAX) // _MAX: Maximum Base Address CreateDWordField (P0RS, \_SB.PCI0._Y00._LEN, RLEN) // _LEN: Length CreateByteField (PAMB, 0x06, BREG) PAMB = PAMS /* \_SB_.PCI0.PAMS */ BREG = BSEG /* \_SB_.PCI0.BSEG */ RMIN = 0x00 RMAX = 0x00 RLEN = 0x00 Local0 = 0x00 While ((Local0 < 0x0D)) { Local1 = (Local0 >> 0x01) Local2 = DerefOf (PAMB [Local1]) If ((Local0 & 0x01)) { Local2 >>= 0x04 } Local2 &= 0x03 If (RMIN) { If (Local2) { RMAX = (DerefOf (ERNG [Local0]) + 0x3FFF) If ((RMAX == 0x000F3FFF)) { RMAX = 0x000FFFFF } RLEN = (RMAX - RMIN) /* \_SB_.PCI0.EROM.RMIN */ RLEN++ } Else { Local0 = 0x0C } } ElseIf (Local2) { RMIN = DerefOf (ERNG [Local0]) RMAX = (DerefOf (ERNG [Local0]) + 0x3FFF) If ((RMAX == 0x000F3FFF)) { RMAX = 0x000FFFFF } RLEN = (RMAX - RMIN) /* \_SB_.PCI0.EROM.RMIN */ RLEN++ } Else { } Local0++ } } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (P0RS) /* \_SB_.PCI0.P0RS */ } Device (MHP0) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "00-00") // _UID: Unique ID OperationRegion (MHP0, PCI_Config, 0x00, 0x0100) Field (MHP0, ByteAcc, NoLock, Preserve) { Offset (0x0E), STM0, 7 } } Device (MHP1) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "00-01") // _UID: Unique ID OperationRegion (MHP1, PCI_Config, 0x00, 0x0100) Field (MHP1, ByteAcc, NoLock, Preserve) { Offset (0x1E), STM1, 7 } } Device (LPC0) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (LPCB, PCI_Config, 0x00, 0x0100) Field (LPCB, DWordAcc, NoLock, Preserve) { Offset (0x4C), GLE0, 1, Offset (0xAC), Offset (0xAE), XSMB, 1 } Device (DMAC) { Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0087, // Range Minimum 0x0087, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0089, // Range Minimum 0x0089, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x008F, // Range Minimum 0x008F, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x00, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8, ) {4} }) } Device (RTC) { Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0074, // Range Minimum 0x0074, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {8} }) } Device (PIC) { Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x1E, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x1E, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) }) } Device (FPU) { Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) } Device (TMR) { Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) } Device (SPKR) { Name (_HID, EisaId ("PNP0800") /* Microsoft Sound System Compatible Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID OperationRegion (HPTC, SystemMemory, 0xFED1F404, 0x04) Field (HPTC, DWordAcc, NoLock, Preserve) { HPTS, 2, , 5, HPTE, 1, Offset (0x04) } Method (_STA, 0, NotSerialized) // _STA: Status { If (HPTE) { Return (0x0F) } Else { Return (0x00) } } Name (CRS0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00000400, // Address Length ) }) Name (CRS1, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED01000, // Address Base 0x00000400, // Address Length ) }) Name (CRS2, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED02000, // Address Base 0x00000400, // Address Length ) }) Name (CRS3, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED03000, // Address Base 0x00000400, // Address Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Switch (ToInteger (HPTS)) { Case (0x00) { Return (CRS0) /* \_SB_.PCI0.LPC0.HPET.CRS0 */ } Case (0x01) { Return (CRS1) /* \_SB_.PCI0.LPC0.HPET.CRS1 */ } Case (0x02) { Return (CRS2) /* \_SB_.PCI0.LPC0.HPET.CRS2 */ } Case (0x03) { Return (CRS3) /* \_SB_.PCI0.LPC0.HPET.CRS3 */ } } Return (CRS0) /* \_SB_.PCI0.LPC0.HPET.CRS0 */ } } Device (XTRA) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x10) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0500, // Range Minimum 0x0500, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x0400, // Range Minimum 0x0400, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x01, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x01, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x0580, // Range Minimum 0x0580, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0600, // Range Minimum 0x0600, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0880, // Range Minimum 0x0880, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0800, // Range Minimum 0x0800, // Range Maximum 0x01, // Alignment 0x20, // Length ) Memory32Fixed (ReadOnly, 0xFED1C000, // Address Base 0x00024000, // Address Length ) Memory32Fixed (ReadOnly, 0xFED45000, // Address Base 0x00047000, // Address Length ) Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) Memory32Fixed (ReadOnly, 0xFEE00000, // Address Base 0x00100000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED12000, // Address Base 0x00000010, // Address Length ) Memory32Fixed (ReadWrite, 0xFED12010, // Address Base 0x00000010, // Address Length ) Memory32Fixed (ReadOnly, 0xFED1B000, // Address Base 0x00001000, // Address Length ) }) } OperationRegion (LPCR, PCI_Config, 0x80, 0x04) Field (LPCR, ByteAcc, NoLock, Preserve) { CADR, 3, , 1, CBDR, 3, Offset (0x01), LTDR, 2, , 2, FDDR, 1, Offset (0x02), CALE, 1, CBLE, 1, LTLE, 1, FDLE, 1, Offset (0x03), GLLE, 1, GHLE, 1, KCLE, 1, MCLE, 1, C1LE, 1, C2LE, 1, Offset (0x04) } OperationRegion (SMIE, SystemIO, PMBA, 0x04) Field (SMIE, ByteAcc, NoLock, Preserve) { , 10, RTCS, 1, , 3, PEXS, 1, WAKS, 1, Offset (0x03), PWBT, 1, Offset (0x04) } OperationRegion (SLPR, SystemIO, SMCR, 0x08) Field (SLPR, ByteAcc, NoLock, Preserve) { , 4, SLPE, 1, , 31, SLPX, 1, Offset (0x08) } Method (UXDV, 1, Serialized) { Local0 = 0xFF Switch ((Arg0 + 0x00)) { Case (0x03F8) { Local0 = 0x00 } Case (0x02F8) { Local0 = 0x01 } Case (0x0220) { Local0 = 0x02 } Case (0x0228) { Local0 = 0x03 } Case (0x0238) { Local0 = 0x04 } Case (0x02E8) { Local0 = 0x05 } Case (0x0338) { Local0 = 0x06 } Case (0x03E8) { Local0 = 0x07 } } Return (Local0) } Method (RRIO, 4, Serialized) { Switch ((Arg0 + 0x00)) { Case (0x00) { CALE = 0x00 Local0 = UXDV (Arg2) If ((Local0 != 0xFF)) { CADR = Local0 } If (Arg1) { CALE = 0x01 } } Case (0x01) { CBLE = 0x00 Local0 = UXDV (Arg2) If ((Local0 != 0xFF)) { CBDR = Local0 } If (Arg1) { CBLE = 0x01 } } Case (0x02) { LTLE = 0x00 If ((Arg2 == 0x0378)) { LTDR = 0x00 } If ((Arg2 == 0x0278)) { LTDR = 0x01 } If ((Arg2 == 0x03BC)) { LTDR = 0x02 } If (Arg1) { LTLE = 0x01 } } Case (0x03) { FDLE = 0x00 If ((Arg2 == 0x03F0)) { FDDR = 0x00 } If ((Arg2 == 0x0370)) { FDDR = 0x01 } If (Arg1) { FDLE = 0x01 } } Case (0x08) { If ((Arg2 == 0x0200)) { If (Arg1) { GLLE = 0x01 } Else { GLLE = 0x00 } } If ((Arg2 == 0x0208)) { If (Arg1) { GHLE = 0x01 } Else { GHLE = 0x00 } } } Case (0x09) { If ((Arg2 == 0x0200)) { If (Arg1) { GLLE = 0x01 } Else { GLLE = 0x00 } } If ((Arg2 == 0x0208)) { If (Arg1) { GHLE = 0x01 } Else { GHLE = 0x00 } } } Case (0x0A) { If (((Arg2 == 0x60) || (Arg2 == 0x64))) { If (Arg1) { KCLE = 0x01 } Else { KCLE = 0x00 } } } Case (0x0B) { If (((Arg2 == 0x62) || (Arg2 == 0x66))) { If (Arg1) { MCLE = 0x01 } Else { MCLE = 0x00 } } } Case (0x0C) { If ((Arg2 == 0x2E)) { If (Arg1) { C1LE = 0x01 } Else { C1LE = 0x00 } } If ((Arg2 == 0x4E)) { If (Arg1) { C2LE = 0x01 } Else { C2LE = 0x00 } } } Case (0x0D) { If ((Arg2 == 0x2E)) { If (Arg1) { C1LE = 0x01 } Else { C1LE = 0x00 } } If ((Arg2 == 0x4E)) { If (Arg1) { C2LE = 0x01 } Else { C2LE = 0x00 } } } } } Method (RDMA, 3, NotSerialized) { } Method (SPTS, 1, NotSerialized) { SLPX = One SLPE = One } Method (SWAK, 1, NotSerialized) { SLPE = Zero If (RTCS){} Else { Notify (PWRB, 0x02) // Device Wake } } Device (SIO1) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y01) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y02) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y03) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y04) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y05) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If (((SP1O < 0x03F0) && (SP1O > 0xF0))) { CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y01._MIN, GPI0) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y01._MAX, GPI1) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPC0.SIO1._Y01._LEN, GPIL) // _LEN: Length GPI0 = SP1O /* \SP1O */ GPI1 = SP1O /* \SP1O */ GPIL = 0x02 } If (IO1B) { CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y02._MIN, GP10) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y02._MAX, GP11) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPC0.SIO1._Y02._LEN, GPL1) // _LEN: Length GP10 = IO1B /* \IO1B */ GP11 = IO1B /* \IO1B */ GPL1 = IO1L /* \IO1L */ } If (IO2B) { CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y03._MIN, GP20) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y03._MAX, GP21) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPC0.SIO1._Y03._LEN, GPL2) // _LEN: Length GP20 = IO2B /* \IO2B */ GP21 = IO2B /* \IO2B */ GPL2 = IO2L /* \IO2L */ } If (IO3B) { CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y04._MIN, GP30) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y04._MAX, GP31) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPC0.SIO1._Y04._LEN, GPL3) // _LEN: Length GP30 = IO3B /* \IO3B */ GP31 = IO3B /* \IO3B */ GPL3 = IO3L /* \IO3L */ } If (IO4B) { CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y05._MIN, GP40) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPC0.SIO1._Y05._MAX, GP41) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPC0.SIO1._Y05._LEN, GPL4) // _LEN: Length GP40 = IO4B /* \IO4B */ GP41 = IO4B /* \IO4B */ GPL4 = IO4L /* \IO4L */ } Return (CRS) /* \_SB_.PCI0.LPC0.SIO1.CRS_ */ } Name (DCAT, Package (0x15) { 0x02, 0x03, 0x01, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x05, 0xFF, 0xFF, 0xFF, 0x05, 0xFF, 0x06, 0xFF, 0xFF, 0xFF, 0xFF }) Mutex (MUT0, 0x00) Method (ENFG, 1, NotSerialized) { Acquire (MUT0, 0x0FFF) INDX = ENTK /* \ENTK */ INDX = ENTK /* \ENTK */ LDN = Arg0 } Method (EXFG, 0, NotSerialized) { INDX = EXTK /* \EXTK */ Release (MUT0) } Method (LPTM, 1, NotSerialized) { ENFG (CGLD (Arg0)) Local0 = (OPT0 & 0x02) EXFG () Return (Local0) } Method (UHID, 1, NotSerialized) { ENFG (CGLD (Arg0)) Local0 = (OPT0 & 0x10) EXFG () If (Local0) { Return (0x1005D041) } Else { Return (0x0105D041) } } OperationRegion (IOID, SystemIO, SP1O, 0x02) Field (IOID, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x21), SCF1, 8, SCF2, 8, SCF3, 8, SCF4, 8, SCF5, 8, SCF6, 8, Offset (0x29), CKCF, 8, Offset (0x30), ACTR, 8, Offset (0x60), IOAH, 8, IOAL, 8, IOH2, 8, IOL2, 8, Offset (0x70), INTR, 4, INTT, 4, Offset (0x74), DMCH, 8, Offset (0xE0), RGE0, 8, RGE1, 8, RGE2, 8, RGE3, 8, RGE4, 8, RGE5, 8, RGE6, 8, RGE7, 8, RGE8, 8, RGE9, 8, Offset (0xF0), OPT0, 8, OPT1, 8, OPT2, 8, OPT3, 8, OPT4, 8, OPT5, 8, OPT6, 8, OPT7, 8, OPT8, 8, OPT9, 8 } Method (CGLD, 1, NotSerialized) { Return (DerefOf (DCAT [Arg0])) } Method (DSTA, 1, NotSerialized) { ENFG (CGLD (Arg0)) Local0 = ACTR /* \_SB_.PCI0.LPC0.SIO1.ACTR */ Local1 = ((IOAH << 0x08) | IOAL) /* \_SB_.PCI0.LPC0.SIO1.IOAL */ EXFG () If ((Local0 == 0xFF)) { Return (0x00) } Local0 &= 0x01 If ((Arg0 < 0x10)) { IOST |= (Local0 << Arg0) } If (Local0) { Return (0x0F) } ElseIf ((Arg0 < 0x10)) { If (((0x01 << Arg0) & IOST)) { Return (0x0D) } Else { Return (0x00) } } Else { If (Local1) { Return (0x0D) } Return (0x00) } } Method (DCNT, 2, NotSerialized) { ENFG (CGLD (Arg0)) If (((DMCH < 0x04) && ((Local1 = (DMCH & 0x03)) != 0x00))) { RDMA (Arg0, Arg1, Local1++) } ACTR = Arg1 Local1 = (IOAH << 0x08) Local1 |= IOAL RRIO (Arg0, Arg1, Local1, 0x08) EXFG () } Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y08) IRQNoFlags (_Y06) {} DMA (Compatibility, NotBusMaster, Transfer8, _Y07) {} }) CreateWordField (CRS1, \_SB.PCI0.LPC0.SIO1._Y06._INT, IRQM) // _INT: Interrupts CreateByteField (CRS1, \_SB.PCI0.LPC0.SIO1._Y07._DMA, DMAM) // _DMA: Direct Memory Access CreateWordField (CRS1, \_SB.PCI0.LPC0.SIO1._Y08._MIN, IO11) // _MIN: Minimum Base Address CreateWordField (CRS1, \_SB.PCI0.LPC0.SIO1._Y08._MAX, IO12) // _MAX: Maximum Base Address CreateByteField (CRS1, \_SB.PCI0.LPC0.SIO1._Y08._LEN, LEN1) // _LEN: Length Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0B) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0C) IRQNoFlags (_Y09) {} DMA (Compatibility, NotBusMaster, Transfer8, _Y0A) {} }) CreateWordField (CRS2, \_SB.PCI0.LPC0.SIO1._Y09._INT, IRQE) // _INT: Interrupts CreateByteField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0A._DMA, DMAE) // _DMA: Direct Memory Access CreateWordField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0B._MIN, IO21) // _MIN: Minimum Base Address CreateWordField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0B._MAX, IO22) // _MAX: Maximum Base Address CreateByteField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0B._LEN, LEN2) // _LEN: Length CreateWordField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0C._MIN, IO31) // _MIN: Minimum Base Address CreateWordField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0C._MAX, IO32) // _MAX: Maximum Base Address CreateByteField (CRS2, \_SB.PCI0.LPC0.SIO1._Y0C._LEN, LEN3) // _LEN: Length Name (CRS3, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0F) IRQ (Level, ActiveLow, Shared, _Y0D) {} DMA (Compatibility, NotBusMaster, Transfer8, _Y0E) {} }) CreateWordField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0D._INT, IRQT) // _INT: Interrupts CreateByteField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0D._HE, IRQS) // _HE_: High-Edge CreateByteField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0E._DMA, DMAT) // _DMA: Direct Memory Access CreateWordField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0F._MIN, IO41) // _MIN: Minimum Base Address CreateWordField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0F._MAX, IO42) // _MAX: Maximum Base Address CreateByteField (CRS3, \_SB.PCI0.LPC0.SIO1._Y0F._LEN, LEN4) // _LEN: Length Method (DCRS, 2, NotSerialized) { ENFG (CGLD (Arg0)) IO11 = (IOAH << 0x08) IO11 |= IOAL /* \_SB_.PCI0.LPC0.SIO1.IO11 */ IO12 = IO11 /* \_SB_.PCI0.LPC0.SIO1.IO11 */ LEN1 = 0x08 If (INTR) { IRQM = (0x01 << INTR) /* \_SB_.PCI0.LPC0.SIO1.INTR */ } Else { IRQM = 0x00 } If (((DMCH > 0x03) || (Arg1 == 0x00))) { DMAM = 0x00 } Else { Local1 = (DMCH & 0x03) DMAM = (0x01 << Local1) } EXFG () Return (CRS1) /* \_SB_.PCI0.LPC0.SIO1.CRS1 */ } Method (DCR2, 2, NotSerialized) { ENFG (CGLD (Arg0)) IO21 = (IOAH << 0x08) IO21 |= IOAL /* \_SB_.PCI0.LPC0.SIO1.IO21 */ IO22 = IO21 /* \_SB_.PCI0.LPC0.SIO1.IO21 */ LEN2 = 0x08 IO31 = (IOH2 << 0x08) IO31 |= IOL2 /* \_SB_.PCI0.LPC0.SIO1.IO31 */ IO32 = IO31 /* \_SB_.PCI0.LPC0.SIO1.IO31 */ LEN3 = 0x08 If (INTR) { IRQE = (0x01 << INTR) /* \_SB_.PCI0.LPC0.SIO1.INTR */ } Else { IRQE = 0x00 } If (((DMCH > 0x03) || (Arg1 == 0x00))) { DMAE = 0x00 } Else { Local1 = (DMCH & 0x03) DMAE = (0x01 << Local1) } EXFG () Return (CRS2) /* \_SB_.PCI0.LPC0.SIO1.CRS2 */ } Method (DCR3, 2, NotSerialized) { ENFG (CGLD (Arg0)) IO41 = (IOAH << 0x08) IO41 |= IOAL /* \_SB_.PCI0.LPC0.SIO1.IO41 */ IO42 = IO41 /* \_SB_.PCI0.LPC0.SIO1.IO41 */ LEN4 = 0x08 If (INTR) { IRQT = (0x01 << INTR) /* \_SB_.PCI0.LPC0.SIO1.INTR */ } Else { IRQT = 0x00 } If (((DMCH > 0x03) || (Arg1 == 0x00))) { DMAT = 0x00 } Else { Local1 = (DMCH & 0x03) DMAT = (0x01 << Local1) } EXFG () Return (CRS3) /* \_SB_.PCI0.LPC0.SIO1.CRS3 */ } Method (DSRS, 2, NotSerialized) { If (((Arg1 == 0x02) & LPTM (Arg1))) { DSR2 (Arg0, Arg1) } Else { CreateWordField (Arg0, 0x09, IRQM) CreateByteField (Arg0, 0x0C, DMAM) CreateWordField (Arg0, 0x02, IO11) ENFG (CGLD (Arg1)) IOAL = (IO11 & 0xFF) IOAH = (IO11 >> 0x08) If (IRQM) { FindSetRightBit (IRQM, Local0) INTR = (Local0 - 0x01) } Else { INTR = 0x00 } If (DMAM) { FindSetRightBit (DMAM, Local0) DMCH = (Local0 - 0x01) } Else { DMCH = 0x04 } EXFG () DCNT (Arg1, 0x01) Local2 = Arg1 If ((Local2 > 0x00)) { Local2 -= 0x01 } } } Method (DSR2, 2, NotSerialized) { CreateWordField (Arg0, 0x11, IRQE) CreateByteField (Arg0, 0x14, DMAE) CreateWordField (Arg0, 0x02, IO21) CreateWordField (Arg0, 0x0A, IO31) ENFG (CGLD (Arg1)) IOAL = (IO21 & 0xFF) IOAH = (IO21 >> 0x08) IOL2 = (IO31 & 0xFF) IOH2 = (IO31 >> 0x08) If (IRQE) { FindSetRightBit (IRQE, Local0) INTR = (Local0 - 0x01) } Else { INTR = 0x00 } If (DMAE) { FindSetRightBit (DMAE, Local0) DMCH = (Local0 - 0x01) } Else { DMCH = 0x04 } EXFG () DCNT (Arg1, 0x01) Local2 = Arg1 If ((Local2 > 0x00)) { Local2 -= 0x01 } } Method (DSR3, 2, NotSerialized) { CreateWordField (Arg0, 0x02, IO41) CreateWordField (Arg0, 0x09, IRQT) CreateByteField (Arg0, 0x0B, IRQS) CreateByteField (Arg0, 0x0D, DMAT) ENFG (CGLD (Arg1)) IOAL = (IO41 & 0xFF) IOAH = (IO41 >> 0x08) If (IRQT) { FindSetRightBit (IRQT, Local0) INTR = (Local0 - 0x01) } Else { INTR = 0x00 } If (DMAT) { FindSetRightBit (DMAT, Local0) DMCH = (Local0 - 0x01) } Else { DMCH = 0x04 } EXFG () DCNT (Arg1, 0x01) Local2 = Arg1 If ((Local2 > 0x00)) { Local2 -= 0x01 } } Name (PMFG, 0x00) Method (SIOS, 1, NotSerialized) { Debug = "SIOS" If ((0x05 != Arg0)) { ENFG (0x0A) If ((Arg0 == One)) { OPT6 &= 0xCF If (KBFG) { OPT6 |= 0x10 } Else { OPT6 &= 0xEF } If (MSFG) { OPT6 |= 0x20 } Else { OPT6 &= 0xDF } OPT3 = 0xFF OPT4 = 0xFF OPT2 |= 0x01 } If ((Arg0 >= 0x03)) { RGE0 &= 0x9F Local0 = RGE3 /* \_SB_.PCI0.LPC0.SIO1.RGE3 */ Sleep (0xC8) If (KBFG) { RGE0 |= 0x41 } Else { RGE0 &= 0xBE } If (MSFG) { RGE0 |= 0x22 } Else { RGE0 &= 0xDD } RGE4 |= 0x01 } EXFG () } } Method (SIOW, 1, NotSerialized) { Debug = "SIOW" ENFG (0x0A) If ((Arg0 == One)) { PMFG = OPT3 /* \_SB_.PCI0.LPC0.SIO1.OPT3 */ OPT3 = 0xFF OPT6 &= 0xCF OPT2 &= 0xFE } If ((Arg0 >= 0x03)) { PMFG = RGE3 /* \_SB_.PCI0.LPC0.SIO1.RGE3 */ Local0 = RGE3 /* \_SB_.PCI0.LPC0.SIO1.RGE3 */ RGE0 &= 0x9F RGE4 &= 0xFE } EXFG () } Method (SIOH, 0, NotSerialized) { If ((PMFG & 0x08)){} If ((PMFG & 0x10)){} } } Device (PS2K) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (LDN, 0x05) Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((IOST & 0x0400)) { Return (0x0F) } Else { Return (0x00) } } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {1} }) Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {1} } EndDependentFn () }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { KBFG = Arg0 } Scope (\) { Name (KBFG, 0x01) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x1D, 0x03)) } } Device (PS2M) { Name (_HID, EisaId ("PNP0F03") /* Microsoft PS/2-style Mouse */) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (LDN, 0x05) Name (_CID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _CID: Compatible ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((IOST & 0x4000)) { Return (0x0F) } Else { Return (0x00) } } Name (CRS1, ResourceTemplate () { IRQNoFlags () {12} }) Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {12} }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If ((IOST & 0x0400)) { Return (CRS1) /* \_SB_.PCI0.LPC0.PS2M.CRS1 */ } Else { Return (CRS2) /* \_SB_.PCI0.LPC0.PS2M.CRS2 */ } } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { StartDependentFn (0x00, 0x00) { IRQNoFlags () {12} } EndDependentFn () }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { MSFG = Arg0 } Scope (\) { Name (MSFG, 0x01) } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x1D, 0x03)) } } Device (HHMD) { Name (_HID, EisaId ("PNP0C08") /* ACPI Core Hardware */) // _HID: Hardware ID Name (_UID, 0x00) // _UID: Unique ID Name (LDN, 0x0B) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x00) } } } Device (IP2P) { Name (_ADR, 0x001E0000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0B, 0x03)) } } Device (SAT2) { Name (_ADR, 0x001F0005) // _ADR: Address OperationRegion (IDER, PCI_Config, 0x40, 0x20) Field (IDER, AnyAcc, NoLock, Preserve) { PFT0, 1, PIE0, 1, PPE0, 1, PDE0, 1, PFT1, 1, PIE1, 1, PPE1, 1, PDE1, 1, PRT0, 2, , 2, PIP0, 2, PSIT, 1, PIDE, 1, SFT0, 1, SIE0, 1, SPE0, 1, SDE0, 1, SFT1, 1, SIE1, 1, SPE1, 1, SDE1, 1, SRT0, 2, , 2, SIP0, 2, SSIT, 1, SIDE, 1, PRT1, 2, PIP1, 2, SRT1, 2, SIP1, 2, Offset (0x08), UDM0, 1, UDM1, 1, UDM2, 1, UDM3, 1, Offset (0x0A), PCT0, 2, , 2, PCT1, 2, Offset (0x0B), SCT0, 2, , 2, SCT1, 2, Offset (0x14), PCB0, 1, PCB1, 1, SCB0, 1, SCB1, 1, PCCR, 2, SCCR, 2, , 4, PUM0, 1, PUM1, 1, SUM0, 1, SUM1, 1, PSIG, 2, SSIG, 2 } Method (GPIO, 4, NotSerialized) { If (((Arg0 | Arg1) == 0x00)) { Return (0xFFFFFFFF) } ElseIf (((Arg0 == 0x00) & (Arg1 == 0x01))) { Return (0x0384) } Return ((0x1E * (0x09 - (Arg2 + Arg3)))) } Method (GDMA, 5, NotSerialized) { If ((Arg0 == 0x01)) { If ((Arg1 == 0x01)) { If ((Arg4 == 0x02)) { Return (0x0F) } Return (0x14) } If ((Arg2 == 0x01)) { Return ((0x0F * (0x04 - Arg4))) } Return ((0x1E * (0x04 - Arg4))) } Return (0xFFFFFFFE) } Method (SFLG, 5, NotSerialized) { Local0 = 0x00 Local0 |= Arg1 Local0 |= (Arg0 << 0x01) Local0 |= (Arg2 << 0x03) Local0 |= (Arg3 << 0x02) Local0 |= (Arg4 << 0x04) Return (Local0) } Method (SPIO, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00, 0x00 // ..... }) CreateByteField (PBUF, 0x00, RCT) CreateByteField (PBUF, 0x01, ISP) CreateByteField (PBUF, 0x02, FAST) CreateByteField (PBUF, 0x03, DMAE) CreateByteField (PBUF, 0x04, PIOT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.SAT2.SPIO.PBUF */ } If ((Arg0 > 0xF0)) { DMAE = 0x01 PIOT = 0x00 } Else { FAST = 0x01 If ((Arg1 & 0x02)) { If (((Arg0 == 0x78) & (Arg2 & 0x02))) { RCT = 0x03 ISP = 0x02 PIOT = 0x04 } ElseIf (((Arg0 <= 0xB4) & (Arg2 & 0x01))) { RCT = 0x01 ISP = 0x02 PIOT = 0x03 } Else { RCT = 0x00 ISP = 0x01 PIOT = 0x02 } } } Return (PBUF) /* \_SB_.PCI0.SAT2.SPIO.PBUF */ } Method (SDMA, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (PBUF, 0x00, PCT) CreateByteField (PBUF, 0x01, PCB) CreateByteField (PBUF, 0x02, UDMT) CreateByteField (PBUF, 0x03, UDME) CreateByteField (PBUF, 0x04, DMAT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.SAT2.SDMA.PBUF */ } If ((Arg0 <= 0x78)) { If ((Arg1 & 0x04)) { UDME = 0x01 If (((Arg0 == 0x0F) & (Arg2 & 0x40))) { UDMT = 0x01 PCB = 0x01 PCT = 0x02 DMAT = 0x06 } ElseIf (((Arg0 == 0x14) & (Arg2 & 0x20))) { UDMT = 0x01 PCB = 0x01 PCT = 0x01 DMAT = 0x05 } ElseIf (((Arg0 <= 0x1E) & (Arg2 & 0x10))) { PCB = 0x01 PCT = 0x02 DMAT = 0x04 } ElseIf (((Arg0 <= 0x2D) & (Arg2 & 0x08))) { PCB = 0x01 PCT = 0x01 DMAT = 0x03 } ElseIf (((Arg0 <= 0x3C) & (Arg2 & 0x04))) { PCT = 0x02 DMAT = 0x02 } ElseIf (((Arg0 <= 0x5A) & (Arg2 & 0x02))) { PCT = 0x01 DMAT = 0x01 } ElseIf (((Arg0 <= 0x78) & (Arg2 & 0x01))) { DMAT = 0x00 } } } Return (PBUF) /* \_SB_.PCI0.SAT2.SDMA.PBUF */ } Device (PRID) { Name (_ADR, 0x00) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (PFT0, PDE0, PRT0, PIP0) If ((PSIT & 0x01)) { PIO1 = GPIO (PFT1, PDE1, PRT1, PIP1) } Else { PIO1 = GPIO (PFT1, PDE1, PRT0, PIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT2.PRID._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM0, PUM0, PCB0, (PCCR & 0x01), PCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT2.PRID._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT2.PRID._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM1, PUM1, PCB1, (PCCR & 0x02), PCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT2.PRID._GTM.PIO1 */ } } FLAG = SFLG (PIE0, UDM0, PIE1, UDM1, 0x01) Return (PBUF) /* \_SB_.PCI0.SAT2.PRID._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { PSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { PRT0 = RCT /* \_SB_.PCI0.SAT2.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.SAT2.PRID._STM.ISP_ */ PFT0 = FAST /* \_SB_.PCI0.SAT2.PRID._STM.FAST */ PDE0 = DMAE /* \_SB_.PCI0.SAT2.PRID._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.SAT2.PRID._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) If ((DMAE | FAST)) { PFT1 = FAST /* \_SB_.PCI0.SAT2.PRID._STM.FAST */ PDE1 = DMAE /* \_SB_.PCI0.SAT2.PRID._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.SAT2.PRID._STM.TPIO */ If ((PSIT & 0x01)) { PRT1 = RCT /* \_SB_.PCI0.SAT2.PRID._STM.RCT_ */ PIP1 = ISP /* \_SB_.PCI0.SAT2.PRID._STM.ISP_ */ } Else { PRT0 = RCT /* \_SB_.PCI0.SAT2.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.SAT2.PRID._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) PCT0 = PCT /* \_SB_.PCI0.SAT2.PRID._STM.PCT_ */ PCB0 = PCB /* \_SB_.PCI0.SAT2.PRID._STM.PCB_ */ UDM0 = UDME /* \_SB_.PCI0.SAT2.PRID._STM.UDME */ PUM0 = UDMT /* \_SB_.PCI0.SAT2.PRID._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.SAT2.PRID._STM.TDMA */ } Else { UDM0 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) PCT1 = PCT /* \_SB_.PCI0.SAT2.PRID._STM.PCT_ */ PCB1 = PCB /* \_SB_.PCI0.SAT2.PRID._STM.PCB_ */ UDM1 = UDME /* \_SB_.PCI0.SAT2.PRID._STM.UDME */ PUM1 = UDMT /* \_SB_.PCI0.SAT2.PRID._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.SAT2.PRID._STM.TDMA */ } Else { UDM1 = 0x00 } If ((FLAG & 0x02)) { PIE0 = 0x01 } If ((FLAG & 0x08)) { PIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.SAT2.PRID.TPI0 */ PIO0 |= 0x08 If ((UDM0 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.SAT2.PRID.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.SAT2.PRID.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.SAT2.PRID.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.SAT2.PRID.TPI1 */ PIO1 |= 0x08 If ((UDM1 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.SAT2.PRID.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.SAT2.PRID.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.SAT2.PRID.SLAV._GTF.ATA1 */ } } } Device (SECD) { Name (_ADR, 0x01) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Name (DMT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (DMT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (STMI, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (SFT0, SDE0, SRT0, SIP0) If ((SSIT & 0x01)) { PIO1 = GPIO (SFT1, SDE1, SRT1, SIP1) } Else { PIO1 = GPIO (SFT1, SDE1, SRT0, SIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT2.SECD._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM2, SUM0, SCB0, (SCCR & 0x01), SCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT2.SECD._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT2.SECD._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM3, SUM1, SCB1, (SCCR & 0x02), SCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT2.SECD._GTM.PIO1 */ } } FLAG = SFLG (SIE0, UDM2, SIE1, UDM3, 0x01) Return (PBUF) /* \_SB_.PCI0.SAT2.SECD._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) STMI = Arg0 CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { SSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { SRT0 = RCT /* \_SB_.PCI0.SAT2.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.SAT2.SECD._STM.ISP_ */ SFT0 = FAST /* \_SB_.PCI0.SAT2.SECD._STM.FAST */ SDE0 = DMAE /* \_SB_.PCI0.SAT2.SECD._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.SAT2.SECD._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) POT2 = IOTM /* \_SB_.PCI0.SAT2.SECD._STM.IOTM */ If ((DMAE | FAST)) { SFT1 = FAST /* \_SB_.PCI0.SAT2.SECD._STM.FAST */ SDE1 = DMAE /* \_SB_.PCI0.SAT2.SECD._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.SAT2.SECD._STM.TPIO */ If ((SSIT & 0x01)) { SRT1 = RCT /* \_SB_.PCI0.SAT2.SECD._STM.RCT_ */ SIP1 = ISP /* \_SB_.PCI0.SAT2.SECD._STM.ISP_ */ } Else { SRT0 = RCT /* \_SB_.PCI0.SAT2.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.SAT2.SECD._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) SCT0 = PCT /* \_SB_.PCI0.SAT2.SECD._STM.PCT_ */ SCB0 = PCB /* \_SB_.PCI0.SAT2.SECD._STM.PCB_ */ UDM2 = UDME /* \_SB_.PCI0.SAT2.SECD._STM.UDME */ SUM0 = UDMT /* \_SB_.PCI0.SAT2.SECD._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.SAT2.SECD._STM.TDMA */ } Else { UDM2 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) SCT1 = PCT /* \_SB_.PCI0.SAT2.SECD._STM.PCT_ */ SCB1 = PCB /* \_SB_.PCI0.SAT2.SECD._STM.PCB_ */ UDM3 = UDME /* \_SB_.PCI0.SAT2.SECD._STM.UDME */ SUM1 = UDMT /* \_SB_.PCI0.SAT2.SECD._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.SAT2.SECD._STM.TDMA */ } Else { UDM3 = 0x00 } If ((FLAG & 0x02)) { SIE0 = 0x01 } If ((FLAG & 0x08)) { SIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.SAT2.SECD.TPI0 */ PIO0 |= 0x08 If ((UDM2 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.SAT2.SECD.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.SAT2.SECD.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.SAT2.SECD.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.SAT2.SECD.TPI1 */ PIO1 |= 0x08 If ((UDM3 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.SAT2.SECD.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.SAT2.SECD.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.SAT2.SECD.SLAV._GTF.ATA1 */ } } } } Device (SMBS) { Name (_ADR, 0x001F0003) // _ADR: Address } Device (TERM) { Name (_ADR, 0x001F0006) // _ADR: Address } Device (XHCI) { Name (_ADR, 0x00140000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } Name (OPAC, 0x00) Name (XRST, 0x00) Name (XUSB, 0x00) OperationRegion (XPRT, PCI_Config, 0x74, 0x6C) Field (XPRT, DWordAcc, NoLock, Preserve) { Offset (0x01), PMEE, 1, , 6, PMES, 1, Offset (0x5C), PR2, 32, PR2M, 32, PR3, 32, PR3M, 32 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { PMEE = 0x01 } Else { PMEE = 0x00 } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x02)) { If ((Arg1 == 0x01)) { OPAC = 0x01 } Else { OPAC = 0x00 } } } Method (_INI, 0, NotSerialized) // _INI: Initialize { If ((OPAC == 0x01)) { PMES = 0x01 PMEE = 0x00 } } Method (POSC, 3, NotSerialized) { CreateDWordField (Arg2, 0x00, CDW1) CreateDWordField (Arg2, 0x04, CDW2) CreateDWordField (Arg2, 0x08, CDW3) If (((OSYS >= 0x09) && (OSYS <= 0x0C))) { If ((Arg0 < 0x02)) { CDW1 |= 0x08 } } ElseIf ((Arg0 != 0x01)) { CDW1 |= 0x08 } If ((XHMD == 0x00)) { CDW1 |= 0x02 } If (((CDW1 & 0x0E) == 0x00)) { If (!(CDW1 & 0x01)) { If ((CDW3 & 0x01)) { ESEL () XHMD = 0x00 } If ((CDW2 & 0x01)) { XSEL (0x00) } Else { ESEL () } } } Return (Arg2) } Method (XSEL, 1, Serialized) { If ((((XHMD == 0x02) || (XHMD == 0x03)) || Arg0)) { If ((XHMD == 0x03)) { ^^LPC0.XSMB = 0x01 } XUSB = 0x01 XRST = 0x01 Local0 = 0x00 Local0 = (PR3 & 0xFFFFFFC0) PR3 = (Local0 | PR3M) /* \_SB_.PCI0.XHCI.PR3M */ Local0 = 0x00 Local0 = (PR2 & 0xFFFF8000) PR2 = (Local0 | PR2M) /* \_SB_.PCI0.XHCI.PR2M */ } } Method (ESEL, 0, Serialized) { If (((XHMD == 0x02) || (XHMD == 0x03))) { PR3 &= 0xFFFFFFC0 PR2 &= 0xFFFF8000 XUSB = 0x00 XRST = 0x00 } } Method (XWAK, 0, Serialized) { If (((XUSB == 0x01) || (XRST == 0x01))) { XSEL (0x01) Notify (XHCI, 0x00) // Bus Check } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (RHUB) { Name (_ADR, 0x00) // _ADR: Address Device (HS01) { Name (_ADR, 0x01) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { If ((PLAT == 0x1B)) { UPCP [0x00] = 0x00 } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If ((PLAT == 0x05)) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS01._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x80, 0x00, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x05 } If ((PLAT == 0x00)) { VISB = One PANL = 0x0C } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x05 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { PANL = 0x08 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS01._PLD.PLDP */ } } Device (HS02) { Name (_ADR, 0x02) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)){} Else { UPCP [0x00] = 0x00 If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If ((PLAT == 0x05)) { UPCP [0x00] = 0xFF } If ((PLAT == 0x1B)) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS02._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x0C } If ((PLAT == 0x00)) { VISB = One PANL = 0x05 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x05 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 } If ((PLAT == 0x1B)) { VISB = One PANL = 0x28 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS02._PLD.PLDP */ } } Device (HS03) { Name (_ADR, 0x03) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x03) { UPCP [0x00] = 0x00 } Case (0x04) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS03._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x81, 0x01, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x2E } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS03._PLD.PLDP */ } } Device (HS04) { Name (_ADR, 0x04) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x00) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If ((PLAT == 0x01)) { UPCP [0x00] = 0xFF } If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If ((PLAT == 0x05)) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS04._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x05 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { PANL = 0x03 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS04._PLD.PLDP */ } } Device (HS05) { Name (_ADR, 0x05) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { If ((PLAT == 0x1B)) { UPCP [0x00] = 0x00 } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If ((PLAT == 0x05)) { UPCP [0x00] = 0xFF } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS05._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x82, 0x02, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x09) || (PLAT == 0x13))) { PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 } } ElseIf (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS05._PLD.PLDP */ } } Device (HS06) { Name (_ADR, 0x06) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x0A) { UPCP [0x00] = 0x00 } Case (0x0B) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x00) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x00) { UPCP [0x00] = 0x00 } } Case (0x03) { UPCP [0x00] = 0x00 } Case (0x04) { UPCP [0x00] = 0x00 } Case (0x05) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x11) || (PLAT == 0x12))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0F) || (PLAT == 0x10))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS06._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS06._PLD.PLDP */ } } Device (HS07) { Name (_ADR, 0x07) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x00) { If (0x00) { UPCP [0x00] = 0x00 } } Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x00) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x00) { UPCP [0x00] = 0x00 } } Case (0x03) { UPCP [0x00] = 0x00 } Case (0x04) { UPCP [0x00] = 0x00 } Case (0x05) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (0x01) { If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS07._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x83, 0x03, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x15 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x08 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x04 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS07._PLD.PLDP */ } } Device (HS08) { Name (_ADR, 0x08) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x00) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS08._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x04, 0x04, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x08 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x04 } If (((PLAT == 0x03) || (PLAT == 0x04))) { PANL = 0x08 } If ((PLAT == 0x05)) { PANL = 0x08 } If (((PLAT == 0x07) || (PLAT == 0x08))) { PANL = 0x08 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS08._PLD.PLDP */ } } Device (HS09) { Name (_ADR, 0x09) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x0A) { UPCP [0x00] = 0x00 } Case (0x0B) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS09._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x84, 0x04, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { PANL = 0x05 } If (((PLAT == 0x14) || (PLAT == 0x15))) { PANL = 0x05 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x04 } If ((PLAT == 0x05)) { VISB = One PANL = 0x04 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 } } ElseIf (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS09._PLD.PLDP */ } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x84, 0x00, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS09.PRT1._PLD.PLDP */ } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x04, 0x01, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS09.PRT2._PLD.PLDP */ } } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x84, 0x01, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS09.PRT3._PLD.PLDP */ } } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS09.PRT4._PLD.PLDP */ } } } Device (HS10) { Name (_ADR, 0x0A) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x0A) { UPCP [0x00] = 0x00 } Case (0x0B) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS10._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x05, 0x05, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { PANL = 0x05 } If (((PLAT == 0x14) || (PLAT == 0x15))) { PANL = 0x05 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x08 } If ((PLAT == 0x05)) { VISB = One PANL = 0x08 } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x08 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS10._PLD.PLDP */ } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x85, 0x00, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS10.PRT1._PLD.PLDP */ } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x05, 0x01, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS10.PRT2._PLD.PLDP */ } } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x85, 0x01, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS10.PRT3._PLD.PLDP */ } } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x05, 0x02, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS10.PRT4._PLD.PLDP */ } } } Device (HS11) { Name (_ADR, 0x0B) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x00) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x01) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (0x00) { If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS11._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x85, 0x05, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (0x00) { If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x04 } } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x08 } If ((PLAT == 0x05)) { VISB = One PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x05 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { PANL = 0x08 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS11._PLD.PLDP */ } } Device (HS12) { Name (_ADR, 0x0C) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (0x01) { If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS12._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x06, 0x06, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x4C } If (((PLAT == 0x03) || (PLAT == 0x04))) { PANL = 0x08 } If ((PLAT == 0x05)) { PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x08 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 } } ElseIf (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x08 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS12._PLD.PLDP */ } } Device (HS13) { Name (_ADR, 0x0D) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x00) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS13._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0xC1, 0x86, 0x06, 0x01, 0x00, 0x00, 0x00, // @....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { PANL = 0x08 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x08 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x04 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (((PLAT == 0x03) || (PLAT == 0x04))) { PANL = 0x08 } If ((PLAT == 0x05)) { PANL = 0x08 } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { PANL = 0x08 } } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS13._PLD.PLDP */ } } Device (HS14) { Name (_ADR, 0x0E) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x00) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x01) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x11) { UPCP [0x00] = 0x00 } Case (0x12) { UPCP [0x00] = 0x00 } Case (0x07) { If (0x01) { UPCP [0x00] = 0x00 } } Case (0x08) { If (0x01) { UPCP [0x00] = 0x00 } } } } Else { UPCP [0x00] = 0x00 If (((PLAT == 0x13) || (PLAT == 0x16))) { UPCP [0x00] = 0xFF } If (((PLAT == 0x14) || (PLAT == 0x15))) { UPCP [0x00] = 0xFF } If (0x00) { If (((PLAT == 0x00) || (PLAT == 0x01))) { UPCP [0x00] = 0xFF } } If (((PLAT == 0x03) || (PLAT == 0x04))) { UPCP [0x00] = 0xFF } If ((PLAT == 0x05)) { UPCP [0x00] = 0xFF } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { UPCP [0x00] = 0xFF } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { UPCP [0x00] = 0xFF } } If ((PLAT == 0x1B)) { UPCP [0x00] = 0xFF } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.HS14._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x07, 0x07, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (0x00) { If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x04 } } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x04 } If ((PLAT == 0x05)) { VISB = One PANL = 0x04 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x08 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x08 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 } If (0x00) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 } } If ((PLAT == 0x1B)) { VISB = One PANL = 0x20 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.HS14._PLD.PLDP */ } } Device (SSP1) { Name (_ADR, 0x10) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x00) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP1._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x05 GTOK = 0x04 GPOS = 0x04 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x04 GTOK = 0x09 GPOS = 0x09 } If ((PLAT == 0x05)) { VISB = One PANL = 0x04 GTOK = 0x09 GPOS = 0x09 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 GTOK = 0x05 GPOS = 0x05 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 GTOK = 0x0C GPOS = 0x0C } } ElseIf (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 GTOK = 0x0E GPOS = 0x0E } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x01 GPOS = 0x01 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP1._PLD.PLDP */ } } Device (SSP2) { Name (_ADR, 0x11) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) Switch (ToInteger (PLAT)) { Case (0x1B) { UPCP [0x00] = 0x00 } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP2._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x15 GTOK = 0x07 GPOS = 0x07 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x04 GTOK = 0x0E GPOS = 0x0E } If ((PLAT == 0x05)) { VISB = One PANL = 0x04 GTOK = 0x0E GPOS = 0x0E } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (0x01) { If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 GTOK = 0x05 GPOS = 0x05 } } ElseIf (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x04 GTOK = 0x09 GPOS = 0x09 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x02 GPOS = 0x02 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP2._PLD.PLDP */ } } Device (SSP3) { Name (_ADR, 0x12) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x03) { UPCP [0x00] = 0x00 } Case (0x04) { UPCP [0x00] = 0x00 } Case (0x05) { UPCP [0x00] = 0x00 } Case (0x07) { UPCP [0x00] = 0x00 } Case (0x08) { UPCP [0x00] = 0x00 } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP3._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x0C GTOK = 0x01 GPOS = 0x01 } If ((PLAT == 0x00)) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 GTOK = 0x03 GPOS = 0x03 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x04 GTOK = 0x03 GPOS = 0x03 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x03 GPOS = 0x03 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 GTOK = 0x0D GPOS = 0x0D } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x03 GPOS = 0x03 } If ((PLAT == 0x1B)) { VISB = One PANL = 0x28 GTOK = 0x02 GPOS = 0x02 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP3._PLD.PLDP */ } } Device (SSP4) { Name (_ADR, 0x13) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x03) { UPCP [0x00] = 0x00 } Case (0x04) { UPCP [0x00] = 0x00 } Case (0x05) { UPCP [0x00] = 0x00 } Case (0x1B) { UPCP [0x00] = 0x00 } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP4._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x2E GTOK = 0x03 GPOS = 0x03 } If (((PLAT == 0x13) || (PLAT == 0x16))) { VISB = One PANL = 0x04 GTOK = 0x04 GPOS = 0x04 } If (((PLAT == 0x14) || (PLAT == 0x15))) { VISB = One PANL = 0x05 GTOK = 0x04 GPOS = 0x04 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x04 GPOS = 0x04 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x05 GTOK = 0x0E GPOS = 0x0E } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x04 GPOS = 0x04 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x03 GTOK = 0x03 GPOS = 0x03 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP4._PLD.PLDP */ } } Device (SSP5) { Name (_ADR, 0x14) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) If ((OSYS >= 0x0D)) { Switch (ToInteger (PLAT)) { Case (0x1B) { UPCP [0x00] = 0x00 } } } Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP5._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If (((PLAT == 0x00) || (PLAT == 0x01))) { VISB = One PANL = 0x4C GTOK = 0x0C GPOS = 0x0C } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } If (((PLAT == 0x13) || (PLAT == 0x16))) { PANL = 0x05 GTOK = 0x09 GPOS = 0x09 } If (((PLAT == 0x14) || (PLAT == 0x15))) { PANL = 0x05 GTOK = 0x09 GPOS = 0x09 } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x05 GPOS = 0x05 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x04 GTOK = 0x07 GPOS = 0x07 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x05 GPOS = 0x05 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 GTOK = 0x01 GPOS = 0x01 } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP5._PLD.PLDP */ } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x84, 0x00, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP5.PRT1._PLD.PLDP */ } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x04, 0x01, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP5.PRT2._PLD.PLDP */ } } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x84, 0x01, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP5.PRT3._PLD.PLDP */ } } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0xC1, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, // i....... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP5.PRT4._PLD.PLDP */ } } } Device (SSP6) { Name (_ADR, 0x15) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0x03, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.XHCI.RHUB.SSP6._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x40, 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, // @A...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) CreateField (DerefOf (PLDP [0x00]), 0x43, 0x07, PANL) CreateField (DerefOf (PLDP [0x00]), 0x4F, 0x08, GTOK) CreateField (DerefOf (PLDP [0x00]), 0x57, 0x08, GPOS) CreateBitField (DerefOf (PLDP [0x00]), 0x40, VISB) If ((PLAT == 0x01)) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If ((PLAT == 0x00)) { VISB = One PANL = 0x0C GTOK = 0x01 GPOS = 0x01 } If (((PLAT == 0x03) || (PLAT == 0x04))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If ((PLAT == 0x05)) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If (((PLAT == 0x13) || (PLAT == 0x16))) { PANL = 0x05 GTOK = 0x0A GPOS = 0x0A } If (((PLAT == 0x14) || (PLAT == 0x15))) { PANL = 0x05 GTOK = 0x0A GPOS = 0x0A } If (((PLAT == 0x11) || (PLAT == 0x12))) { VISB = One PANL = 0x05 GTOK = 0x06 GPOS = 0x06 } If (((PLAT == 0x0A) || (PLAT == 0x0B))) { VISB = One PANL = 0x04 GTOK = 0x08 GPOS = 0x08 } If (((PLAT == 0x0F) || (PLAT == 0x10))) { VISB = One PANL = 0x03 GTOK = 0x06 GPOS = 0x06 } If (((PLAT == 0x07) || (PLAT == 0x08))) { VISB = One PANL = 0x05 GTOK = 0x02 GPOS = 0x02 } If ((PLAT == 0x1B)) { VISB = One PANL = 0x28 GTOK = 0x0E GPOS = 0x0E } Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP6._PLD.PLDP */ } Device (PRT1) { Name (_ADR, 0x01) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x85, 0x00, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP6.PRT1._PLD.PLDP */ } } Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x05, 0x01, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP6.PRT2._PLD.PLDP */ } } Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x85, 0x01, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP6.PRT3._PLD.PLDP */ } } Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x03, 0x00, 0x00 }) Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x69, 0x41, 0x05, 0x02, 0x01, 0x00, 0x00, 0x00, // iA...... /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF // .... } }) Return (PLDP) /* \_SB_.PCI0.XHCI.RHUB.SSP6.PRT4._PLD.PLDP */ } } } } } Device (EHC1) { Name (_ADR, 0x001D0000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } Name (OPAC, 0x00) OperationRegion (PWKE, PCI_Config, 0x54, 0x18) Field (PWKE, DWordAcc, NoLock, Preserve) { Offset (0x01), PMEE, 1, , 6, PMES, 1, Offset (0x0E), , 1, PWUC, 10 } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x02)) { If ((Arg1 == 0x01)) { OPAC = One } Else { OPAC = One } } } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { PWUC = Ones } Else { PWUC = 0x00 } } Method (_INI, 0, NotSerialized) // _INI: Initialize { If ((OPAC == One)) { PMES = 0x01 PMEE = 0x00 } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PR01) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCA, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) Return (UPCA) /* \_SB_.PCI0.EHC1.HUBN.PR01._UPC.UPCA */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01._PLD.PLDP */ } Device (PR11) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR11._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR11._PLD.PLDP */ } } Device (PR12) { Name (_ADR, 0x02) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR12._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR12._PLD.PLDP */ } } Device (PR13) { Name (_ADR, 0x03) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13._PLD.PLDP */ } } Device (PR14) { Name (_ADR, 0x04) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14._PLD.PLDP */ } Alias (SBV1, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14.SDGV */ } } } Return (0x00) } } Device (PR15) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR15._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR15._PLD.PLDP */ } Alias (SBV2, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR15.SDGV */ } } } Return (0x00) } } Device (PR16) { Name (_ADR, 0x06) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16._PLD.PLDP */ } Alias (SBV1, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16.SDGV */ } } } Return (0x00) } } Device (PR17) { Name (_ADR, 0x07) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17._PLD.PLDP */ } Alias (SBV2, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17.SDGV */ } } } Return (0x00) } } Device (PR18) { Name (_ADR, 0x08) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR18._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR18._PLD.PLDP */ } } } } } Device (EHC2) { Name (_ADR, 0x001A0000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } Name (OPAC, 0x00) OperationRegion (PWKE, PCI_Config, 0x54, 0x18) Field (PWKE, DWordAcc, NoLock, Preserve) { Offset (0x01), PMEE, 1, , 6, PMES, 1, Offset (0x0E), , 1, PWUC, 10 } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x02)) { If ((Arg1 == 0x01)) { OPAC = One } Else { OPAC = One } } } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { PWUC = Ones } Else { PWUC = 0x00 } } Method (_INI, 0, NotSerialized) // _INI: Initialize { If ((OPAC == One)) { PMES = 0x01 PMEE = 0x00 } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PR01) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCA, Package (0x04) { 0xFF, 0x00, 0x00, 0x00 }) Return (UPCA) /* \_SB_.PCI0.EHC2.HUBN.PR01._UPC.UPCA */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01._PLD.PLDP */ } Device (PR11) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR11._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR11._PLD.PLDP */ } } Device (PR12) { Name (_ADR, 0x02) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12._PLD.PLDP */ } Alias (SBV1, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12.SDGV */ } } } Return (0x00) } } Device (PR13) { Name (_ADR, 0x03) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR13._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR13._PLD.PLDP */ } Alias (SBV2, SDGV) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("a5fc708f-8775-4ba6-bd0c-ba90a1ec72f8"))) { Switch (ToInteger (Arg2)) { Case (0x00) { If ((Arg1 == 0x01)) { Return (Buffer (0x01) { 0x07 // . }) } Else { Return (Buffer (0x01) { 0x00 // . }) } } Case (0x01) { If ((SDGV == 0xFF)) { Return (0x00) } Else { Return (0x01) } } Case (0x02) { Return (SDGV) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR13.SDGV */ } } } Return (0x00) } } Device (PR14) { Name (_ADR, 0x04) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR14._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xE1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR14._PLD.PLDP */ } } Device (PR15) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR15._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR15._PLD.PLDP */ } } Device (PR16) { Name (_ADR, 0x06) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { 0xFF, 0xFF, 0x00, 0x00 }) Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR16._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR16._PLD.PLDP */ } } } } } Device (ALZA) { Name (_ADR, 0x001B0000) // _ADR: Address } Device (HECI) { Name (_ADR, 0x00160000) // _ADR: Address } Device (HEC2) { Name (_ADR, 0x00160001) // _ADR: Address } Device (IDER) { Name (_ADR, 0x00160002) // _ADR: Address } Device (MEKT) { Name (_ADR, 0x00160003) // _ADR: Address } Device (RP01) { Name (_ADR, 0x001C0000) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG12) /* \_SB_.AG12 */ } Return (PG12) /* \_SB_.PG12 */ } Device (D082) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RP03) { Name (_ADR, 0x001C0002) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RP04) { Name (_ADR, 0x001C0003) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG15) /* \_SB_.AG15 */ } Return (PG15) /* \_SB_.PG15 */ } Device (D083) { Name (_ADR, 0x00) // _ADR: Address } } Device (RP05) { Name (_ADR, 0x001C0004) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG16) /* \_SB_.AG16 */ } Return (PG16) /* \_SB_.PG16 */ } Device (D084) { Name (_ADR, 0x00) // _ADR: Address } } Device (RP06) { Name (_ADR, 0x001C0005) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RP07) { Name (_ADR, 0x001C0006) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG18) /* \_SB_.AG18 */ } Return (PG18) /* \_SB_.PG18 */ } Device (D085) { Name (_ADR, 0x00) // _ADR: Address } } Device (RP08) { Name (_ADR, 0x001C0007) // _ADR: Address OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG19) /* \_SB_.AG19 */ } Return (PG19) /* \_SB_.PG19 */ } Device (D086) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (EVMR) { Name (_ADR, 0x00110000) // _ADR: Address } Device (EVS0) { Name (_ADR, 0x00110001) // _ADR: Address } Device (EVS1) { Name (_ADR, 0x00110002) // _ADR: Address } Device (EVS2) { Name (_ADR, 0x00110003) // _ADR: Address } Device (EVSS) { Name (_ADR, 0x00110004) // _ADR: Address OperationRegion (IDER, PCI_Config, 0x40, 0x20) Field (IDER, AnyAcc, NoLock, Preserve) { PFT0, 1, PIE0, 1, PPE0, 1, PDE0, 1, PFT1, 1, PIE1, 1, PPE1, 1, PDE1, 1, PRT0, 2, , 2, PIP0, 2, PSIT, 1, PIDE, 1, SFT0, 1, SIE0, 1, SPE0, 1, SDE0, 1, SFT1, 1, SIE1, 1, SPE1, 1, SDE1, 1, SRT0, 2, , 2, SIP0, 2, SSIT, 1, SIDE, 1, PRT1, 2, PIP1, 2, SRT1, 2, SIP1, 2, Offset (0x08), UDM0, 1, UDM1, 1, UDM2, 1, UDM3, 1, Offset (0x0A), PCT0, 2, , 2, PCT1, 2, Offset (0x0B), SCT0, 2, , 2, SCT1, 2, Offset (0x14), PCB0, 1, PCB1, 1, SCB0, 1, SCB1, 1, PCCR, 2, SCCR, 2, , 4, PUM0, 1, PUM1, 1, SUM0, 1, SUM1, 1, PSIG, 2, SSIG, 2 } Method (GPIO, 4, NotSerialized) { If (((Arg0 | Arg1) == 0x00)) { Return (0xFFFFFFFF) } ElseIf (((Arg0 == 0x00) & (Arg1 == 0x01))) { Return (0x0384) } Return ((0x1E * (0x09 - (Arg2 + Arg3)))) } Method (GDMA, 5, NotSerialized) { If ((Arg0 == 0x01)) { If ((Arg1 == 0x01)) { If ((Arg4 == 0x02)) { Return (0x0F) } Return (0x14) } If ((Arg2 == 0x01)) { Return ((0x0F * (0x04 - Arg4))) } Return ((0x1E * (0x04 - Arg4))) } Return (0xFFFFFFFE) } Method (SFLG, 5, NotSerialized) { Local0 = 0x00 Local0 |= Arg1 Local0 |= (Arg0 << 0x01) Local0 |= (Arg2 << 0x03) Local0 |= (Arg3 << 0x02) Local0 |= (Arg4 << 0x04) Return (Local0) } Method (SPIO, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00, 0x00 // ..... }) CreateByteField (PBUF, 0x00, RCT) CreateByteField (PBUF, 0x01, ISP) CreateByteField (PBUF, 0x02, FAST) CreateByteField (PBUF, 0x03, DMAE) CreateByteField (PBUF, 0x04, PIOT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.EVSS.SPIO.PBUF */ } If ((Arg0 > 0xF0)) { DMAE = 0x01 PIOT = 0x00 } Else { FAST = 0x01 If ((Arg1 & 0x02)) { If (((Arg0 == 0x78) & (Arg2 & 0x02))) { RCT = 0x03 ISP = 0x02 PIOT = 0x04 } ElseIf (((Arg0 <= 0xB4) & (Arg2 & 0x01))) { RCT = 0x01 ISP = 0x02 PIOT = 0x03 } Else { RCT = 0x00 ISP = 0x01 PIOT = 0x02 } } } Return (PBUF) /* \_SB_.PCI0.EVSS.SPIO.PBUF */ } Method (SDMA, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (PBUF, 0x00, PCT) CreateByteField (PBUF, 0x01, PCB) CreateByteField (PBUF, 0x02, UDMT) CreateByteField (PBUF, 0x03, UDME) CreateByteField (PBUF, 0x04, DMAT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.EVSS.SDMA.PBUF */ } If ((Arg0 <= 0x78)) { If ((Arg1 & 0x04)) { UDME = 0x01 If (((Arg0 == 0x0F) & (Arg2 & 0x40))) { UDMT = 0x01 PCB = 0x01 PCT = 0x02 DMAT = 0x06 } ElseIf (((Arg0 == 0x14) & (Arg2 & 0x20))) { UDMT = 0x01 PCB = 0x01 PCT = 0x01 DMAT = 0x05 } ElseIf (((Arg0 <= 0x1E) & (Arg2 & 0x10))) { PCB = 0x01 PCT = 0x02 DMAT = 0x04 } ElseIf (((Arg0 <= 0x2D) & (Arg2 & 0x08))) { PCB = 0x01 PCT = 0x01 DMAT = 0x03 } ElseIf (((Arg0 <= 0x3C) & (Arg2 & 0x04))) { PCT = 0x02 DMAT = 0x02 } ElseIf (((Arg0 <= 0x5A) & (Arg2 & 0x02))) { PCT = 0x01 DMAT = 0x01 } ElseIf (((Arg0 <= 0x78) & (Arg2 & 0x01))) { DMAT = 0x00 } } } Return (PBUF) /* \_SB_.PCI0.EVSS.SDMA.PBUF */ } Device (PRID) { Name (_ADR, 0x00) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (PFT0, PDE0, PRT0, PIP0) If ((PSIT & 0x01)) { PIO1 = GPIO (PFT1, PDE1, PRT1, PIP1) } Else { PIO1 = GPIO (PFT1, PDE1, PRT0, PIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.EVSS.PRID._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM0, PUM0, PCB0, (PCCR & 0x01), PCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.EVSS.PRID._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.EVSS.PRID._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM1, PUM1, PCB1, (PCCR & 0x02), PCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.EVSS.PRID._GTM.PIO1 */ } } FLAG = SFLG (PIE0, UDM0, PIE1, UDM1, 0x01) Return (PBUF) /* \_SB_.PCI0.EVSS.PRID._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { PSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { PRT0 = RCT /* \_SB_.PCI0.EVSS.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.EVSS.PRID._STM.ISP_ */ PFT0 = FAST /* \_SB_.PCI0.EVSS.PRID._STM.FAST */ PDE0 = DMAE /* \_SB_.PCI0.EVSS.PRID._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.EVSS.PRID._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) If ((DMAE | FAST)) { PFT1 = FAST /* \_SB_.PCI0.EVSS.PRID._STM.FAST */ PDE1 = DMAE /* \_SB_.PCI0.EVSS.PRID._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.EVSS.PRID._STM.TPIO */ If ((PSIT & 0x01)) { PRT1 = RCT /* \_SB_.PCI0.EVSS.PRID._STM.RCT_ */ PIP1 = ISP /* \_SB_.PCI0.EVSS.PRID._STM.ISP_ */ } Else { PRT0 = RCT /* \_SB_.PCI0.EVSS.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.EVSS.PRID._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) PCT0 = PCT /* \_SB_.PCI0.EVSS.PRID._STM.PCT_ */ PCB0 = PCB /* \_SB_.PCI0.EVSS.PRID._STM.PCB_ */ UDM0 = UDME /* \_SB_.PCI0.EVSS.PRID._STM.UDME */ PUM0 = UDMT /* \_SB_.PCI0.EVSS.PRID._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.EVSS.PRID._STM.TDMA */ } Else { UDM0 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) PCT1 = PCT /* \_SB_.PCI0.EVSS.PRID._STM.PCT_ */ PCB1 = PCB /* \_SB_.PCI0.EVSS.PRID._STM.PCB_ */ UDM1 = UDME /* \_SB_.PCI0.EVSS.PRID._STM.UDME */ PUM1 = UDMT /* \_SB_.PCI0.EVSS.PRID._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.EVSS.PRID._STM.TDMA */ } Else { UDM1 = 0x00 } If ((FLAG & 0x02)) { PIE0 = 0x01 } If ((FLAG & 0x08)) { PIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.EVSS.PRID.TPI0 */ PIO0 |= 0x08 If ((UDM0 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.EVSS.PRID.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.EVSS.PRID.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.EVSS.PRID.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.EVSS.PRID.TPI1 */ PIO1 |= 0x08 If ((UDM1 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.EVSS.PRID.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.EVSS.PRID.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.EVSS.PRID.SLAV._GTF.ATA1 */ } } } Device (SECD) { Name (_ADR, 0x01) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Name (DMT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (DMT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (STMI, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (SFT0, SDE0, SRT0, SIP0) If ((SSIT & 0x01)) { PIO1 = GPIO (SFT1, SDE1, SRT1, SIP1) } Else { PIO1 = GPIO (SFT1, SDE1, SRT0, SIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.EVSS.SECD._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM2, SUM0, SCB0, (SCCR & 0x01), SCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.EVSS.SECD._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.EVSS.SECD._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM3, SUM1, SCB1, (SCCR & 0x02), SCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.EVSS.SECD._GTM.PIO1 */ } } FLAG = SFLG (SIE0, UDM2, SIE1, UDM3, 0x01) Return (PBUF) /* \_SB_.PCI0.EVSS.SECD._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) STMI = Arg0 CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { SSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { SRT0 = RCT /* \_SB_.PCI0.EVSS.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.EVSS.SECD._STM.ISP_ */ SFT0 = FAST /* \_SB_.PCI0.EVSS.SECD._STM.FAST */ SDE0 = DMAE /* \_SB_.PCI0.EVSS.SECD._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.EVSS.SECD._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) POT2 = IOTM /* \_SB_.PCI0.EVSS.SECD._STM.IOTM */ If ((DMAE | FAST)) { SFT1 = FAST /* \_SB_.PCI0.EVSS.SECD._STM.FAST */ SDE1 = DMAE /* \_SB_.PCI0.EVSS.SECD._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.EVSS.SECD._STM.TPIO */ If ((SSIT & 0x01)) { SRT1 = RCT /* \_SB_.PCI0.EVSS.SECD._STM.RCT_ */ SIP1 = ISP /* \_SB_.PCI0.EVSS.SECD._STM.ISP_ */ } Else { SRT0 = RCT /* \_SB_.PCI0.EVSS.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.EVSS.SECD._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) SCT0 = PCT /* \_SB_.PCI0.EVSS.SECD._STM.PCT_ */ SCB0 = PCB /* \_SB_.PCI0.EVSS.SECD._STM.PCB_ */ UDM2 = UDME /* \_SB_.PCI0.EVSS.SECD._STM.UDME */ SUM0 = UDMT /* \_SB_.PCI0.EVSS.SECD._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.EVSS.SECD._STM.TDMA */ } Else { UDM2 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) SCT1 = PCT /* \_SB_.PCI0.EVSS.SECD._STM.PCT_ */ SCB1 = PCB /* \_SB_.PCI0.EVSS.SECD._STM.PCB_ */ UDM3 = UDME /* \_SB_.PCI0.EVSS.SECD._STM.UDME */ SUM1 = UDMT /* \_SB_.PCI0.EVSS.SECD._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.EVSS.SECD._STM.TDMA */ } Else { UDM3 = 0x00 } If ((FLAG & 0x02)) { SIE0 = 0x01 } If ((FLAG & 0x08)) { SIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.EVSS.SECD.TPI0 */ PIO0 |= 0x08 If ((UDM2 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.EVSS.SECD.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.EVSS.SECD.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.EVSS.SECD.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.EVSS.SECD.TPI1 */ PIO1 |= 0x08 If ((UDM3 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.EVSS.SECD.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.EVSS.SECD.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.EVSS.SECD.SLAV._GTF.ATA1 */ } } } } Device (DMI0) { Name (_ADR, 0x00) // _ADR: Address } Device (BR1A) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0000188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR1A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR1A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR1A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR1A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR1A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR1A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR1A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR1A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR1A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR1A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR1A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR1A.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR1A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR1A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR1A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1A.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR1A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR1A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG22) /* \_SB_.AG22 */ } Return (PG22) /* \_SB_.PG22 */ } Device (D07C) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR1B) { Name (_ADR, 0x00010001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0008188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR1B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR1B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR1B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR1B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR1B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR1B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR1B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR1B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR1B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR1B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR1B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR1B.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR1B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR1B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR1B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR1B.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR1B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR1B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG23) /* \_SB_.AG23 */ } Return (PG23) /* \_SB_.PG23 */ } Device (D075) { Name (_ADR, 0xFFFF) // _ADR: Address } Device (D07D) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR2A) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0009188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR2A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR2A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR2A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR2A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR2A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR2A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR2A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR2A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR2A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR2A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR2A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR2A.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR2A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR2A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR2A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2A.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR2A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR2A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG24) /* \_SB_.AG24 */ } Return (PG24) /* \_SB_.PG24 */ } Device (D07E) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR2B) { Name (_ADR, 0x00020001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0010188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR2B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR2B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR2B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR2B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR2B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR2B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR2B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR2B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR2B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR2B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR2B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR2B.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR2B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR2B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR2B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2B.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR2B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR2B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG25) /* \_SB_.AG25 */ } Return (PG25) /* \_SB_.PG25 */ } Device (D072) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR2C) { Name (_ADR, 0x00020002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0011188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR2C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR2C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR2C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR2C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR2C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR2C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR2C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR2C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR2C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR2C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR2C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR2C.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR2C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR2C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR2C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2C.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR2C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR2C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG26) /* \_SB_.AG26 */ } Return (PG26) /* \_SB_.PG26 */ } Device (D073) { Name (_ADR, 0xFFFF) // _ADR: Address } Device (D07F) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR2D) { Name (_ADR, 0x00020003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0012188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR2D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR2D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR2D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR2D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR2D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR2D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR2D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR2D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR2D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR2D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR2D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR2D.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR2D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR2D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR2D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR2D.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR2D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR2D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG27) /* \_SB_.AG27 */ } Return (PG27) /* \_SB_.PG27 */ } Device (D074) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR3A) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0013188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR3A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR3A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR3A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR3A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR3A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR3A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR3A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR3A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR3A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR3A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR3A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR3A.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR3A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR3A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR3A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3A.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR3A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR3A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG28) /* \_SB_.AG28 */ } Return (PG28) /* \_SB_.PG28 */ } Device (D080) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR3B) { Name (_ADR, 0x00030001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0018188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR3B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR3B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR3B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR3B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR3B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR3B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR3B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR3B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR3B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR3B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR3B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR3B.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR3B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR3B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR3B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3B.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR3B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR3B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG29) /* \_SB_.AG29 */ } Return (PG29) /* \_SB_.PG29 */ } Device (D076) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR3C) { Name (_ADR, 0x00030002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0019188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR3C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR3C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR3C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR3C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR3C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR3C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR3C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR3C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR3C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR3C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR3C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR3C.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR3C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR3C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR3C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3C.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR3C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR3C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG2A) /* \_SB_.AG2A */ } Return (PG2A) /* \_SB_.PG2A */ } Device (D077) { Name (_ADR, 0xFFFF) // _ADR: Address } Device (D081) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (BR3D) { Name (_ADR, 0x00030003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001A188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI0.BR3D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local0 &= ALMK /* \_SB_.PCI0.BR3D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI0.BR3D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI0.BR3D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI0.BR3D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local0 &= PLMK /* \_SB_.PCI0.BR3D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI0.BR3D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI0.BR3D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI0.BR3D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI0.BR3D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI0.BR3D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI0.BR3D.ALMK */ Local0 |= ALBL /* \_SB_.PCI0.BR3D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local0 |= SPOF /* \_SB_.PCI0.BR3D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local0 |= PLOF /* \_SB_.PCI0.BR3D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI0.BR3D.SCTL */ Local0 |= ALOF /* \_SB_.PCI0.BR3D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI0.BR3D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AG2B) /* \_SB_.AG2B */ } Return (PG2B) /* \_SB_.PG2B */ } Device (D078) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (CB0A) { Name (_ADR, 0x00040000) // _ADR: Address } Device (CB0B) { Name (_ADR, 0x00040001) // _ADR: Address } Device (CB0C) { Name (_ADR, 0x00040002) // _ADR: Address } Device (CB0D) { Name (_ADR, 0x00040003) // _ADR: Address } Device (CB0E) { Name (_ADR, 0x00040004) // _ADR: Address } Device (CB0F) { Name (_ADR, 0x00040005) // _ADR: Address } Device (CB0G) { Name (_ADR, 0x00040006) // _ADR: Address } Device (CB0H) { Name (_ADR, 0x00040007) // _ADR: Address } Device (GLAN) { Name (_ADR, 0x00190000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (SAT1) { Name (_ADR, 0x001F0002) // _ADR: Address OperationRegion (IDER, PCI_Config, 0x40, 0x20) Field (IDER, AnyAcc, NoLock, Preserve) { PFT0, 1, PIE0, 1, PPE0, 1, PDE0, 1, PFT1, 1, PIE1, 1, PPE1, 1, PDE1, 1, PRT0, 2, , 2, PIP0, 2, PSIT, 1, PIDE, 1, SFT0, 1, SIE0, 1, SPE0, 1, SDE0, 1, SFT1, 1, SIE1, 1, SPE1, 1, SDE1, 1, SRT0, 2, , 2, SIP0, 2, SSIT, 1, SIDE, 1, PRT1, 2, PIP1, 2, SRT1, 2, SIP1, 2, Offset (0x08), UDM0, 1, UDM1, 1, UDM2, 1, UDM3, 1, Offset (0x0A), PCT0, 2, , 2, PCT1, 2, Offset (0x0B), SCT0, 2, , 2, SCT1, 2, Offset (0x14), PCB0, 1, PCB1, 1, SCB0, 1, SCB1, 1, PCCR, 2, SCCR, 2, , 4, PUM0, 1, PUM1, 1, SUM0, 1, SUM1, 1, PSIG, 2, SSIG, 2 } Method (GPIO, 4, NotSerialized) { If (((Arg0 | Arg1) == 0x00)) { Return (0xFFFFFFFF) } ElseIf (((Arg0 == 0x00) & (Arg1 == 0x01))) { Return (0x0384) } Return ((0x1E * (0x09 - (Arg2 + Arg3)))) } Method (GDMA, 5, NotSerialized) { If ((Arg0 == 0x01)) { If ((Arg1 == 0x01)) { If ((Arg4 == 0x02)) { Return (0x0F) } Return (0x14) } If ((Arg2 == 0x01)) { Return ((0x0F * (0x04 - Arg4))) } Return ((0x1E * (0x04 - Arg4))) } Return (0xFFFFFFFE) } Method (SFLG, 5, NotSerialized) { Local0 = 0x00 Local0 |= Arg1 Local0 |= (Arg0 << 0x01) Local0 |= (Arg2 << 0x03) Local0 |= (Arg3 << 0x02) Local0 |= (Arg4 << 0x04) Return (Local0) } Method (SPIO, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00, 0x00 // ..... }) CreateByteField (PBUF, 0x00, RCT) CreateByteField (PBUF, 0x01, ISP) CreateByteField (PBUF, 0x02, FAST) CreateByteField (PBUF, 0x03, DMAE) CreateByteField (PBUF, 0x04, PIOT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.SAT1.SPIO.PBUF */ } If ((Arg0 > 0xF0)) { DMAE = 0x01 PIOT = 0x00 } Else { FAST = 0x01 If ((Arg1 & 0x02)) { If (((Arg0 == 0x78) & (Arg2 & 0x02))) { RCT = 0x03 ISP = 0x02 PIOT = 0x04 } ElseIf (((Arg0 <= 0xB4) & (Arg2 & 0x01))) { RCT = 0x01 ISP = 0x02 PIOT = 0x03 } Else { RCT = 0x00 ISP = 0x01 PIOT = 0x02 } } } Return (PBUF) /* \_SB_.PCI0.SAT1.SPIO.PBUF */ } Method (SDMA, 3, NotSerialized) { Name (PBUF, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (PBUF, 0x00, PCT) CreateByteField (PBUF, 0x01, PCB) CreateByteField (PBUF, 0x02, UDMT) CreateByteField (PBUF, 0x03, UDME) CreateByteField (PBUF, 0x04, DMAT) If (((Arg0 == 0x00) || (Arg0 == 0xFFFFFFFF))) { Return (PBUF) /* \_SB_.PCI0.SAT1.SDMA.PBUF */ } If ((Arg0 <= 0x78)) { If ((Arg1 & 0x04)) { UDME = 0x01 If (((Arg0 == 0x0F) & (Arg2 & 0x40))) { UDMT = 0x01 PCB = 0x01 PCT = 0x02 DMAT = 0x06 } ElseIf (((Arg0 == 0x14) & (Arg2 & 0x20))) { UDMT = 0x01 PCB = 0x01 PCT = 0x01 DMAT = 0x05 } ElseIf (((Arg0 <= 0x1E) & (Arg2 & 0x10))) { PCB = 0x01 PCT = 0x02 DMAT = 0x04 } ElseIf (((Arg0 <= 0x2D) & (Arg2 & 0x08))) { PCB = 0x01 PCT = 0x01 DMAT = 0x03 } ElseIf (((Arg0 <= 0x3C) & (Arg2 & 0x04))) { PCT = 0x02 DMAT = 0x02 } ElseIf (((Arg0 <= 0x5A) & (Arg2 & 0x02))) { PCT = 0x01 DMAT = 0x01 } ElseIf (((Arg0 <= 0x78) & (Arg2 & 0x01))) { DMAT = 0x00 } } } Return (PBUF) /* \_SB_.PCI0.SAT1.SDMA.PBUF */ } Device (PRID) { Name (_ADR, 0x00) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (PFT0, PDE0, PRT0, PIP0) If ((PSIT & 0x01)) { PIO1 = GPIO (PFT1, PDE1, PRT1, PIP1) } Else { PIO1 = GPIO (PFT1, PDE1, PRT0, PIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT1.PRID._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM0, PUM0, PCB0, (PCCR & 0x01), PCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT1.PRID._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT1.PRID._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM1, PUM1, PCB1, (PCCR & 0x02), PCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT1.PRID._GTM.PIO1 */ } } FLAG = SFLG (PIE0, UDM0, PIE1, UDM1, 0x01) Return (PBUF) /* \_SB_.PCI0.SAT1.PRID._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { PSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { PRT0 = RCT /* \_SB_.PCI0.SAT1.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.SAT1.PRID._STM.ISP_ */ PFT0 = FAST /* \_SB_.PCI0.SAT1.PRID._STM.FAST */ PDE0 = DMAE /* \_SB_.PCI0.SAT1.PRID._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.SAT1.PRID._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) If ((DMAE | FAST)) { PFT1 = FAST /* \_SB_.PCI0.SAT1.PRID._STM.FAST */ PDE1 = DMAE /* \_SB_.PCI0.SAT1.PRID._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.SAT1.PRID._STM.TPIO */ If ((PSIT & 0x01)) { PRT1 = RCT /* \_SB_.PCI0.SAT1.PRID._STM.RCT_ */ PIP1 = ISP /* \_SB_.PCI0.SAT1.PRID._STM.ISP_ */ } Else { PRT0 = RCT /* \_SB_.PCI0.SAT1.PRID._STM.RCT_ */ PIP0 = ISP /* \_SB_.PCI0.SAT1.PRID._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) PCT0 = PCT /* \_SB_.PCI0.SAT1.PRID._STM.PCT_ */ PCB0 = PCB /* \_SB_.PCI0.SAT1.PRID._STM.PCB_ */ UDM0 = UDME /* \_SB_.PCI0.SAT1.PRID._STM.UDME */ PUM0 = UDMT /* \_SB_.PCI0.SAT1.PRID._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.SAT1.PRID._STM.TDMA */ } Else { UDM0 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) PCT1 = PCT /* \_SB_.PCI0.SAT1.PRID._STM.PCT_ */ PCB1 = PCB /* \_SB_.PCI0.SAT1.PRID._STM.PCB_ */ UDM1 = UDME /* \_SB_.PCI0.SAT1.PRID._STM.UDME */ PUM1 = UDMT /* \_SB_.PCI0.SAT1.PRID._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.SAT1.PRID._STM.TDMA */ } Else { UDM1 = 0x00 } If ((FLAG & 0x02)) { PIE0 = 0x01 } If ((FLAG & 0x08)) { PIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.SAT1.PRID.TPI0 */ PIO0 |= 0x08 If ((UDM0 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.SAT1.PRID.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.SAT1.PRID.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.SAT1.PRID.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.SAT1.PRID.TPI1 */ PIO1 |= 0x08 If ((UDM1 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.SAT1.PRID.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.SAT1.PRID.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.SAT1.PRID.SLAV._GTF.ATA1 */ } } } Device (SECD) { Name (_ADR, 0x01) // _ADR: Address Name (TDM0, 0x00) Name (TPI0, 0x00) Name (TDM1, 0x00) Name (TPI1, 0x00) Name (DMT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (DMT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT1, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (POT2, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) Name (STMI, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00 // .... }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) PIO0 = GPIO (SFT0, SDE0, SRT0, SIP0) If ((SSIT & 0x01)) { PIO1 = GPIO (SFT1, SDE1, SRT1, SIP1) } Else { PIO1 = GPIO (SFT1, SDE1, SRT0, SIP0) } If ((PIO0 == 0xFFFFFFFF)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT1.SECD._GTM.PIO0 */ } Else { DMA0 = GDMA (UDM2, SUM0, SCB0, (SCCR & 0x01), SCT0) If ((DMA0 > PIO0)) { DMA0 = PIO0 /* \_SB_.PCI0.SAT1.SECD._GTM.PIO0 */ } } If ((PIO1 == 0xFFFFFFFF)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT1.SECD._GTM.PIO1 */ } Else { DMA1 = GDMA (UDM3, SUM1, SCB1, (SCCR & 0x02), SCT1) If ((DMA1 > PIO1)) { DMA1 = PIO1 /* \_SB_.PCI0.SAT1.SECD._GTM.PIO1 */ } } FLAG = SFLG (SIE0, UDM2, SIE1, UDM3, 0x01) Return (PBUF) /* \_SB_.PCI0.SAT1.SECD._GTM.PBUF */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) STMI = Arg0 CreateWordField (Arg1, 0x6A, RPS0) CreateWordField (Arg1, 0x80, IOM0) CreateWordField (Arg1, 0xB0, DMM0) CreateWordField (Arg2, 0x6A, RPS1) CreateWordField (Arg2, 0x80, IOM1) CreateWordField (Arg2, 0xB0, DMM1) Name (IOTM, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (IOTM, 0x00, RCT) CreateByteField (IOTM, 0x01, ISP) CreateByteField (IOTM, 0x02, FAST) CreateByteField (IOTM, 0x03, DMAE) CreateByteField (IOTM, 0x04, TPIO) Name (DMAT, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00 // .... }) CreateByteField (DMAT, 0x00, PCT) CreateByteField (DMAT, 0x01, PCB) CreateByteField (DMAT, 0x02, UDMT) CreateByteField (DMAT, 0x03, UDME) CreateByteField (DMAT, 0x04, TDMA) If ((FLAG & 0x10)) { SSIT = 0x01 } IOTM = SPIO (PIO0, RPS0, IOM0) If ((DMAE | FAST)) { SRT0 = RCT /* \_SB_.PCI0.SAT1.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.SAT1.SECD._STM.ISP_ */ SFT0 = FAST /* \_SB_.PCI0.SAT1.SECD._STM.FAST */ SDE0 = DMAE /* \_SB_.PCI0.SAT1.SECD._STM.DMAE */ TPI0 = TPIO /* \_SB_.PCI0.SAT1.SECD._STM.TPIO */ } IOTM = SPIO (PIO1, RPS1, IOM1) POT2 = IOTM /* \_SB_.PCI0.SAT1.SECD._STM.IOTM */ If ((DMAE | FAST)) { SFT1 = FAST /* \_SB_.PCI0.SAT1.SECD._STM.FAST */ SDE1 = DMAE /* \_SB_.PCI0.SAT1.SECD._STM.DMAE */ TPI1 = TPIO /* \_SB_.PCI0.SAT1.SECD._STM.TPIO */ If ((SSIT & 0x01)) { SRT1 = RCT /* \_SB_.PCI0.SAT1.SECD._STM.RCT_ */ SIP1 = ISP /* \_SB_.PCI0.SAT1.SECD._STM.ISP_ */ } Else { SRT0 = RCT /* \_SB_.PCI0.SAT1.SECD._STM.RCT_ */ SIP0 = ISP /* \_SB_.PCI0.SAT1.SECD._STM.ISP_ */ } } If ((FLAG & 0x01)) { DMAT = SDMA (DMA0, RPS0, DMM0) SCT0 = PCT /* \_SB_.PCI0.SAT1.SECD._STM.PCT_ */ SCB0 = PCB /* \_SB_.PCI0.SAT1.SECD._STM.PCB_ */ UDM2 = UDME /* \_SB_.PCI0.SAT1.SECD._STM.UDME */ SUM0 = UDMT /* \_SB_.PCI0.SAT1.SECD._STM.UDMT */ TDM0 = TDMA /* \_SB_.PCI0.SAT1.SECD._STM.TDMA */ } Else { UDM2 = 0x00 } If ((FLAG & 0x04)) { DMAT = SDMA (DMA1, RPS1, DMM1) SCT1 = PCT /* \_SB_.PCI0.SAT1.SECD._STM.PCT_ */ SCB1 = PCB /* \_SB_.PCI0.SAT1.SECD._STM.PCB_ */ UDM3 = UDME /* \_SB_.PCI0.SAT1.SECD._STM.UDME */ SUM1 = UDMT /* \_SB_.PCI0.SAT1.SECD._STM.UDMT */ TDM1 = TDMA /* \_SB_.PCI0.SAT1.SECD._STM.TDMA */ } Else { UDM3 = 0x00 } If ((FLAG & 0x02)) { SIE0 = 0x01 } If ((FLAG & 0x08)) { SIE1 = 0x01 } } Device (MAST) { Name (_ADR, 0x00) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF // ...... }) CreateByteField (ATA0, 0x01, PIO0) CreateByteField (ATA0, 0x08, DMA0) PIO0 = TPI0 /* \_SB_.PCI0.SAT1.SECD.TPI0 */ PIO0 |= 0x08 If ((UDM2 & 0x01)) { DMA0 = TDM0 /* \_SB_.PCI0.SAT1.SECD.TDM0 */ DMA0 |= 0x40 } Else { DMA0 = TPI0 /* \_SB_.PCI0.SAT1.SECD.TPI0 */ If ((DMA0 != 0x00)) { DMA0 -= 0x02 } DMA0 |= 0x20 } Return (ATA0) /* \_SB_.PCI0.SAT1.SECD.MAST._GTF.ATA0 */ } } Device (SLAV) { Name (_ADR, 0x01) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { Name (ATA1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF // ...... }) CreateByteField (ATA1, 0x01, PIO1) CreateByteField (ATA1, 0x08, DMA1) PIO1 = TPI1 /* \_SB_.PCI0.SAT1.SECD.TPI1 */ PIO1 |= 0x08 If ((UDM3 & 0x01)) { DMA1 = TDM1 /* \_SB_.PCI0.SAT1.SECD.TDM1 */ DMA1 |= 0x40 } Else { DMA1 = TPI1 /* \_SB_.PCI0.SAT1.SECD.TPI1 */ If ((DMA1 != 0x00)) { DMA1 -= 0x02 } DMA1 |= 0x20 } Return (ATA1) /* \_SB_.PCI0.SAT1.SECD.SLAV._GTF.ATA1 */ } } } } } Device (PCI1) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, 0xFFFF) // _ADR: Address Method (^BN80, 0, NotSerialized) { Return (0x80) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BN80 ()) } Name (_UID, 0x80) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR80) /* \_SB_.AR80 */ } Return (PR80) /* \_SB_.PR80 */ } Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Name (SUPP, 0x00) Name (CTRL, 0x00) CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } Local0 = _BBN () If ((Local0 == 0x00)) { If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (^^PCI0.XHCI.POSC (Arg1, Arg2, Arg3)) } } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.PCI1._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI1._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () Local1 = (IIOH >> 0x01) Local1 &= 0x01 If ((Local1 == 0x01)) { ^QRP0.OSHP () ^QR1A.OSHP () ^QR1B.OSHP () ^QR2A.OSHP () ^QR2B.OSHP () ^QR2C.OSHP () ^QR2D.OSHP () ^QR3A.OSHP () ^QR3B.OSHP () ^QR3C.OSHP () ^QR3D.OSHP () } Local1 = (IIOH >> 0x02) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () } Local1 = (IIOH >> 0x03) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () } GPSH = 0x01 } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI1._OSC.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } } Method (BN40, 0, NotSerialized) { Return (BBI1) /* \BBI1 */ } Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x01) } Else { Return (0x02) } } Device (IIOP) { Name (_ADR, 0x00) // _ADR: Address Name (_UID, "IIO1PRES") // _UID: Unique ID OperationRegion (IIOR, PCI_Config, 0x00, 0x02) Field (IIOR, ByteAcc, NoLock, Preserve) { VID0, 16 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("d8c1a3a6-be9b-4c9b-91bf-c3cb81fc5daf") /* Dynamic Enumeration */)) { Switch (ToInteger (Arg2)) { Case (0x00) { Return (Buffer (0x01) { 0x1F // . }) } Case (0x01) { Return (Buffer (0x025C) { /* 0000 */ 0x44, 0x52, 0x48, 0x31, 0x00, 0x00, 0x00, 0x00, // DRH1.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0108 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0118 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0120 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0130 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0138 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0148 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0150 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0158 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0160 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0168 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0178 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0180 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0190 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0198 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0208 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0220 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0238 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0240 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0250 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0258 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x02) { Return (Buffer (0xCC) { /* 0000 */ 0x41, 0x54, 0x53, 0x31, 0x00, 0x00, 0x00, 0x00, // ATS1.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x03) { Return (Buffer (0x68) { /* 0000 */ 0x52, 0x48, 0x53, 0x31, 0x00, 0x00, 0x00, 0x00, // RHS1.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } Default { } } } Return (Buffer (0x01) { 0x00 // . }) } } Method (_STA, 0, NotSerialized) // _STA: Status { Local1 = (IIOH >> 0x01) Local1 &= 0x01 If ((Local1 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Name (P1RS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FE, // Range Maximum 0x0000, // Translation Offset 0x00FF, // Length ,, ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4158, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x5758, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x5858, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000000, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (P1RS) /* \_SB_.PCI1.P1RS */ } Device (MHP0) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "01-00") // _UID: Unique ID OperationRegion (MHP0, PCI_Config, 0x0E, 0x02) Field (MHP0, ByteAcc, NoLock, Preserve) { STM2, 7 } } Device (MHP1) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "01-01") // _UID: Unique ID OperationRegion (MHP1, PCI_Config, 0x1E, 0x02) Field (MHP1, ByteAcc, NoLock, Preserve) { STM3, 7 } } Name (_EJD, "\\_SB.SCK1") // _EJD: Ejection Dependent Device Device (QRP0) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001B188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QRP0.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QRP0.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QRP0.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QRP0.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QRP0.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QRP0.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QRP0.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QRP0.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QRP0.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QRP0.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QRP0.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QRP0.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QRP0.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QRP0.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QRP0.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QRP0.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QRP0.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QRP0.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR1A) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0000188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR1A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR1A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR1A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR1A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR1A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR1A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR1A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR1A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR1A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR1A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR1A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR1A.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR1A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR1A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR1A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1A.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR1A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR1A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR1B) { Name (_ADR, 0x00010001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0008188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR1B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR1B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR1B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR1B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR1B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR1B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR1B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR1B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR1B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR1B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR1B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR1B.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR1B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR1B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR1B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR1B.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR1B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR1B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR2A) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0009188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR2A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR2A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR2A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR2A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR2A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR2A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR2A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR2A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR2A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR2A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR2A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR2A.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR2A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR2A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR2A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2A.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR2A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR2A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR2B) { Name (_ADR, 0x00020001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0010188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR2B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR2B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR2B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR2B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR2B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR2B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR2B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR2B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR2B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR2B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR2B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR2B.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR2B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR2B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR2B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2B.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR2B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR2B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR2C) { Name (_ADR, 0x00020002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0011188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR2C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR2C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR2C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR2C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR2C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR2C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR2C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR2C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR2C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR2C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR2C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR2C.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR2C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR2C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR2C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2C.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR2C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR2C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR2D) { Name (_ADR, 0x00020003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0012188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR2D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR2D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR2D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR2D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR2D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR2D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR2D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR2D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR2D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR2D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR2D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR2D.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR2D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR2D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR2D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR2D.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR2D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR2D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR3A) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0013188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR3A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR3A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR3A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR3A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR3A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR3A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR3A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR3A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR3A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR3A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR3A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR3A.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR3A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR3A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR3A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3A.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR3A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR3A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR3B) { Name (_ADR, 0x00030001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0018188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR3B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR3B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR3B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR3B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR3B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR3B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR3B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR3B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR3B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR3B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR3B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR3B.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR3B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR3B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR3B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3B.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR3B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR3B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR3C) { Name (_ADR, 0x00030002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0019188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR3C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR3C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR3C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR3C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR3C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR3C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR3C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR3C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR3C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR3C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR3C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR3C.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR3C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR3C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR3C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3C.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR3C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR3C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (QR3D) { Name (_ADR, 0x00030003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001A188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI1.QR3D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local0 &= ALMK /* \_SB_.PCI1.QR3D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI1.QR3D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI1.QR3D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI1.QR3D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local0 &= PLMK /* \_SB_.PCI1.QR3D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI1.QR3D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI1.QR3D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI1.QR3D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI1.QR3D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI1.QR3D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI1.QR3D.ALMK */ Local0 |= ALBL /* \_SB_.PCI1.QR3D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local0 |= SPOF /* \_SB_.PCI1.QR3D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local0 |= PLOF /* \_SB_.PCI1.QR3D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI1.QR3D.SCTL */ Local0 |= ALOF /* \_SB_.PCI1.QR3D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI1.QR3D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI1") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (CB1A) { Name (_ADR, 0x00040000) // _ADR: Address } Device (CB1B) { Name (_ADR, 0x00040001) // _ADR: Address } Device (CB1C) { Name (_ADR, 0x00040002) // _ADR: Address } Device (CB1D) { Name (_ADR, 0x00040003) // _ADR: Address } Device (CB1E) { Name (_ADR, 0x00040004) // _ADR: Address } Device (CB1F) { Name (_ADR, 0x00040005) // _ADR: Address } Device (CB1G) { Name (_ADR, 0x00040006) // _ADR: Address } Device (CB1H) { Name (_ADR, 0x00040007) // _ADR: Address } } Device (PCI2) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, 0xFFFF) // _ADR: Address Method (^BNC0, 0, NotSerialized) { Return (0xC0) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BNC0 ()) } Name (_UID, 0xC0) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (ARC0) /* \_SB_.ARC0 */ } Return (PRC0) /* \_SB_.PRC0 */ } Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Name (SUPP, 0x00) Name (CTRL, 0x00) CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } Local0 = _BBN () If ((Local0 == 0x00)) { If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (^^PCI0.XHCI.POSC (Arg1, Arg2, Arg3)) } } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.PCI2._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI2._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () Local1 = (IIOH >> 0x01) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () } Local1 = (IIOH >> 0x02) Local1 &= 0x01 If ((Local1 == 0x01)) { ^RRP0.OSHP () ^RR1A.OSHP () ^RR1B.OSHP () ^RR2A.OSHP () ^RR2B.OSHP () ^RR2C.OSHP () ^RR2D.OSHP () ^RR3A.OSHP () ^RR3B.OSHP () ^RR3C.OSHP () ^RR3D.OSHP () } Local1 = (IIOH >> 0x03) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI3.SRP0.OSHP () ^^PCI3.SR1A.OSHP () ^^PCI3.SR1B.OSHP () ^^PCI3.SR2A.OSHP () ^^PCI3.SR2B.OSHP () ^^PCI3.SR2C.OSHP () ^^PCI3.SR2D.OSHP () ^^PCI3.SR3A.OSHP () ^^PCI3.SR3B.OSHP () ^^PCI3.SR3C.OSHP () ^^PCI3.SR3D.OSHP () } GPSH = 0x01 } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI2._OSC.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } } Method (BN80, 0, NotSerialized) { Return (BBI2) /* \BBI2 */ } Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x02) } Else { Return (0x04) } } Device (IIOP) { Name (_ADR, 0x00) // _ADR: Address Name (_UID, "IIO2PRES") // _UID: Unique ID OperationRegion (IIOR, PCI_Config, 0x00, 0x02) Field (IIOR, ByteAcc, NoLock, Preserve) { VID0, 16 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("d8c1a3a6-be9b-4c9b-91bf-c3cb81fc5daf") /* Dynamic Enumeration */)) { Switch (ToInteger (Arg2)) { Case (0x00) { Return (Buffer (0x01) { 0x1F // . }) } Case (0x01) { Return (Buffer (0x025C) { /* 0000 */ 0x44, 0x52, 0x48, 0x32, 0x00, 0x00, 0x00, 0x00, // DRH2.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0108 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0118 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0120 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0130 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0138 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0148 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0150 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0158 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0160 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0168 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0178 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0180 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0190 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0198 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0208 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0220 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0238 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0240 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0250 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0258 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x02) { Return (Buffer (0xCC) { /* 0000 */ 0x41, 0x54, 0x53, 0x32, 0x00, 0x00, 0x00, 0x00, // ATS2.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x03) { Return (Buffer (0x68) { /* 0000 */ 0x52, 0x48, 0x53, 0x32, 0x00, 0x00, 0x00, 0x00, // RHS2.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } Default { } } } Return (Buffer (0x01) { 0x00 // . }) } } Method (_STA, 0, NotSerialized) // _STA: Status { Local1 = (IIOH >> 0x02) Local1 &= 0x01 If ((Local1 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Name (P2RS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FE, // Range Maximum 0x0000, // Translation Offset 0x00FF, // Length ,, ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4558, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4259, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4359, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000000, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (P2RS) /* \_SB_.PCI2.P2RS */ } Device (MHP0) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "02-00") // _UID: Unique ID OperationRegion (MHP0, PCI_Config, 0x0E, 0x02) Field (MHP0, ByteAcc, NoLock, Preserve) { STM4, 7 } } Device (MHP1) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "02-01") // _UID: Unique ID OperationRegion (MHP1, PCI_Config, 0x1E, 0x02) Field (MHP1, ByteAcc, NoLock, Preserve) { STM5, 7 } } Name (_EJD, "\\_SB.SCK2") // _EJD: Ejection Dependent Device Device (RRP0) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001B188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RRP0.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RRP0.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RRP0.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RRP0.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RRP0.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RRP0.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RRP0.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RRP0.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RRP0.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RRP0.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RRP0.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RRP0.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RRP0.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RRP0.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RRP0.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RRP0.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RRP0.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RRP0.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR1A) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0000188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR1A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR1A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR1A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR1A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR1A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR1A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR1A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR1A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR1A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR1A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR1A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR1A.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR1A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR1A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR1A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1A.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR1A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR1A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR1B) { Name (_ADR, 0x00010001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0008188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR1B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR1B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR1B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR1B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR1B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR1B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR1B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR1B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR1B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR1B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR1B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR1B.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR1B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR1B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR1B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR1B.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR1B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR1B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR2A) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0009188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR2A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR2A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR2A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR2A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR2A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR2A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR2A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR2A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR2A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR2A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR2A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR2A.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR2A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR2A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR2A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2A.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR2A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR2A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR2B) { Name (_ADR, 0x00020001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0010188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR2B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR2B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR2B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR2B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR2B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR2B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR2B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR2B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR2B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR2B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR2B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR2B.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR2B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR2B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR2B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2B.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR2B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR2B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR2C) { Name (_ADR, 0x00020002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0011188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR2C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR2C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR2C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR2C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR2C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR2C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR2C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR2C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR2C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR2C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR2C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR2C.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR2C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR2C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR2C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2C.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR2C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR2C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR2D) { Name (_ADR, 0x00020003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0012188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR2D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR2D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR2D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR2D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR2D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR2D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR2D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR2D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR2D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR2D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR2D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR2D.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR2D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR2D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR2D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR2D.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR2D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR2D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR3A) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0013188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR3A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR3A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR3A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR3A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR3A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR3A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR3A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR3A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR3A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR3A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR3A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR3A.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR3A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR3A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR3A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3A.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR3A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR3A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR3B) { Name (_ADR, 0x00030001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0018188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR3B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR3B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR3B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR3B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR3B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR3B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR3B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR3B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR3B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR3B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR3B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR3B.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR3B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR3B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR3B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3B.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR3B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR3B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR3C) { Name (_ADR, 0x00030002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0019188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR3C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR3C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR3C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR3C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR3C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR3C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR3C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR3C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR3C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR3C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR3C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR3C.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR3C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR3C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR3C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3C.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR3C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR3C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (RR3D) { Name (_ADR, 0x00030003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001A188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI2.RR3D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local0 &= ALMK /* \_SB_.PCI2.RR3D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI2.RR3D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI2.RR3D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI2.RR3D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local0 &= PLMK /* \_SB_.PCI2.RR3D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI2.RR3D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI2.RR3D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI2.RR3D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI2.RR3D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI2.RR3D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI2.RR3D.ALMK */ Local0 |= ALBL /* \_SB_.PCI2.RR3D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local0 |= SPOF /* \_SB_.PCI2.RR3D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local0 |= PLOF /* \_SB_.PCI2.RR3D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI2.RR3D.SCTL */ Local0 |= ALOF /* \_SB_.PCI2.RR3D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI2.RR3D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI2") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (CB2A) { Name (_ADR, 0x00040000) // _ADR: Address } Device (CB2B) { Name (_ADR, 0x00040001) // _ADR: Address } Device (CB2C) { Name (_ADR, 0x00040002) // _ADR: Address } Device (CB2D) { Name (_ADR, 0x00040003) // _ADR: Address } Device (CB2E) { Name (_ADR, 0x00040004) // _ADR: Address } Device (CB2F) { Name (_ADR, 0x00040005) // _ADR: Address } Device (CB2G) { Name (_ADR, 0x00040006) // _ADR: Address } Device (CB2H) { Name (_ADR, 0x00040007) // _ADR: Address } } Device (PCI3) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, 0xFFFF) // _ADR: Address Method (^BNE0, 0, NotSerialized) { Return (0xE0) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BNE0 ()) } Name (_UID, 0xE0) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (ARE0) /* \_SB_.ARE0 */ } Return (PRE0) /* \_SB_.PRE0 */ } Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Name (SUPP, 0x00) Name (CTRL, 0x00) CreateDWordField (Arg3, 0x00, CDW1) CreateDWordField (Arg3, 0x04, CDW2) If ((Arg2 > 0x02)) { CreateDWordField (Arg3, 0x08, CDW3) } Local0 = _BBN () If ((Local0 == 0x00)) { If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (^^PCI0.XHCI.POSC (Arg1, Arg2, Arg3)) } } If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { SUPP = CDW2 /* \_SB_.PCI3._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI3._OSC.CDW3 */ If ((AHPE || ((SUPP & 0x16) != 0x16))) { CTRL &= 0x1E Sleep (0x03E8) } CTRL &= 0x1D If (!PEPM) { CTRL &= 0x1B } If (!PEER) { CTRL &= 0x15 } If (!PECS) { CTRL &= 0x0F } If (~(CDW1 & 0x01)) { If ((CTRL & 0x01)) { ^^PCI0.BR1A.OSHP () ^^PCI0.BR1B.OSHP () ^^PCI0.BR2A.OSHP () ^^PCI0.BR2B.OSHP () ^^PCI0.BR2C.OSHP () ^^PCI0.BR2D.OSHP () ^^PCI0.BR3A.OSHP () ^^PCI0.BR3B.OSHP () ^^PCI0.BR3C.OSHP () ^^PCI0.BR3D.OSHP () Local1 = (IIOH >> 0x01) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI1.QRP0.OSHP () ^^PCI1.QR1A.OSHP () ^^PCI1.QR1B.OSHP () ^^PCI1.QR2A.OSHP () ^^PCI1.QR2B.OSHP () ^^PCI1.QR2C.OSHP () ^^PCI1.QR2D.OSHP () ^^PCI1.QR3A.OSHP () ^^PCI1.QR3B.OSHP () ^^PCI1.QR3C.OSHP () ^^PCI1.QR3D.OSHP () } Local1 = (IIOH >> 0x02) Local1 &= 0x01 If ((Local1 == 0x01)) { ^^PCI2.RRP0.OSHP () ^^PCI2.RR1A.OSHP () ^^PCI2.RR1B.OSHP () ^^PCI2.RR2A.OSHP () ^^PCI2.RR2B.OSHP () ^^PCI2.RR2C.OSHP () ^^PCI2.RR2D.OSHP () ^^PCI2.RR3A.OSHP () ^^PCI2.RR3B.OSHP () ^^PCI2.RR3C.OSHP () ^^PCI2.RR3D.OSHP () } Local1 = (IIOH >> 0x03) Local1 &= 0x01 If ((Local1 == 0x01)) { ^SRP0.OSHP () ^SR1A.OSHP () ^SR1B.OSHP () ^SR2A.OSHP () ^SR2B.OSHP () ^SR2C.OSHP () ^SR2D.OSHP () ^SR3A.OSHP () ^SR3B.OSHP () ^SR3C.OSHP () ^SR3D.OSHP () } GPSH = 0x01 } If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI3._OSC.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 IO80 = 0xEE Return (Arg3) } } } Method (BNC0, 0, NotSerialized) { Return (BBI3) /* \BBI3 */ } Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity { If ((CLOD == 0x00)) { Return (0x03) } Else { Return (0x06) } } Device (IIOP) { Name (_ADR, 0x00) // _ADR: Address Name (_UID, "IIO3PRES") // _UID: Unique ID OperationRegion (IIOR, PCI_Config, 0x00, 0x02) Field (IIOR, ByteAcc, NoLock, Preserve) { VID0, 16 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("d8c1a3a6-be9b-4c9b-91bf-c3cb81fc5daf") /* Dynamic Enumeration */)) { Switch (ToInteger (Arg2)) { Case (0x00) { Return (Buffer (0x01) { 0x1F // . }) } Case (0x01) { Return (Buffer (0x025C) { /* 0000 */ 0x44, 0x52, 0x48, 0x33, 0x00, 0x00, 0x00, 0x00, // DRH3.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0108 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0110 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0118 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0120 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0128 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0130 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0138 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0140 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0148 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0150 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0158 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0160 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0168 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0170 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0178 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0180 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0188 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0190 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0198 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01C8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01D8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01E8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 01F8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0200 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0208 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0210 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0218 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0220 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0228 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0230 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0238 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0240 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0248 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0250 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0258 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x02) { Return (Buffer (0xCC) { /* 0000 */ 0x41, 0x54, 0x53, 0x33, 0x00, 0x00, 0x00, 0x00, // ATS3.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0068 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0070 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0078 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0080 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0088 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0090 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0098 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00A8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00B8 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 00C8 */ 0x00, 0x00, 0x00, 0x00 // .... }) } Case (0x03) { Return (Buffer (0x68) { /* 0000 */ 0x52, 0x48, 0x53, 0x33, 0x00, 0x00, 0x00, 0x00, // RHS3.... /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0050 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } Default { } } } Return (Buffer (0x01) { 0x00 // . }) } } Method (_STA, 0, NotSerialized) // _STA: Status { Local1 = (IIOH >> 0x03) Local1 &= 0x01 If ((Local1 == 0x00)) { Return (0x00) } Else { Return (0x0F) } } Name (P3RS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FE, // Range Maximum 0x0000, // Translation Offset 0x00FF, // Length ,, ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4958, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0001, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4559, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x4659, // Range Minimum 0x0000, // Range Maximum 0x0000, // Translation Offset 0x0000, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x0000000000000000, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (P3RS) /* \_SB_.PCI3.P3RS */ } Device (MHP0) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "03-00") // _UID: Unique ID OperationRegion (MHP0, PCI_Config, 0x0E, 0x02) Field (MHP0, ByteAcc, NoLock, Preserve) { STM6, 7 } } Device (MHP1) { Name (_ADR, 0x00050001) // _ADR: Address Name (_UID, "03-01") // _UID: Unique ID OperationRegion (MHP1, PCI_Config, 0x1E, 0x02) Field (MHP1, ByteAcc, NoLock, Preserve) { STM7, 7 } } Name (_EJD, "\\_SB.SCK3") // _EJD: Ejection Dependent Device Device (SRP0) { Name (_ADR, 0x00) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001B188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SRP0.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SRP0.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SRP0.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SRP0.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SRP0.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SRP0.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SRP0.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SRP0.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SRP0.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SRP0.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SRP0.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SRP0.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SRP0.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SRP0.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SRP0.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SRP0.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SRP0.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SRP0.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR1A) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0000188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR1A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR1A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR1A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR1A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR1A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR1A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR1A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR1A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR1A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR1A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR1A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR1A.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR1A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR1A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR1A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1A.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR1A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR1A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR1B) { Name (_ADR, 0x00010001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0008188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR1B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR1B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR1B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR1B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR1B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR1B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR1B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR1B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR1B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR1B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR1B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR1B.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR1B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR1B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR1B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR1B.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR1B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR1B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR2A) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0009188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR2A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR2A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR2A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR2A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR2A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR2A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR2A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR2A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR2A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR2A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR2A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR2A.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR2A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR2A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR2A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2A.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR2A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR2A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR2B) { Name (_ADR, 0x00020001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0010188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR2B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR2B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR2B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR2B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR2B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR2B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR2B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR2B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR2B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR2B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR2B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR2B.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR2B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR2B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR2B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2B.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR2B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR2B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR2C) { Name (_ADR, 0x00020002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0011188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR2C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR2C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR2C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR2C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR2C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR2C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR2C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR2C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR2C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR2C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR2C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR2C.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR2C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR2C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR2C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2C.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR2C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR2C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR2D) { Name (_ADR, 0x00020003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0012188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR2D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR2D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR2D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR2D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR2D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR2D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR2D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR2D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR2D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR2D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR2D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR2D.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR2D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR2D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR2D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR2D.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR2D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR2D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR3A) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0013188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR3A.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR3A.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR3A.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR3A.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR3A.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR3A.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR3A.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR3A.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR3A.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR3A.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR3A.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR3A.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR3A.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR3A.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR3A.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3A.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR3A.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR3A.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR3B) { Name (_ADR, 0x00030001) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0018188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR3B.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR3B.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR3B.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR3B.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR3B.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR3B.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR3B.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR3B.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR3B.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR3B.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR3B.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR3B.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR3B.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR3B.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR3B.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3B.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR3B.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR3B.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR3C) { Name (_ADR, 0x00030002) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE0019188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR3C.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR3C.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR3C.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR3C.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR3C.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR3C.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR3C.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR3C.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR3C.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR3C.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR3C.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR3C.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR3C.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR3C.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR3C.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3C.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR3C.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR3C.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (SR3D) { Name (_ADR, 0x00030003) // _ADR: Address OperationRegion (MCTL, SystemMemory, 0xE001A188, 0x04) Field (MCTL, ByteAcc, NoLock, Preserve) { , 3, HGPE, 1, , 7, , 8, , 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { HGPE = 0x01 } Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters { 0x08, 0x40, 0x01, 0x00 }) Name (SHPC, 0x40) Name (SPDS, 0x40) Name (MRLS, 0x00) Name (CCOM, 0x10) Name (SPDC, 0x08) Name (MRLC, 0x04) Name (SPFD, 0x02) Name (SABP, 0x01) Name (SPOF, 0x10) Name (SPON, 0x0F) Name (ALMK, 0x1C) Name (ALON, 0x01) Name (ALBL, 0x02) Name (ALOF, 0x03) Name (PLMK, 0x13) Name (PLON, 0x04) Name (PLBL, 0x08) Name (PLOF, 0x0C) Name (HPEV, 0x0F) OperationRegion (PPA4, PCI_Config, 0x00, 0x0100) Field (PPA4, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 4, LDIS, 1, Offset (0xA2), Offset (0xA4), ATBP, 1, , 1, MRSP, 1, ATIP, 1, PWIP, 1, HPSR, 1, HPCP, 1, , 12, PSNM, 13, ABIE, 1, PFIE, 1, MSIE, 1, PDIE, 1, CCIE, 1, HPIE, 1, SCTL, 5, Offset (0xAA), SSTS, 7, Offset (0xAB), Offset (0xB0), Offset (0xB2), PMES, 1, PMEP, 1, Offset (0xB4) } Method (ATID, 0, NotSerialized) { Return ((SCTL & 0x03)) } Method (PWID, 0, NotSerialized) { Return (((SCTL & 0x0C) >> 0x02)) } Method (PWCC, 0, NotSerialized) { Return (((SCTL & 0x10) >> 0x04)) } Method (ABPS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x01 } Return ((SSTS & 0x01)) } Method (PFDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x02 } Return (((SSTS & 0x02) >> 0x01)) } Method (MSCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x04 } Return (((SSTS & 0x04) >> 0x02)) } Method (PDCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x08 } Return (((SSTS & 0x08) >> 0x03)) } Method (CMCS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x10 } Return (((SSTS & 0x10) >> 0x04)) } Method (MSSC, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x20 } Return (((SSTS & 0x20) >> 0x05)) } Method (PRDS, 1, NotSerialized) { If ((Arg0 == 0x01)) { SSTS |= 0x40 } Return (((SSTS & 0x40) >> 0x06)) } Method (OSHP, 0, NotSerialized) { SSTS = SSTS /* \_SB_.PCI3.SR3D.SSTS */ HGPE = 0x00 } Method (HPCC, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local1 = 0x00 If ((Arg0 != Local0)) { SCTL = Arg0 While ((!CMCS (0x00) && (0x64 != Local1))) { Sleep (0x02) Local1 += 0x02 } CMCS (0x01) } } Method (ATCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local0 &= ALMK /* \_SB_.PCI3.SR3D.ALMK */ If ((Arg0 == 0x01)) { Local0 |= ALON /* \_SB_.PCI3.SR3D.ALON */ } If ((Arg0 == 0x02)) { Local0 |= ALBL /* \_SB_.PCI3.SR3D.ALBL */ } If ((Arg0 == 0x03)) { Local0 |= ALOF /* \_SB_.PCI3.SR3D.ALOF */ } HPCC (Local0) } Method (PWCM, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local0 &= PLMK /* \_SB_.PCI3.SR3D.PLMK */ If ((Arg0 == 0x01)) { Local0 |= PLON /* \_SB_.PCI3.SR3D.PLON */ } If ((Arg0 == 0x02)) { Local0 |= PLBL /* \_SB_.PCI3.SR3D.PLBL */ } If ((Arg0 == 0x03)) { Local0 |= PLOF /* \_SB_.PCI3.SR3D.PLOF */ } HPCC (Local0) } Method (PWSL, 1, NotSerialized) { Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ If (Arg0) { Local0 &= SPON /* \_SB_.PCI3.SR3D.SPON */ } Else { Local0 |= SPOF /* \_SB_.PCI3.SR3D.SPOF */ } HPCC (Local0) } Method (_OST, 3, Serialized) // _OST: OSPM Status Indication { Switch ((Arg0 & 0xFF)) { Case (0x03) { Switch (ToInteger (Arg1)) { Case (Package (0x04) { 0x80, 0x81, 0x82, 0x83 } ) { If (!PWCC ()) { PWCM (0x01) ABIE = 0x01 } } } } } } Method (EJ0L, 1, NotSerialized) { IO80 = 0xFF Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ If ((ATID () != 0x01)) { Local0 &= ALMK /* \_SB_.PCI3.SR3D.ALMK */ Local0 |= ALBL /* \_SB_.PCI3.SR3D.ALBL */ } HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local0 |= SPOF /* \_SB_.PCI3.SR3D.SPOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local0 |= PLOF /* \_SB_.PCI3.SR3D.PLOF */ HPCC (Local0) Local0 = SCTL /* \_SB_.PCI3.SR3D.SCTL */ Local0 |= ALOF /* \_SB_.PCI3.SR3D.ALOF */ HPCC (Local0) } Method (PMEH, 1, NotSerialized) { If ((HPEV & SSTS)) { If (ABPS (0x00)) { ABPS (0x01) Sleep (0xC8) } } Return (0xFF) } Method (HPEH, 1, NotSerialized) { If (!HPCP) { Return (0xFF) } Sleep (0x64) CCIE = 0x00 If ((HPEV & SSTS)) { IO80 = 0xFD Sleep (0x0A) Local0 = PPXH (0x00) Return (Local0) } Else { Return (0xFF) } IO80 = 0xFC Sleep (0x0A) } Method (PPXH, 1, NotSerialized) { Sleep (0xC8) If (ABPS (0x00)) { If (!PRDS (0x00)) { LDIS = 0x01 PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } ABPS (0x01) Sleep (0xC8) Return (0xFF) } ABIE = 0x00 ABPS (0x01) Sleep (0xC8) If (PWCC ()) { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABIE = 0x01 ATCM (0x03) PWCM (0x02) Sleep (0x0258) LDIS = 0x00 PWSL (0x01) Sleep (0x01F4) If (!PFDS (0x00)) { PWCM (0x01) Local1 = 0x00 ABIE = 0x01 } Else { PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Local1 = 0x03 ABIE = 0x01 } ABPS (0x01) Sleep (0xC8) Return (Local1) } } Return (0xFF) } Else { ATCM (0x02) Sleep (0x0258) Local0 = 0x0258 ABPS (0x01) Sleep (0xC8) While (!ABPS (0x00)) { Sleep (0xC8) Local0 += 0xC8 If ((0x1388 == Local0)) { ABPS (0x01) ATCM (0x03) PWCM (0x02) Sleep (0xC8) ABIE = 0x01 LDIS = 0x01 PWCM (0x03) Return (0x03) } } PWCM (0x01) ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Return (0xFF) } } If (PFDS (0x00)) { PFDS (0x01) PWSL (0x00) PWCM (0x03) ATCM (0x01) LDIS = 0x01 Return (0x03) } If (PDCS (0x00)) { PDCS (0x01) If (!PRDS (0x00)) { PWSL (0x00) PWCM (0x03) If ((MSSC (0x00) == MRLS)) { ATCM (0x02) } Else { ATCM (0x03) } LDIS = 0x01 Return (0xFF) } Else { LDIS = 0x00 ABPS (0x01) Sleep (0xC8) ABIE = 0x01 Sleep (0xC8) Return (Local1) } } Return (0xFF) } Method (SNUM, 0, Serialized) { Local0 = PSNM /* \_SB_.PCI3.SR3D.PSNM */ Return (Local0) } Device (H000) { Name (_ADR, 0x00) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H001) { Name (_ADR, 0x01) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H002) { Name (_ADR, 0x02) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H003) { Name (_ADR, 0x03) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H004) { Name (_ADR, 0x04) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H005) { Name (_ADR, 0x05) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H006) { Name (_ADR, 0x06) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Device (H007) { Name (_ADR, 0x07) // _ADR: Address Method (_SUN, 0, NotSerialized) // _SUN: Slot User Number { Return (SNUM ()) } } Name (_EJD, "\\_SB.PCI3") // _EJD: Ejection Dependent Device OperationRegion (PXCS, PCI_Config, 0x00, 0xE0) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x54), , 6, HPCE, 1, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PMEX, 1, Offset (0xDC), , 31, PMCS, 1 } Method (DEVS, 0, NotSerialized) { If ((VDID == 0xFFFFFFFF)) { Return (0x00) } Else { Return (0x0F) } } Method (HPME, 0, Serialized) { If (PMEX) { Local0 = 0xC8 While (Local0) { PMEX = 0x01 If (PMEX) { Local0-- } Else { Local0 = 0x00 } } PMCS = 0x01 } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Device (CB3A) { Name (_ADR, 0x00040000) // _ADR: Address } Device (CB3B) { Name (_ADR, 0x00040001) // _ADR: Address } Device (CB3C) { Name (_ADR, 0x00040002) // _ADR: Address } Device (CB3D) { Name (_ADR, 0x00040003) // _ADR: Address } Device (CB3E) { Name (_ADR, 0x00040004) // _ADR: Address } Device (CB3F) { Name (_ADR, 0x00040005) // _ADR: Address } Device (CB3G) { Name (_ADR, 0x00040006) // _ADR: Address } Device (CB3H) { Name (_ADR, 0x00040007) // _ADR: Address } } } Scope (_GPE) { Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { Notify (\_SB.PCI0.IP2P, 0x02) // Device Wake Notify (\_SB.PWRB, 0x02) // Device Wake } Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { Notify (\_SB.PCI0.XHCI, 0x02) // Device Wake Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake Notify (\_SB.PCI0.GLAN, 0x02) // Device Wake Notify (\_SB.PWRB, 0x02) // Device Wake } } Scope (_SB) { Device (PWRB) { Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID Name (_UID, 0xAA) // _UID: Unique ID Name (_STA, 0x0B) // _STA: Status } } Name (_S0, Package (0x04) // _S0_: S0 System State { 0x00, 0x00, 0x00, 0x00 }) Name (_S3, Package (0x04) // _S3_: S3 System State { 0x05, 0x00, 0x00, 0x00 }) Name (_S4, Package (0x04) // _S4_: S4 System State { 0x06, 0x00, 0x00, 0x00 }) Name (_S5, Package (0x04) // _S5_: S5 System State { 0x07, 0x00, 0x00, 0x00 }) Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { If (Arg0) { \_SB.PCI0.LPC0.SIO1.SIOS (Arg0) \_SB.PCI0.LPC0.SPTS (Arg0) IPTS (Arg0) TBPS (Arg0) \_SB.TPM.TPTS (Arg0) } } Method (_WAK, 1, NotSerialized) // _WAK: Wake { TBWK (Arg0) IWAK (Arg0) \_SB.PCI0.LPC0.SWAK (Arg0) \_SB.PCI0.LPC0.SIO1.SIOW (Arg0) Return (WAKP) /* \WAKP */ } Scope (_SB.PCI0) { Name (SLIC, Buffer (0x9E) { "791369584825Genuine NVIDIA Certified SLI Ready Motherboard for ASUS BUDWEISER f1e2-Copyright 2014 NVIDIA Corporation All Rights Reserved-394180768352(R)" }) Device (WMI1) { Name (_HID, "PNP0C14" /* Windows Management Instrumentation Device */) // _HID: Hardware ID Name (_UID, "MXM2") // _UID: Unique ID Name (_WDG, Buffer (0x14) { /* 0000 */ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xBD, 0x4E, // <\.....N /* 0008 */ 0xB5, 0x77, 0x93, 0x1E, 0xA3, 0x2A, 0x2C, 0xC0, // .w...*,. /* 0010 */ 0x4D, 0x58, 0x01, 0x02 // MX.. }) Method (WMMX, 3, NotSerialized) { CreateDWordField (Arg2, 0x00, FUNC) If ((FUNC == 0x41494C53)) { Return (SLIC) /* \_SB_.PCI0.SLIC */ } Return (0x00) } } } Scope (_SB) { Name (RAMB, 0xBBFEC018) OperationRegion (\RAMW, SystemMemory, RAMB, 0x00010000) Field (RAMW, ByteAcc, NoLock, Preserve) { PAR0, 32, PAR1, 32, PAR2, 32, PINX, 32, PADD, 2048, DSAF, 32 } Mutex (MPAR, 0x00) Name (ARBF, Buffer (0x10){}) CreateDWordField (ARBF, 0x00, REAX) CreateDWordField (ARBF, 0x04, REBX) CreateDWordField (ARBF, 0x08, RECX) CreateDWordField (ARBF, 0x0C, REDX) OperationRegion (DEB0, SystemIO, 0x80, 0x01) Field (DEB0, ByteAcc, NoLock, Preserve) { DBG8, 8 } Method (ISMI, 1, Serialized) { SMIC = Arg0 } Method (GMSR, 1, Serialized) { If ((Acquire (MPAR, 0xFFFF) == 0x00)) { PINX = 0x80000000 PAR0 = Arg0 ISMI (0x90) RECX = Arg0 REAX = PAR1 /* \_SB_.PAR1 */ REDX = PAR2 /* \_SB_.PAR2 */ Release (MPAR) Return (ARBF) /* \_SB_.ARBF */ } Return (Ones) } Method (SMSR, 1, Serialized) { If ((Acquire (MPAR, 0xFFFF) == 0x00)) { CreateDWordField (Arg0, 0x00, AEAX) CreateDWordField (Arg0, 0x04, AEBX) CreateDWordField (Arg0, 0x08, AECX) CreateDWordField (Arg0, 0x0C, AEDX) PINX = 0x80000001 PAR0 = AECX /* \_SB_.SMSR.AECX */ PAR1 = AEAX /* \_SB_.SMSR.AEAX */ PAR2 = AEDX /* \_SB_.SMSR.AEDX */ ISMI (0x90) Release (MPAR) } Return (Ones) } Method (PRID, 1, Serialized) { If ((Acquire (MPAR, 0xFFFF) == 0x00)) { PINX = 0x80000002 PAR0 = Arg0 ISMI (0x90) REAX = PAR1 /* \_SB_.PAR1 */ REDX = PAR2 /* \_SB_.PAR2 */ Release (MPAR) Return (ARBF) /* \_SB_.ARBF */ } Return (Ones) } Method (GPRE, 1, Serialized) { PAR0 = Arg0 PINX = 0x80000005 ISMI (0x90) Return (PAR0) /* \_SB_.PAR0 */ } Method (GNVS, 1, Serialized) { PAR0 = Arg0 PINX = 0x80000003 ISMI (0x90) Return (PAR1) /* \_SB_.PAR1 */ } Method (SNVS, 2, Serialized) { PAR0 = Arg0 PAR1 = Arg1 PINX = 0x80000004 ISMI (0x90) } Method (SIRS, 0, Serialized) { PINX = 0x8000000A ISMI (0x90) } Method (SRAD, 0, Serialized) { PINX = 0x8000000B ISMI (0x90) } Method (SARM, 1, Serialized) { If (((Arg0 > 0x03) && (Arg0 < 0x06))) { ISMI (0x92) } } Method (GAMM, 0, Serialized) { ISMI (0x91) } Method (SAMM, 0, Serialized) { ISMI (0x92) } } Scope (\) { Device (AMW0) { Name (_HID, EisaId ("PNP0C14") /* Windows Management Instrumentation Device */) // _HID: Hardware ID Name (_UID, "ASUSWMI") // _UID: Unique ID Name (_WDG, Buffer (0x50) { /* 0000 */ 0xD0, 0x5E, 0x84, 0x97, 0x6D, 0x4E, 0xDE, 0x11, // .^..mN.. /* 0008 */ 0x8A, 0x39, 0x08, 0x00, 0x20, 0x0C, 0x9A, 0x66, // .9.. ..f /* 0010 */ 0x42, 0x43, 0x01, 0x02, 0xA0, 0x47, 0x67, 0x46, // BC...GgF /* 0018 */ 0xEC, 0x70, 0xDE, 0x11, 0x8A, 0x39, 0x08, 0x00, // .p...9.. /* 0020 */ 0x20, 0x0C, 0x9A, 0x66, 0x42, 0x44, 0x01, 0x02, // ..fBD.. /* 0028 */ 0x72, 0x0F, 0xBC, 0xAB, 0xA1, 0x8E, 0xD1, 0x11, // r....... /* 0030 */ 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, 0x00, 0x00, // ....)... /* 0038 */ 0xD2, 0x00, 0x01, 0x08, 0x21, 0x12, 0x90, 0x05, // ....!... /* 0040 */ 0x66, 0xD5, 0xD1, 0x11, 0xB2, 0xF0, 0x00, 0xA0, // f....... /* 0048 */ 0xC9, 0x06, 0x29, 0x10, 0x4D, 0x4F, 0x01, 0x00 // ..).MO.. }) Name (CCAC, 0x00) Name (ECD2, 0x00) Name (EID2, 0x00) Method (WED2, 1, NotSerialized) { ECD2 = Arg0 } Method (WMBC, 3, Serialized) { Local0 = 0x01 Switch (Arg1) { Case (0x43455053) { Return (SPEC (Arg2)) } Case (0x50564544) { Return (DEVP (Arg2)) } Case (0x50534453) { Return (SDSP (Arg2)) } Case (0x50534447) { Return (GDSP (Arg2)) } Case (0x53564544) { Return (DEVS (Arg2)) } Case (0x53544344) { Return (DSTS (Arg2)) } Case (0x44495047) { Return (GPID ()) } Case (0x5446424B) { Return (KBFT (Arg2)) } Case (0x59454B48) { Return (HKEY ()) } Default { Return (0x00) } } Return (Local0) } Method (RSMB, 1, Serialized) { Return (0x00) } Method (WSMB, 1, Serialized) { Return (0x00) } Method (RSMW, 1, Serialized) { Return (0x00) } Method (WSMW, 1, Serialized) { Return (0x00) } Method (RSMK, 1, Serialized) { Return (0x00) } Method (WSMK, 1, Serialized) { Return (0x00) } Method (WMBD, 3, Serialized) { Local0 = 0x01 Switch (Arg1) { Case (0x424D5352) { Return (RSMB (Arg2)) } Case (0x424D5357) { Return (WSMB (Arg2)) } Case (0x574D5352) { Return (RSMW (Arg2)) } Case (0x574D5357) { Return (WSMW (Arg2)) } Case (0x4B4D5352) { Return (RSMK (Arg2)) } Case (0x4B4D5357) { Return (WSMK (Arg2)) } Default { Return (0x00) } } Return (Local0) } Method (_WED, 1, NotSerialized) // _Wxx: Wake Event, xx=0x00-0xFF { If ((Arg0 == 0xD2)) { Return (EID2) /* \AMW0.EID2 */ } Return (0x00) } Method (AMWR, 1, Serialized) { Local1 = 0x00 If (ECD2) { EID2 = Arg0 Notify (AMW0, 0xD2) // Hardware-Specific Local1 = 0x01 } Else { } Return (Local1) } Method (AMWN, 1, Serialized) { Local0 = AMWR (Arg0) Return (Local0) } Name (WQMO, Buffer (0x09A6) { /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00, // FOMB.... /* 0008 */ 0x96, 0x09, 0x00, 0x00, 0x42, 0x38, 0x00, 0x00, // ....B8.. /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54, // DS...}.T /* 0018 */ 0xA8, 0xD1, 0x9A, 0x00, 0x01, 0x06, 0x18, 0x42, // .......B /* 0020 */ 0x10, 0x07, 0x10, 0x4A, 0x29, 0x86, 0x42, 0x04, // ...J).B. /* 0028 */ 0x0A, 0x0D, 0xA1, 0x38, 0x0A, 0x60, 0x30, 0x12, // ...8.`0. /* 0030 */ 0x20, 0x24, 0x07, 0x42, 0x2E, 0x98, 0x98, 0x00, // $.B.... /* 0038 */ 0x11, 0x10, 0xF2, 0x2A, 0xC0, 0xA6, 0x00, 0x93, // ...*.... /* 0040 */ 0x20, 0xEA, 0xDF, 0x1F, 0xA2, 0x24, 0x38, 0x94, // ....$8. /* 0048 */ 0x10, 0x08, 0x49, 0x14, 0x60, 0x5E, 0x80, 0x6E, // ..I.`^.n /* 0050 */ 0x01, 0x86, 0x05, 0xD8, 0x16, 0x60, 0x5A, 0x80, // .....`Z. /* 0058 */ 0x63, 0x48, 0x2A, 0x0D, 0x9C, 0x12, 0x58, 0x0A, // cH*...X. /* 0060 */ 0x84, 0x84, 0x0A, 0x50, 0x2E, 0xC0, 0xB7, 0x00, // ...P.... /* 0068 */ 0xED, 0x88, 0x92, 0x2C, 0xC0, 0x32, 0x8C, 0x08, // ...,.2.. /* 0070 */ 0x3C, 0x8A, 0xC8, 0x46, 0xE3, 0x04, 0x65, 0x43, // <..F..eC /* 0078 */ 0xA3, 0x64, 0x40, 0xC8, 0xB3, 0x00, 0xEB, 0xC0, // .d@..... /* 0080 */ 0x84, 0xC0, 0xEE, 0x05, 0x98, 0x13, 0xE0, 0x4D, // .......M /* 0088 */ 0x80, 0xB8, 0x61, 0x68, 0x85, 0x07, 0x10, 0xAA, // ..ah.... /* 0090 */ 0x30, 0x01, 0xB6, 0x60, 0x84, 0x52, 0x1B, 0x8C, // 0..`.R.. /* 0098 */ 0x50, 0x1A, 0x43, 0xD0, 0x30, 0x8C, 0x12, 0xF1, // P.C.0... /* 00A0 */ 0x90, 0x3A, 0x83, 0x15, 0x4A, 0xC4, 0x30, 0x21, // .:..J.0! /* 00A8 */ 0x22, 0x54, 0x86, 0x41, 0x86, 0x15, 0x2A, 0x5A, // "T.A..*Z /* 00B0 */ 0xDC, 0x08, 0xED, 0x0F, 0x82, 0x44, 0x5B, 0xB1, // .....D[. /* 00B8 */ 0x86, 0xEA, 0x48, 0xA3, 0x41, 0x0D, 0x2F, 0xC1, // ..H.A./. /* 00C0 */ 0xE1, 0x7A, 0xA8, 0xE7, 0xD8, 0xB9, 0x00, 0xE9, // .z...... /* 00C8 */ 0xC0, 0x02, 0x09, 0x7E, 0x16, 0x75, 0x8E, 0x93, // ...~.u.. /* 00D0 */ 0x80, 0x24, 0x30, 0xD6, 0xF1, 0xB3, 0x81, 0xE3, // .$0..... /* 00D8 */ 0x5D, 0x03, 0x6A, 0xC6, 0xC7, 0xCB, 0x04, 0xC1, // ].j..... /* 00E0 */ 0xA1, 0x86, 0xE8, 0x81, 0x86, 0x3B, 0x81, 0x43, // .....;.C /* 00E8 */ 0x64, 0x80, 0x9E, 0xD3, 0xD1, 0x60, 0x0E, 0x00, // d....`.. /* 00F0 */ 0x76, 0x38, 0x19, 0xDD, 0x03, 0x4A, 0x15, 0x60, // v8...J.` /* 00F8 */ 0x76, 0xCC, 0xB2, 0x08, 0xA4, 0xF1, 0x18, 0xFA, // v....... /* 0100 */ 0x74, 0xCF, 0xE7, 0x84, 0x13, 0x58, 0xFE, 0x20, // t....X. /* 0108 */ 0x50, 0x23, 0x33, 0xB4, 0x0D, 0x4E, 0x4B, 0x98, // P#3..NK. /* 0110 */ 0x21, 0x0F, 0xFF, 0xB0, 0x98, 0x58, 0x08, 0x7D, // !....X.} /* 0118 */ 0x10, 0x3C, 0x1E, 0x78, 0xFF, 0xFF, 0xF1, 0x80, // .<.x.... /* 0120 */ 0x47, 0xF1, 0x99, 0x40, 0x08, 0xAF, 0x04, 0xB1, // G..@.... /* 0128 */ 0x3D, 0xA0, 0xE7, 0x04, 0x03, 0x63, 0x07, 0x64, // =....c.d /* 0130 */ 0xBF, 0x02, 0x10, 0x82, 0x97, 0x39, 0x22, 0x39, // .....9"9 /* 0138 */ 0x45, 0xD0, 0x98, 0x8C, 0xD1, 0x2A, 0x84, 0x86, // E....*.. /* 0140 */ 0x10, 0xDA, 0x10, 0x67, 0x17, 0xFF, 0xE0, 0x0D, // ...g.... /* 0148 */ 0x73, 0xEE, 0x26, 0x28, 0x72, 0x04, 0xA8, 0xCF, // s.&(r... /* 0150 */ 0x84, 0x47, 0xC0, 0x8F, 0x01, 0xD1, 0x43, 0x9F, // .G....C. /* 0158 */ 0x4D, 0xF4, 0xE3, 0x89, 0x72, 0x12, 0x07, 0xE4, // M...r... /* 0160 */ 0x33, 0x83, 0x11, 0x82, 0x97, 0x7B, 0x48, 0x20, // 3....{H /* 0168 */ 0x9A, 0xE7, 0xA0, 0x13, 0xC3, 0x39, 0x1D, 0x02, // .....9.. /* 0170 */ 0x53, 0xA3, 0x05, 0xA2, 0x09, 0x10, 0x45, 0x59, // S.....EY /* 0178 */ 0xAA, 0x6C, 0x2C, 0xD5, 0x83, 0xA0, 0x82, 0x80, // .l,..... /* 0180 */ 0x34, 0x77, 0x43, 0x9C, 0xB4, 0x91, 0x03, 0xC7, // 4wC..... /* 0188 */ 0xA8, 0x7E, 0xD8, 0x54, 0x04, 0x9C, 0x0E, 0x1B, // .~.T.... /* 0190 */ 0x1E, 0xB7, 0xE3, 0x93, 0x28, 0xFA, 0x80, 0x28, // ....(..( /* 0198 */ 0x9C, 0xC3, 0x9E, 0x39, 0x28, 0x88, 0x01, 0x9D, // ...9(... /* 01A0 */ 0x04, 0x42, 0x4E, 0x8E, 0x02, 0xA8, 0xBD, 0x68, // .BN....h /* 01A8 */ 0x58, 0x1A, 0xD7, 0xA9, 0xBD, 0x09, 0x78, 0x5A, // X.....xZ /* 01B0 */ 0x8F, 0x05, 0x87, 0x71, 0x5C, 0x67, 0x6D, 0xD1, // ...q\gm. /* 01B8 */ 0x37, 0x06, 0x3A, 0x1F, 0xDF, 0x05, 0xB8, 0x06, // 7.:..... /* 01C0 */ 0x08, 0xCD, 0xC8, 0xF0, 0x56, 0x03, 0x48, 0xC1, // ....V.H. /* 01C8 */ 0xF8, 0x49, 0xE0, 0x11, 0xC0, 0x04, 0xD6, 0x75, // .I.....u /* 01D0 */ 0x20, 0x80, 0x7E, 0xD9, 0xF0, 0xF0, 0x7D, 0xC2, // .~...}. /* 01D8 */ 0x78, 0xBC, 0x48, 0x50, 0xDF, 0x7D, 0x00, 0x14, // x.HP.}.. /* 01E0 */ 0x40, 0x3E, 0x00, 0x58, 0xE9, 0x1D, 0x80, 0x8E, // @>.X.... /* 01E8 */ 0x21, 0x44, 0x98, 0x68, 0x46, 0xE7, 0x12, 0x56, // !D.hF..V /* 01F0 */ 0xAA, 0xFF, 0xFF, 0x68, 0xF9, 0x41, 0xC5, 0xA3, // ...h.A.. /* 01F8 */ 0x35, 0x88, 0x47, 0xEB, 0x40, 0xA3, 0x45, 0x1F, // 5.G.@.E. /* 0200 */ 0x33, 0xAC, 0x70, 0x54, 0xF2, 0x39, 0x01, 0x0D, // 3.pT.9.. /* 0208 */ 0x17, 0x06, 0x41, 0xE1, 0x07, 0x0E, 0x68, 0x80, // ..A...h. /* 0210 */ 0xA7, 0xF7, 0x66, 0xE0, 0x99, 0x18, 0xCE, 0xF3, // ..f..... /* 0218 */ 0xE5, 0x70, 0x9E, 0x2F, 0x1F, 0x8E, 0x0F, 0x14, // .p./.... /* 0220 */ 0xF0, 0x07, 0x8C, 0x25, 0x28, 0x70, 0xC2, 0x20, // ...%(p. /* 0228 */ 0x87, 0xC7, 0x08, 0x1E, 0x2C, 0x95, 0x35, 0x2E, // ....,.5. /* 0230 */ 0xD4, 0xFD, 0xC0, 0x27, 0x1A, 0x86, 0x7D, 0xA8, // ...'..}. /* 0238 */ 0x47, 0xF3, 0x96, 0x70, 0x86, 0x6F, 0x13, 0x07, // G..p.o.. /* 0240 */ 0xF5, 0xEE, 0x61, 0xA7, 0x42, 0x2D, 0x3A, 0x84, // ..a.B-:. /* 0248 */ 0xF5, 0x48, 0x39, 0xAC, 0xD1, 0xC2, 0x1E, 0xF0, // .H9..... /* 0250 */ 0x73, 0x87, 0xEF, 0x19, 0xFC, 0x4A, 0xE3, 0x63, // s....J.c /* 0258 */ 0x08, 0x5D, 0x85, 0x4E, 0x15, 0x5C, 0x14, 0x84, // .].N.\.. /* 0260 */ 0xE2, 0xAD, 0x45, 0xC3, 0x3F, 0x0B, 0x8F, 0xEB, // ..E.?... /* 0268 */ 0x15, 0xC3, 0x57, 0x80, 0x87, 0x13, 0x9F, 0x01, // ..W..... /* 0270 */ 0xE2, 0x07, 0x3A, 0x82, 0x17, 0x11, 0x9F, 0x7D, // ..:....} /* 0278 */ 0x7C, 0x79, 0xF1, 0x21, 0x83, 0x9D, 0x2C, 0x78, // |y.!..,x /* 0280 */ 0x08, 0x0A, 0xC5, 0x38, 0x1C, 0xA0, 0x84, 0xC3, // ...8.... /* 0288 */ 0x08, 0xCE, 0x20, 0x1E, 0x9E, 0x83, 0x1C, 0x0E, // .. ..... /* 0290 */ 0xD0, 0xE7, 0x20, 0x0F, 0x84, 0x0D, 0xC2, 0x20, // .. .... /* 0298 */ 0xE7, 0xF1, 0xF2, 0xC3, 0x2E, 0x16, 0xF8, 0xFF, // ........ /* 02A0 */ 0xFF, 0xC5, 0x02, 0x78, 0xA5, 0x19, 0x14, 0x5A, // ...x...Z /* 02A8 */ 0xCF, 0xA0, 0x20, 0x60, 0x3C, 0x3F, 0x78, 0xBC, // .. `<?x. /* 02B0 */ 0x9E, 0xAD, 0xA7, 0x05, 0xDE, 0x11, 0xFB, 0xFC, // ........ /* 02B8 */ 0x01, 0x9C, 0xC3, 0x1F, 0x5E, 0x50, 0x71, 0x87, // ....^Pq. /* 02C0 */ 0x44, 0x41, 0x7C, 0x36, 0x70, 0x94, 0xF1, 0xA2, // DA|6p... /* 02C8 */ 0x67, 0xE2, 0xC3, 0x90, 0x8F, 0x0B, 0x4F, 0x37, // g.....O7 /* 02D0 */ 0x98, 0xC3, 0x07, 0xB8, 0x47, 0xE2, 0xC3, 0x07, // ....G... /* 02D8 */ 0xF0, 0xF8, 0xFF, 0x1F, 0x3E, 0x80, 0x9F, 0x44, // ....>..D /* 02E0 */ 0x8B, 0x5A, 0x85, 0x1E, 0x3E, 0xC0, 0x15, 0xE4, // .Z..>... /* 02E8 */ 0x84, 0x84, 0x96, 0x73, 0xF8, 0x40, 0x4E, 0x24, // ...s.@N$ /* 02F0 */ 0x4C, 0x74, 0x9F, 0x91, 0x5E, 0x3C, 0x2C, 0xE1, // Lt..^<,. /* 02F8 */ 0xE0, 0x81, 0x0A, 0x4F, 0xA2, 0xF8, 0xA7, 0x02, // ...O.... /* 0300 */ 0x54, 0xE0, 0x53, 0x01, 0x05, 0x31, 0xA0, 0x0F, // T.S..1.. /* 0308 */ 0x15, 0x70, 0x66, 0xF0, 0xEC, 0x85, 0x99, 0x07, // .pf..... /* 0310 */ 0x8C, 0x33, 0x12, 0x60, 0xEB, 0x50, 0x01, 0xDE, // .3.`.P.. /* 0318 */ 0xFF, 0xFF, 0xA1, 0x02, 0x38, 0x1C, 0x90, 0x00, // ....8... /* 0320 */ 0x59, 0x12, 0x2F, 0x48, 0x0F, 0x15, 0xE0, 0x3A, // Y./H...: /* 0328 */ 0x70, 0xFA, 0x50, 0xC1, 0x0F, 0x9A, 0x16, 0x05, // p.P..... /* 0330 */ 0xA4, 0x23, 0x9E, 0x0F, 0x15, 0x30, 0x2E, 0x42, // .#...0.B /* 0338 */ 0x86, 0x7F, 0xAD, 0x3B, 0x96, 0xE7, 0x30, 0x72, // ...;..0r /* 0340 */ 0xAE, 0x40, 0xC7, 0x3E, 0x18, 0xA0, 0x82, 0x8E, // .@.>.... /* 0348 */ 0x9E, 0x82, 0x18, 0xD0, 0x29, 0x0E, 0x06, 0x68, // ....)..h /* 0350 */ 0x1D, 0xE7, 0x0A, 0xD4, 0x31, 0x0E, 0xF8, 0xFD, // ....1... /* 0358 */ 0xFF, 0xCF, 0x14, 0xC0, 0x49, 0xC4, 0xD1, 0x0A, // ....I... /* 0360 */ 0x35, 0x5C, 0x8F, 0xD5, 0x20, 0x1E, 0xAB, 0x8F, // 5\.. ... /* 0368 */ 0xA1, 0x1E, 0x2B, 0xEE, 0x1B, 0xE0, 0x23, 0x00, // ..+...#. /* 0370 */ 0xFE, 0xE8, 0x84, 0x03, 0x7B, 0xAE, 0x00, 0x4C, // ....{..L /* 0378 */ 0x7B, 0x3C, 0x57, 0x80, 0x4E, 0xDA, 0xD9, 0x07, // {<W.N... /* 0380 */ 0x1D, 0x70, 0xAD, 0x3A, 0x89, 0xE1, 0xCF, 0x71, // .p.:...q /* 0388 */ 0x8C, 0x60, 0xA8, 0xC3, 0x1B, 0x85, 0x70, 0x1C, // .`....p. /* 0390 */ 0x0A, 0x85, 0x39, 0x19, 0xD0, 0xFF, 0xFF, 0x11, // ..9..... /* 0398 */ 0x96, 0xC0, 0x51, 0x10, 0x0F, 0xCD, 0x61, 0xCE, // ..Q...a. /* 03A0 */ 0x70, 0xA0, 0x39, 0x16, 0xC0, 0xBB, 0x55, 0xB0, // p.9...U. /* 03A8 */ 0x63, 0x01, 0x6C, 0x02, 0x1F, 0x0B, 0xC0, 0x17, // c.l..... /* 03B0 */ 0x67, 0x58, 0xE8, 0xD1, 0xFA, 0xFE, 0x87, 0xBB, // gX...... /* 03B8 */ 0x3F, 0x44, 0x79, 0x29, 0xF6, 0x21, 0x07, 0xEE, // ?Dy).!.. /* 03C0 */ 0xB8, 0xC0, 0x71, 0x7A, 0x00, 0x5C, 0x1D, 0xC4, // ..qz.\.. /* 03C8 */ 0xE4, 0xF4, 0xF4, 0x00, 0xAE, 0x24, 0xA7, 0x07, // .....$.. /* 03D0 */ 0xD4, 0x80, 0xFD, 0xFF, 0xD7, 0x03, 0xA4, 0x73, // .......s /* 03D8 */ 0x02, 0xF6, 0xA2, 0xCD, 0x20, 0x4E, 0xF4, 0x79, // .... N.y /* 03E0 */ 0xC4, 0x0A, 0x8E, 0x38, 0xA8, 0xEC, 0x24, 0x4A, // ...8..$J /* 03E8 */ 0x7E, 0xC4, 0x41, 0x65, 0x1D, 0x3B, 0x05, 0x31, // ~.Ae.;.1 /* 03F0 */ 0xA0, 0x4F, 0x94, 0x80, 0x8F, 0x3B, 0x0E, 0xB0, // .O...;.. /* 03F8 */ 0xD8, 0xA8, 0x27, 0xCB, 0x23, 0x4F, 0x96, 0x82, // ..'.#O.. /* 0400 */ 0x78, 0xB2, 0xBE, 0x54, 0x00, 0x87, 0x1B, 0x0E, // x..T.... /* 0408 */ 0xB0, 0xFF, 0xFF, 0x5F, 0x2A, 0x80, 0x92, 0x43, // ..._*..C /* 0410 */ 0xA9, 0x97, 0x0A, 0x90, 0xC9, 0xBB, 0xE1, 0xA0, // ........ /* 0418 */ 0x43, 0xAE, 0x55, 0xF7, 0x3A, 0x76, 0x6C, 0xF5, // C.U.:vl. /* 0420 */ 0xB8, 0x7D, 0x93, 0xC6, 0x04, 0xBB, 0xE1, 0xA0, // .}...... /* 0428 */ 0x22, 0x51, 0x28, 0xD0, 0xB9, 0x00, 0x15, 0x01, // "Q(..... /* 0430 */ 0x8E, 0x82, 0x78, 0x68, 0x3E, 0x17, 0x58, 0xC9, // ..xh>.X. /* 0438 */ 0xB9, 0x00, 0xED, 0xFD, 0x42, 0x41, 0x06, 0xE7, // ....BA.. /* 0440 */ 0x7B, 0x81, 0x61, 0x8A, 0x1F, 0x8A, 0xEE, 0x3D, // {.a....= /* 0448 */ 0x3E, 0x17, 0x80, 0xFB, 0x8A, 0x03, 0x2E, 0x63, // >......c /* 0450 */ 0x02, 0xB4, 0x41, 0x92, 0x7B, 0xB8, 0xC7, 0x85, // ..A.{... /* 0458 */ 0x1B, 0x87, 0x47, 0x75, 0x4C, 0x31, 0x9F, 0xE3, // ..GuL1.. /* 0460 */ 0x82, 0x3C, 0xC7, 0x79, 0x5E, 0xB8, 0xF3, 0x03, // .<.y^... /* 0468 */ 0x70, 0xFB, 0xFF, 0x0F, 0x0C, 0xD6, 0x85, 0x0B, // p....... /* 0470 */ 0x88, 0x0B, 0x35, 0x29, 0xF1, 0xFC, 0x00, 0xAE, // ..5).... /* 0478 */ 0x5B, 0xB7, 0xEF, 0x85, 0x38, 0x29, 0x77, 0x57, // [...8)wW /* 0480 */ 0x14, 0xC6, 0x2B, 0x49, 0x0C, 0xDF, 0x53, 0x8D, // ..+I..S. /* 0488 */ 0x6D, 0x98, 0x03, 0x38, 0x15, 0xE3, 0x24, 0x18, // m..8..$. /* 0490 */ 0xFC, 0xEC, 0x40, 0xC7, 0xE5, 0xC8, 0x24, 0xBA, // ..@...$. /* 0498 */ 0xED, 0xFB, 0x08, 0xC1, 0x63, 0x8E, 0x9E, 0x82, // ....c... /* 04A0 */ 0x18, 0xD0, 0x19, 0x4E, 0x2A, 0x68, 0x15, 0x20, // ...N*h. /* 04A8 */ 0x9A, 0x02, 0xE6, 0xE6, 0x0A, 0xF8, 0xFB, 0xFF, // ........ /* 04B0 */ 0xDF, 0x5C, 0x01, 0x56, 0xB8, 0x54, 0xA8, 0x51, // .\.V.T.Q /* 04B8 */ 0xEA, 0x91, 0x02, 0x5C, 0x77, 0x40, 0xDF, 0xC2, // ...\w@.. /* 04C0 */ 0x70, 0x92, 0x80, 0x74, 0x65, 0x3D, 0x8D, 0x07, // p..te=.. /* 04C8 */ 0x00, 0x5F, 0x29, 0x60, 0x5C, 0x3C, 0xD9, 0x11, // ._)`\<.. /* 04D0 */ 0x87, 0xDF, 0xAE, 0x7D, 0x2C, 0x00, 0xE6, 0xFF, // ...},... /* 04D8 */ 0xFF, 0x2B, 0x21, 0x58, 0x8F, 0x05, 0xC0, 0x5B, // .+!X...[ /* 04E0 */ 0xA4, 0x4B, 0x8B, 0x66, 0x8F, 0x05, 0xE0, 0x12, // .K.f.... /* 04E8 */ 0xBF, 0x0A, 0x7A, 0x50, 0xB1, 0x5C, 0x18, 0x94, // ..zP.\.. /* 04F0 */ 0x84, 0xB1, 0x43, 0x19, 0xCD, 0xC1, 0x1C, 0x43, // ..C....C /* 04F8 */ 0x70, 0x76, 0x86, 0x31, 0x1C, 0x1F, 0xA8, 0xA7, // pv.1.... /* 0500 */ 0xFE, 0x58, 0x7B, 0x1A, 0xAF, 0x68, 0xBE, 0xE2, // .X{..h.. /* 0508 */ 0xF9, 0x3E, 0x4A, 0x87, 0x88, 0xBA, 0xEA, 0x79, // .>J....y /* 0510 */ 0xAC, 0x6F, 0x05, 0xA7, 0xF6, 0xAC, 0xE7, 0x6B, // .o.....k /* 0518 */ 0x8B, 0x61, 0x12, 0x78, 0x88, 0x0C, 0x8D, 0x13, // .a.x.... /* 0520 */ 0xBC, 0x23, 0x19, 0x9A, 0xCB, 0x80, 0xD0, 0x5D, // .#.....] /* 0528 */ 0xE9, 0x35, 0xC0, 0x73, 0x33, 0x41, 0xF7, 0x43, // .5.s3A.C /* 0530 */ 0x97, 0x42, 0x04, 0x9D, 0x00, 0xDE, 0x09, 0x6A, // .B.....j /* 0538 */ 0x14, 0xE0, 0xED, 0x2A, 0x20, 0x5B, 0x02, 0xC4, // ...* [.. /* 0540 */ 0x8D, 0x5E, 0x58, 0x6F, 0x45, 0x51, 0x42, 0x44, // .^XoEQBD /* 0548 */ 0x08, 0x1A, 0xC5, 0x78, 0x11, 0x42, 0x85, 0x88, // ...x.B.. /* 0550 */ 0x12, 0xB5, 0x39, 0x10, 0x5D, 0x8E, 0xA2, 0x06, // ..9.]... /* 0558 */ 0x89, 0x16, 0xCC, 0x08, 0xCC, 0xFE, 0x20, 0x88, // ...... . /* 0560 */ 0xF4, 0x67, 0x80, 0x2E, 0x33, 0xBE, 0x0C, 0x7B, // .g..3..{ /* 0568 */ 0x34, 0xFC, 0x2C, 0xC5, 0x87, 0x7A, 0x8E, 0x8F, // 4.,..z.. /* 0570 */ 0x8A, 0xEC, 0xFF, 0x0F, 0xF2, 0x5A, 0x68, 0x9D, // .....Zh. /* 0578 */ 0xE3, 0x24, 0x87, 0x1C, 0x83, 0xEB, 0x0C, 0x01, // .$...... /* 0580 */ 0xCD, 0x35, 0xA0, 0x8E, 0xFD, 0x1E, 0xAF, 0xBF, // .5...... /* 0588 */ 0x1A, 0x86, 0xE3, 0x43, 0xF4, 0xA1, 0xC2, 0x13, // ...C.... /* 0590 */ 0x38, 0x44, 0x06, 0xE8, 0x43, 0x04, 0xFC, 0xF1, // 8D..C... /* 0598 */ 0x18, 0xFA, 0x29, 0xC2, 0x13, 0x7E, 0xA1, 0x25, // ..)..~.% /* 05A0 */ 0x83, 0x40, 0x9D, 0x34, 0xF8, 0x48, 0x5F, 0xB8, // .@.4.H_. /* 05A8 */ 0xD9, 0xED, 0xC3, 0x04, 0x16, 0x7B, 0x76, 0xA0, // .....{v. /* 05B0 */ 0xE3, 0x01, 0xBF, 0xE2, 0x33, 0x81, 0xAE, 0x71, // ....3..q /* 05B8 */ 0xC6, 0xF6, 0xC9, 0xC8, 0x11, 0x0E, 0x22, 0x50, // ......"P /* 05C0 */ 0x40, 0x9F, 0x4D, 0xF8, 0xCD, 0x83, 0x1D, 0x2D, // @.M....- /* 05C8 */ 0xB8, 0xA8, 0xA3, 0x05, 0xEA, 0xB4, 0xE0, 0x83, // ........ /* 05D0 */ 0x02, 0x43, 0x7C, 0xF8, 0x34, 0xC4, 0x93, 0x05, // .C|.4... /* 05D8 */ 0x3B, 0xEA, 0x80, 0x53, 0xDE, 0x21, 0x04, 0x14, // ;..S.!.. /* 05E0 */ 0x20, 0x3E, 0x59, 0xB0, 0x79, 0x61, 0x08, 0x2C, // >Y.ya., /* 05E8 */ 0x12, 0x1E, 0x75, 0xE8, 0x30, 0x3C, 0x3F, 0x25, // ..u.0<?% /* 05F0 */ 0x3C, 0x8E, 0x30, 0xEC, 0x37, 0x12, 0x4F, 0xE1, // <.0.7.O. /* 05F8 */ 0x70, 0x7C, 0xA4, 0x30, 0x42, 0xF0, 0x72, 0x4F, // p|.0B.rO /* 0600 */ 0x16, 0xE4, 0x62, 0x73, 0x74, 0xFF, 0xFF, 0x27, // ..bst..' /* 0608 */ 0x18, 0xCC, 0x50, 0x3D, 0x04, 0x7E, 0x5E, 0xF0, // ..P=.~^. /* 0610 */ 0x10, 0xF8, 0x00, 0x5A, 0x9D, 0x1D, 0x39, 0x9F, // ...Z..9. /* 0618 */ 0x9C, 0x13, 0x6E, 0xBC, 0x7C, 0x4C, 0xD8, 0x01, // ..n.|L.. /* 0620 */ 0xF0, 0xE0, 0x4B, 0xF2, 0x59, 0x84, 0xC6, 0x58, // ..K.Y..X /* 0628 */ 0xBE, 0x8F, 0x23, 0x80, 0x9C, 0x49, 0x3C, 0x81, // ..#..I<. /* 0630 */ 0x44, 0x78, 0x19, 0x09, 0x12, 0xE2, 0x58, 0x5E, // Dx....X^ /* 0638 */ 0x43, 0x0C, 0x12, 0xE3, 0xED, 0xC8, 0xC7, 0x11, // C....... /* 0640 */ 0x0E, 0xF3, 0x4C, 0x62, 0xB8, 0x87, 0x83, 0x57, // ..Lb...W /* 0648 */ 0x91, 0x17, 0x12, 0xC3, 0x3C, 0x8A, 0xF8, 0x7C, // ....<..| /* 0650 */ 0x10, 0xC3, 0x98, 0xA1, 0xA2, 0x9D, 0x80, 0x8F, // ........ /* 0658 */ 0x23, 0xEC, 0x58, 0xE9, 0xA1, 0xFA, 0x38, 0x02, // #.X...8. /* 0660 */ 0x58, 0xFA, 0xFF, 0x1F, 0x47, 0x80, 0xF9, 0x11, // X...G... /* 0668 */ 0x01, 0x77, 0xDA, 0x80, 0x7B, 0x9F, 0x08, 0xF1, // .w..{... /* 0670 */ 0xA4, 0xF1, 0x92, 0xF0, 0xAC, 0x01, 0x5C, 0x84, // ......\. /* 0678 */ 0x6A, 0x39, 0xF7, 0xB0, 0x34, 0x8F, 0x01, 0x1D, // j9..4... /* 0680 */ 0xCF, 0x38, 0x87, 0x35, 0x01, 0x69, 0x98, 0xFC, // .8.5.i.. /* 0688 */ 0xCA, 0xED, 0x73, 0xC1, 0xD9, 0x3D, 0x72, 0x1B, // ..s..=r. /* 0690 */ 0x26, 0xC8, 0x13, 0xC1, 0x6B, 0x94, 0xC1, 0x05, // &...k... /* 0698 */ 0xA9, 0xF3, 0x23, 0x4F, 0x4F, 0x21, 0xDD, 0x27, // ..#OO!.' /* 06A0 */ 0x5A, 0x94, 0xD2, 0x63, 0x1A, 0x05, 0xF1, 0x19, // Z..c.... /* 06A8 */ 0xC1, 0x21, 0xCE, 0x31, 0xE8, 0xE1, 0x7B, 0x0E, // .!.1..{. /* 06B0 */ 0x67, 0x74, 0x20, 0xEF, 0x01, 0xEC, 0xFE, 0x08, // gt ..... /* 06B8 */ 0x3C, 0x4F, 0x3A, 0x78, 0x74, 0xDF, 0x14, 0xCE, // <O:xt... /* 06C0 */ 0xF3, 0x4C, 0xFF, 0xFF, 0x47, 0x04, 0xDE, 0x99, // .L..G... /* 06C8 */ 0xFA, 0x82, 0x09, 0x9C, 0x43, 0xDC, 0x05, 0x50, // ....C..P /* 06D0 */ 0xB2, 0xEF, 0x02, 0x14, 0xC4, 0x13, 0xF3, 0xD5, // ........ /* 06D8 */ 0x0F, 0x0E, 0xFE, 0xAB, 0x1F, 0x30, 0xB9, 0x2C, // .....0., /* 06E0 */ 0xF8, 0x9A, 0x04, 0xBE, 0x53, 0x3F, 0xFE, 0xC2, // ....S?.. /* 06E8 */ 0xE0, 0xDB, 0xC0, 0xC3, 0x13, 0x1B, 0x14, 0xF8, // ........ /* 06F0 */ 0xA1, 0x7C, 0x3D, 0x04, 0xFF, 0xFF, 0xFF, 0x7A, // .|=....z /* 06F8 */ 0x08, 0x3C, 0x95, 0x3A, 0xB5, 0xA9, 0xF0, 0x7A, // .<.:...z /* 0700 */ 0x08, 0xAE, 0x28, 0xD7, 0x12, 0xD4, 0xAD, 0xC9, // ..(..... /* 0708 */ 0x82, 0x80, 0x74, 0x3F, 0x7F, 0xBE, 0x31, 0xA6, // ..t?..1. /* 0710 */ 0xCF, 0x25, 0xF0, 0xEE, 0xA0, 0x5A, 0x95, 0xEE, // .%...Z.. /* 0718 */ 0x25, 0x3C, 0x38, 0x85, 0xA2, 0x1F, 0x1E, 0x50, // %<8....P /* 0720 */ 0x61, 0x0F, 0x0F, 0x14, 0xC4, 0x17, 0x23, 0xDF, // a.....#. /* 0728 */ 0x4B, 0x00, 0x0E, 0xFC, 0xFF, 0x47, 0xC4, 0x6F, // K....G.o /* 0730 */ 0xDA, 0x70, 0x8E, 0x16, 0x98, 0x19, 0x81, 0xF5, // .p...... /* 0738 */ 0x44, 0xE0, 0x9B, 0x36, 0xE0, 0xE8, 0xE4, 0x02, // D..6.... /* 0740 */ 0x5C, 0x4E, 0x25, 0x80, 0x2B, 0xAF, 0xA7, 0x12, // \N%.+... /* 0748 */ 0xFD, 0xFF, 0x4F, 0x25, 0xE0, 0xBA, 0x7B, 0x81, // ..O%..{. /* 0750 */ 0xE9, 0x6A, 0x72, 0x26, 0xD1, 0x82, 0xFB, 0xEE, // .jr&.... /* 0758 */ 0x05, 0xF0, 0xF3, 0xFF, 0x7F, 0xF7, 0x02, 0x88, // ........ /* 0760 */ 0xE9, 0xF5, 0xEE, 0x05, 0xBC, 0xCE, 0x25, 0x98, // ......%. /* 0768 */ 0xBB, 0x97, 0xFF, 0xFF, 0x77, 0x2F, 0x80, 0xFF, // ....w/.. /* 0770 */ 0xFF, 0xFF, 0xBB, 0x17, 0x40, 0x96, 0x53, 0x09, // ....@.S. /* 0778 */ 0xC8, 0xB2, 0x9D, 0x4A, 0xD0, 0x0A, 0xCF, 0xD1, // ...J.... /* 0780 */ 0x50, 0x27, 0x70, 0x28, 0x4F, 0x18, 0xAF, 0xEA, // P'p(O... /* 0788 */ 0x09, 0xAC, 0xE7, 0xF2, 0x85, 0x52, 0x02, 0xA3, // .....R.. /* 0790 */ 0xCB, 0x17, 0xB0, 0xFB, 0xFF, 0x5F, 0xBE, 0x00, // ....._.. /* 0798 */ 0x3E, 0x04, 0xBA, 0x0B, 0xA0, 0x22, 0xDC, 0x05, // >....".. /* 07A0 */ 0x28, 0x88, 0x2F, 0x5F, 0x80, 0x97, 0x50, 0x10, // (./_..P. /* 07A8 */ 0x32, 0x72, 0x93, 0xA0, 0x97, 0x2F, 0x38, 0x17, // 2r.../8. /* 07B0 */ 0x07, 0xDF, 0x8F, 0x3C, 0x28, 0x78, 0xFF, 0xFF, // ...<(x.. /* 07B8 */ 0x41, 0xC1, 0x19, 0xCC, 0x79, 0x17, 0x7B, 0x52, // A...y.{R /* 07C0 */ 0xA4, 0xD7, 0x13, 0xB8, 0x77, 0x0E, 0x8F, 0x0D, // ....w... /* 07C8 */ 0x1C, 0xE2, 0xAE, 0x60, 0xC0, 0xDE, 0xE5, 0xED, // ...`.... /* 07D0 */ 0x04, 0x5C, 0xDA, 0xD6, 0xAE, 0xDB, 0x09, 0x2E, // .\...... /* 07D8 */ 0xE1, 0x71, 0x1A, 0xF2, 0xF1, 0x04, 0x93, 0xE7, // .q...... /* 07E0 */ 0x76, 0x82, 0x4A, 0x02, 0xA3, 0x2C, 0x24, 0x3A, // v.J..,$: /* 07E8 */ 0x42, 0x70, 0xF5, 0x37, 0x31, 0x0A, 0x62, 0x0B, // Bp.71.b. /* 07F0 */ 0xB7, 0x13, 0x40, 0xC7, 0xFF, 0xFF, 0x76, 0x02, // ..@...v. /* 07F8 */ 0xFC, 0xC7, 0x0C, 0x67, 0x44, 0xEF, 0x15, 0x86, // ...gD... /* 0800 */ 0xF4, 0x19, 0x0C, 0x98, 0x06, 0x3A, 0x82, 0xA0, // .....:.. /* 0808 */ 0x2F, 0x69, 0xD8, 0x04, 0x37, 0x10, 0x3A, 0x23, // /i..7.:# /* 0810 */ 0x78, 0x17, 0x10, 0xB8, 0x13, 0x83, 0x75, 0x00, // x.....u. /* 0818 */ 0x01, 0xDF, 0x59, 0x0D, 0x78, 0xFD, 0xFF, 0xCF, // ..Y.x... /* 0820 */ 0x6A, 0xC0, 0xF4, 0x00, 0xE0, 0xB3, 0x1A, 0xA0, // j....... /* 0828 */ 0xEA, 0xF6, 0x02, 0x32, 0x85, 0x36, 0x7D, 0x6A, // ...2.6}j /* 0830 */ 0x34, 0x6A, 0xD5, 0xA0, 0x4C, 0x8D, 0x32, 0x0D, // 4j..L.2. /* 0838 */ 0x6A, 0xF5, 0xA9, 0xD4, 0x98, 0x31, 0xBB, 0x60, // j....1.` /* 0840 */ 0x8A, 0x71, 0x7B, 0xA2, 0x22, 0x96, 0x23, 0x10, // .q{.".#. /* 0848 */ 0xEB, 0xA6, 0x90, 0x91, 0xCB, 0x86, 0x41, 0x04, // ......A. /* 0850 */ 0x64, 0xD9, 0x8B, 0x16, 0x10, 0x01, 0x11, 0x90, // d....... /* 0858 */ 0x85, 0xBC, 0x1B, 0x04, 0x64, 0x55, 0x20, 0x02, // ....dU . /* 0860 */ 0x72, 0x2A, 0x20, 0x1A, 0x11, 0x88, 0xC6, 0xF1, // r* ..... /* 0868 */ 0x00, 0xC4, 0xC2, 0x81, 0x08, 0xC8, 0xEA, 0x4C, // .......L /* 0870 */ 0x00, 0x31, 0xA9, 0x20, 0xBA, 0x43, 0x90, 0xCF, // .1. .C.. /* 0878 */ 0x85, 0x80, 0x2C, 0x12, 0x44, 0x40, 0xCE, 0xB8, // ..,.D@.. /* 0880 */ 0x3E, 0x01, 0x39, 0x30, 0x88, 0x80, 0x1C, 0xF2, // >.90.... /* 0888 */ 0x1B, 0x22, 0x20, 0x47, 0x06, 0x11, 0x90, 0x05, // ." G.... /* 0890 */ 0xEB, 0x00, 0xF2, 0xFF, 0x9F, 0xA0, 0x7C, 0x10, // ......|. /* 0898 */ 0x01, 0x39, 0x3E, 0x10, 0x15, 0xE3, 0xE3, 0xAE, // .9>..... /* 08A0 */ 0x45, 0x1F, 0x03, 0x02, 0x72, 0x2E, 0x10, 0x01, // E...r... /* 08A8 */ 0x39, 0x07, 0x8D, 0x80, 0x9C, 0x8A, 0x42, 0x40, // 9.....B@ /* 08B0 */ 0x56, 0xF5, 0x76, 0x10, 0x90, 0x35, 0x82, 0x08, // V.v..5.. /* 08B8 */ 0xC8, 0x29, 0x81, 0x68, 0x66, 0x20, 0x2A, 0xD8, // .).hf *. /* 08C0 */ 0x0A, 0x10, 0x53, 0x0F, 0x22, 0x20, 0x2B, 0xD5, // ..S." +. /* 08C8 */ 0x02, 0xC4, 0x74, 0x83, 0x08, 0xC8, 0xA9, 0xBD, // ..t..... /* 08D0 */ 0x00, 0x31, 0x0D, 0xEF, 0x00, 0x01, 0x59, 0xEB, // .1....Y. /* 08D8 */ 0xD3, 0x43, 0x20, 0x4E, 0x0A, 0x42, 0xB5, 0xBA, // .C N.B.. /* 08E0 */ 0x01, 0x61, 0x39, 0xED, 0x80, 0x30, 0x95, 0x7A, // .a9..0.z /* 08E8 */ 0x40, 0x58, 0x1E, 0x3F, 0x43, 0xA6, 0x20, 0x02, // @X.?C. . /* 08F0 */ 0xB2, 0xA2, 0x97, 0x88, 0x80, 0x2C, 0x0F, 0x44, // .....,.D /* 08F8 */ 0x40, 0x96, 0x62, 0x08, 0x88, 0x09, 0x03, 0x11, // @.b..... /* 0900 */ 0x90, 0x23, 0x01, 0xD1, 0x80, 0x40, 0x54, 0x9E, // .#...@T. /* 0908 */ 0x23, 0x20, 0xA6, 0x15, 0x44, 0x40, 0x0E, 0x08, // # ..D@.. /* 0910 */ 0x44, 0xD3, 0x02, 0x51, 0x8D, 0xBF, 0x25, 0x01, // D..Q..%. /* 0918 */ 0x59, 0x30, 0x88, 0x80, 0x2C, 0xCE, 0xD2, 0x51, // Y0..,..Q /* 0920 */ 0x80, 0x82, 0x08, 0xC8, 0x31, 0x35, 0x0D, 0x95, // ....15.. /* 0928 */ 0x82, 0x08, 0xC8, 0x42, 0x3D, 0x01, 0x31, 0xD5, // ...B=.1. /* 0930 */ 0x20, 0x02, 0xB2, 0x42, 0x51, 0x40, 0x4C, 0x2F, // ..BQ@L/ /* 0938 */ 0x88, 0x06, 0x49, 0x80, 0x68, 0x6E, 0x20, 0xAA, // ..I.hn . /* 0940 */ 0x5A, 0x15, 0x10, 0x8B, 0x00, 0x22, 0x20, 0xE7, // Z...." . /* 0948 */ 0x06, 0xA2, 0x22, 0x5C, 0x01, 0x31, 0xE9, 0x20, // .."\.1. /* 0950 */ 0x02, 0x72, 0x0E, 0x20, 0xAA, 0xF9, 0x49, 0x21, // .r. ..I! /* 0958 */ 0x20, 0x27, 0x00, 0x11, 0x90, 0xF3, 0xDB, 0x3A, // '.....: /* 0960 */ 0x1A, 0xD0, 0x87, 0x8E, 0x80, 0x9C, 0x00, 0x44, // .......D /* 0968 */ 0x40, 0x8E, 0x03, 0x44, 0xA5, 0xFB, 0x02, 0x62, // @..D...b /* 0970 */ 0x41, 0x40, 0x04, 0x64, 0x41, 0xAF, 0x11, 0x0D, // A@.dA... /* 0978 */ 0x9C, 0x80, 0x08, 0xC8, 0xD1, 0x8C, 0x01, 0xB1, // ........ /* 0980 */ 0x9C, 0x20, 0x02, 0xFA, 0xFF, 0x1F, 0xA8, 0xBE, // . ...... /* 0988 */ 0x22, 0x02, 0xB2, 0x52, 0x10, 0x0D, 0x9A, 0x00, // "..R.... /* 0990 */ 0xD1, 0xB4, 0x40, 0x54, 0xF1, 0x9B, 0xE4, 0xD1, // ..@T.... /* 0998 */ 0x81, 0x81, 0xE8, 0x88, 0x40, 0xA4, 0x1D, 0x11, // ....@... /* 09A0 */ 0x28, 0x88, 0x80, 0xFC, 0xFF, 0x07 // (..... }) Method (SPEC, 1, Serialized) { Return (AMWV) /* \AMWV */ } Method (DEVP, 1, Serialized) { CreateDWordField (Arg0, 0x00, DVID) CreateDWordField (Arg0, 0x04, PARA) If ((PARA == 0x01)) { Switch (DVID) { Case (0x00010011) { \_SB.DSAF |= 0x01 } Case (0x00010013) { \_SB.DSAF |= 0x02 } Case (0x00010023) { \_SB.DSAF |= 0x04 } Case (0x00060013) { \_SB.DSAF |= 0x08 } Case (0x00060015) { \_SB.DSAF |= 0x10 } Case (0x00010015) { \_SB.DSAF |= 0x20 } Case (0x00090011) { \_SB.DSAF |= 0x40 } Case (0x00070011) { \_SB.DSAF |= 0x80 } Case (0x00080013) { \_SB.DSAF |= 0x0100 } Case (0x00010019) { \_SB.DSAF |= 0x0200 } Case (0x00010017) { \_SB.DSAF |= 0x0400 } Case (0x00050011) { \_SB.DSAF |= 0x0800 } Case (0x00050012) { \_SB.DSAF |= 0x1000 } Case (0x00060017) { \_SB.DSAF |= 0x2000 } Case (0x00080021) { \_SB.DSAF |= 0x4000 } Case (0x00100011) { \_SB.DSAF |= 0x8000 } Case (0x00050001) { \_SB.DSAF |= 0x00010000 } Case (0x00120000) { \_SB.DSAF |= 0x00020000 } Case (0x00120021) { \_SB.DSAF |= 0x00040000 } Case (0x00120011) { \_SB.DSAF |= 0x00080000 } Case (0x00120023) { \_SB.DSAF |= 0x00100000 } Default { Return (0x00) } } } ElseIf ((PARA == 0x00)) { Switch (DVID) { Case (0x00010011) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFFE } Case (0x00010013) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFFD } Case (0x00010023) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFFB } Case (0x00060013) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFF7 } Case (0x00060015) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFEF } Case (0x00010015) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFDF } Case (0x00090011) { \_SB.DSAF &= 0xFFFFFFFFFFFFFFBF } Case (0x00070011) { \_SB.DSAF &= 0xFFFFFFFFFFFFFF7F } Case (0x00080013) { \_SB.DSAF &= 0xFFFFFFFFFFFFFEFF } Case (0x00010019) { \_SB.DSAF &= 0xFFFFFFFFFFFFFDFF } Case (0x00010017) { \_SB.DSAF &= 0xFFFFFFFFFFFFFBFF } Case (0x00050011) { \_SB.DSAF &= 0xFFFFFFFFFFFFF7FF } Case (0x00050012) { \_SB.DSAF &= 0xFFFFFFFFFFFFEFFF } Case (0x00060017) { \_SB.DSAF &= 0xFFFFFFFFFFFFDFFF } Case (0x00080021) { \_SB.DSAF &= 0xFFFFFFFFFFFFBFFF } Case (0x00100011) { \_SB.DSAF &= 0xFFFFFFFFFFFF7FFF } Case (0x00050001) { \_SB.DSAF &= 0xFFFFFFFFFFFEFFFF } Case (0x00120000) { \_SB.DSAF &= 0xFFFFFFFFFFFDFFFF } Case (0x00120021) { \_SB.DSAF &= 0xFFFFFFFFFFFBFFFF } Case (0x00120011) { \_SB.DSAF &= 0xFFFFFFFFFFF7FFFF } Case (0x00120023) { \_SB.DSAF &= 0xFFFFFFFFFFEFFFFF } Default { Return (0x00) } } } Return (0x01) } Method (SDSP, 1, Serialized) { CreateDWordField (Arg0, 0x00, ACTN) Return (0x00) } Method (GDSP, 1, Serialized) { CreateDWordField (Arg0, 0x00, ACTN) Return (0x00) } Method (DEVS, 1, Serialized) { CreateDWordField (Arg0, 0x00, DVID) CreateDWordField (Arg0, 0x04, CPAR) Switch (DVID) { Case (0x00) { Return (0x00) } Default { Return (0x00) } } } Method (DSTS, 1, Serialized) { CreateDWordField (Arg0, 0x00, DVID) Switch (DVID) { Case (0xA0000000) { Local0 = 0x02 } Case (0x00) { Return (0x00) } Default { Local0 = 0x00 } } Local0 &= 0x0007FFFF Return (Local0) } Method (GPID, 0, Serialized) { Return (0x00) } Method (KBFT, 1, Serialized) { Return (0x00) } Method (HKEY, 0, Serialized) { Return (0x00) } Method (CFVS, 1, Serialized) { } Method (CFVG, 0, Serialized) { } } } Scope (_SB) { Name (RAMS, 0xBC00BD98) OperationRegion (RAMX, SystemMemory, RAMS, 0x0100) Field (RAMX, ByteAcc, NoLock, Preserve) { Offset (0x02), P1T1, 8, P1T2, 8, P1T3, 8, P1T4, 8, P1P1, 8, P1P2, 8, P1P3, 8, P1P4, 8, P2T1, 8, P2T2, 8, P2T3, 8, P2T4, 8, P2P1, 8, P2P2, 8, P2P3, 8, P2P4, 8 } } Scope (_GPE) { Name (SP1O, 0x2E) Name (ENT1, 0x87) Name (EXT1, 0xAA) OperationRegion (DBGP, SystemIO, 0x80, 0x08) Field (DBGP, ByteAcc, NoLock, Preserve) { DP80, 8 } OperationRegion (ECR2, SystemIO, 0x66, 0x01) Field (ECR2, ByteAcc, NoLock, Preserve) { EC66, 8 } OperationRegion (ECR3, SystemIO, 0x62, 0x01) Field (ECR3, ByteAcc, NoLock, Preserve) { EC62, 8 } OperationRegion (GPBX, SystemIO, 0x0500, 0x80) Field (GPBX, ByteAcc, NoLock, Preserve) { Offset (0x44), GI00, 8, GI01, 8, GI02, 8, GI03, 8, GPL0, 8, GPL1, 8, GPL2, 8, GPL3, 8 } OperationRegion (SGP, SystemIO, SP1O, 0x02) Field (SGP, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x28), CR28, 8, Offset (0x30), CR30, 8, Offset (0xE4), CRE4, 8, CRE5, 8 } OperationRegion (HWM, SystemIO, IOHW, 0x0A) Field (HWM, ByteAcc, NoLock, Preserve) { Offset (0x05), HIDX, 8, HDAT, 8 } IndexField (HIDX, HDAT, ByteAcc, NoLock, Preserve) { Offset (0x02), REG2, 8, REG3, 8, REG4, 8, Offset (0x08), REG8, 8, REG9, 8, Offset (0x21), RE21, 8, RE22, 8, RE23, 8, RE24, 8, Offset (0x27), RE27, 8, RE28, 8, RE29, 8, RE2A, 8, Offset (0x41), RE41, 8, Offset (0x4E), BANK, 8, Offset (0x50), RE50, 8, Offset (0x53), RE53, 8, Offset (0x55), RE55, 8, Offset (0x75), RE75, 8 } Name (G39S, 0x00) Name (ECST, 0x00) Name (SUTR, 0x00) Name (SDTR, 0x00) Name (DUTY, 0x00) Method (IBFX, 0, Serialized) { OperationRegion (ECR1, SystemIO, 0x66, 0x01) Field (ECR1, ByteAcc, NoLock, Preserve) { ECOF, 1, ECIE, 1, Offset (0x01) } Local0 = 0x1000 While ((Local0-- && ECIE)) { Sleep (0x01) } } Method (OBFX, 0, Serialized) { OperationRegion (ECR1, SystemIO, 0x66, 0x01) Field (ECR1, ByteAcc, NoLock, Preserve) { ECOF, 1, ECIE, 1, Offset (0x01) } Local0 = 0x1000 While (Local0--) { If (ECOF) { Break } Sleep (0x01) } } Method (_E12, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF { Mutex (MUT0, 0x00) Acquire (MUT0, 0x0FFF) INDX = ENT1 /* \_GPE.ENT1 */ INDX = ENT1 /* \_GPE.ENT1 */ CR28 &= 0xEF INDX = EXT1 /* \_GPE.EXT1 */ IBFX () EC66 = 0x81 IBFX () EC62 = 0xFF IBFX () EC62 = 0x00 IBFX () EC66 = 0x80 IBFX () EC62 = 0x82 OBFX () ECST = EC62 /* \_GPE.EC62 */ If (((ECST == 0x01) || (ECST == 0x02))){} Else { INDX = ENT1 /* \_GPE.ENT1 */ INDX = ENT1 /* \_GPE.ENT1 */ CR28 |= 0x10 INDX = EXT1 /* \_GPE.EXT1 */ Release (MUT0) Return (Zero) } SUTR = REG3 /* \_GPE.REG3 */ SDTR = REG4 /* \_GPE.REG4 */ REG3 = 0x00 REG4 = 0x00 BANK &= 0xF0 BANK |= 0x00 Local0 = (RE75 & 0xFF) If ((Local0 <= \_SB.P1T1)) { GI00 &= 0xEF GPL0 |= 0x10 GI00 &= 0xDF GPL0 |= 0x20 G39S = 0x01 BANK &= 0xF0 BANK |= 0x02 RE27 = 0xFF RE28 = 0xFF RE29 = 0xFF RE2A = 0xFF BANK &= 0xF0 BANK |= 0x02 DUTY = REG9 /* \_GPE.REG9 */ While ((DUTY != 0xFF)) { BANK &= 0xF0 BANK |= 0x02 DUTY = REG9 /* \_GPE.REG9 */ } REG3 = SUTR /* \_GPE.SUTR */ REG4 = SDTR /* \_GPE.SDTR */ INDX = ENT1 /* \_GPE.ENT1 */ INDX = ENT1 /* \_GPE.ENT1 */ LDN = 0x09 CR30 &= 0xFD CR30 |= 0x02 CRE4 &= 0xEF CRE5 &= 0xEF INDX = EXT1 /* \_GPE.EXT1 */ BANK &= 0xF0 BANK |= 0x02 RE21 = \_SB.P2T1 RE22 = \_SB.P2T2 RE23 = \_SB.P2T3 RE24 = \_SB.P2T4 RE27 = \_SB.P2P1 RE28 = \_SB.P2P2 RE29 = \_SB.P2P3 RE2A = \_SB.P2P4 } Else { INDX = ENT1 /* \_GPE.ENT1 */ INDX = ENT1 /* \_GPE.ENT1 */ LDN = 0x09 CR30 &= 0xFD CR30 |= 0x02 CRE4 &= 0xEF CRE4 |= 0x10 INDX = EXT1 /* \_GPE.EXT1 */ BANK &= 0xF0 BANK |= 0x02 RE21 = \_SB.P1T1 RE22 = \_SB.P1T2 RE23 = \_SB.P1T3 RE24 = \_SB.P1T4 RE27 = \_SB.P1P1 RE28 = \_SB.P1P2 RE29 = \_SB.P1P3 RE2A = \_SB.P1P4 BANK &= 0xF0 BANK |= 0x02 Sleep (0x64) REG3 = SUTR /* \_GPE.SUTR */ REG4 = SDTR /* \_GPE.SDTR */ GI00 &= 0xEF GPL0 &= 0xEF GI00 &= 0xDF GPL0 &= 0xDF G39S = 0x02 } IBFX () EC66 = 0x81 IBFX () EC62 = 0xFF IBFX () EC62 = 0x00 IBFX () EC66 = 0x81 IBFX () EC62 = 0x82 IBFX () EC62 = G39S /* \_GPE.G39S */ BANK &= 0xF0 BANK |= 0x00 INDX = ENT1 /* \_GPE.ENT1 */ INDX = ENT1 /* \_GPE.ENT1 */ CR28 |= 0x10 INDX = EXT1 /* \_GPE.EXT1 */ Release (MUT0) Return (Zero) } } Scope (\) { Device (MBDA) { Name (_HID, EisaId ("PNP0A0A")) // _HID: Hardware ID } } Scope (_SB.PCI0.LPC0) { Device (EC0) { Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) Name (_GPE, 0x1E) // _GPE: General Purpose Events Name (REGC, 0x00) Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x03)) { REGC = Arg1 } } Method (_Q01, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA0040001) } Method (_Q02, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA0040002) } Method (_Q03, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA0040003) } Method (_Q87, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA0040087) } Method (_Q88, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA0040088) } Method (_Q8A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA004008A) } Method (_QA1, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A1) } Method (_QA2, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A2) } Method (_QA3, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A3) } Method (_QA4, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A4) } Method (_QA5, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A5) } Method (_QA6, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A6) } Method (_QA7, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A7) } Method (_QA8, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A8) } Method (_QA9, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200A9) } Method (_QAA, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA00200AA) } Method (_Q0B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF { \AMW0.AMWN (0xA002000B) } } } Scope (_GPE) { OperationRegion (TCOS, SystemIO, 0x0464, 0x02) Field (TCOS, ByteAcc, NoLock, WriteAsZeros) { Offset (0x01), , 1, DSCI, 1 } Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { Sleep (0xC8) IO80 = 0x01 Sleep (0x0A) Local1 = 0x00 If ((\_SB.PCI0.BR1A.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR1A.PMEH (0x09) } Else { Local0 = \_SB.PCI0.BR1A.HPEH (0x09) } If ((ToInteger (TBRP) == 0x22)) { Local0 = 0xFF Local1 = 0x01 } If ((Local0 != 0xFF)) { Local1 = 0x01 Notify (\_SB.PCI0.BR1A.H000, Local0) Notify (\_SB.PCI0.BR1A.H001, Local0) Notify (\_SB.PCI0.BR1A.H002, Local0) Notify (\_SB.PCI0.BR1A.H003, Local0) Notify (\_SB.PCI0.BR1A.H004, Local0) Notify (\_SB.PCI0.BR1A.H005, Local0) Notify (\_SB.PCI0.BR1A.H006, Local0) Notify (\_SB.PCI0.BR1A.H007, Local0) } If ((\_SB.PCI0.BR1B.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR1B.PMEH (0x09) } Else { Local0 = \_SB.PCI0.BR1B.HPEH (0x09) } If ((ToInteger (TBRP) == 0x23)) { Local0 = 0xFF Local1 = 0x02 } If ((Local0 != 0xFF)) { Local1 = 0x02 Notify (\_SB.PCI0.BR1B.H000, Local0) Notify (\_SB.PCI0.BR1B.H001, Local0) Notify (\_SB.PCI0.BR1B.H002, Local0) Notify (\_SB.PCI0.BR1B.H003, Local0) Notify (\_SB.PCI0.BR1B.H004, Local0) Notify (\_SB.PCI0.BR1B.H005, Local0) Notify (\_SB.PCI0.BR1B.H006, Local0) Notify (\_SB.PCI0.BR1B.H007, Local0) } If ((\_SB.PCI0.BR2A.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR2A.PMEH (0x01) } Else { Local0 = \_SB.PCI0.BR2A.HPEH (0x01) If ((ToInteger (TBRP) == 0x24)) { Local0 = 0xFF Local1 = 0x03 } } If ((Local0 != 0xFF)) { Local1 = 0x03 Notify (\_SB.PCI0.BR2A.H000, Local0) Notify (\_SB.PCI0.BR2A.H001, Local0) Notify (\_SB.PCI0.BR2A.H002, Local0) Notify (\_SB.PCI0.BR2A.H003, Local0) Notify (\_SB.PCI0.BR2A.H004, Local0) Notify (\_SB.PCI0.BR2A.H005, Local0) Notify (\_SB.PCI0.BR2A.H006, Local0) Notify (\_SB.PCI0.BR2A.H007, Local0) } If ((\_SB.PCI0.BR2B.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR2B.PMEH (0x02) } Else { Local0 = \_SB.PCI0.BR2B.HPEH (0x02) If ((ToInteger (TBRP) == 0x25)) { Local0 = 0xFF Local1 = 0x04 } } If ((Local0 != 0xFF)) { Local1 = 0x04 Notify (\_SB.PCI0.BR2B.H000, Local0) Notify (\_SB.PCI0.BR2B.H001, Local0) Notify (\_SB.PCI0.BR2B.H002, Local0) Notify (\_SB.PCI0.BR2B.H003, Local0) Notify (\_SB.PCI0.BR2B.H004, Local0) Notify (\_SB.PCI0.BR2B.H005, Local0) Notify (\_SB.PCI0.BR2B.H006, Local0) Notify (\_SB.PCI0.BR2B.H007, Local0) } If ((\_SB.PCI0.BR2C.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR2C.PMEH (0x03) } Else { Local0 = \_SB.PCI0.BR2C.HPEH (0x03) If ((ToInteger (TBRP) == 0x26)) { Local0 = 0xFF Local1 = 0x05 } } If ((Local0 != 0xFF)) { Local1 = 0x05 Notify (\_SB.PCI0.BR2C.H000, Local0) Notify (\_SB.PCI0.BR2C.H001, Local0) Notify (\_SB.PCI0.BR2C.H002, Local0) Notify (\_SB.PCI0.BR2C.H003, Local0) Notify (\_SB.PCI0.BR2C.H004, Local0) Notify (\_SB.PCI0.BR2C.H005, Local0) Notify (\_SB.PCI0.BR2C.H006, Local0) Notify (\_SB.PCI0.BR2C.H007, Local0) } If ((\_SB.PCI0.BR2D.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR2D.PMEH (0x04) } Else { Local0 = \_SB.PCI0.BR2D.HPEH (0x04) If ((ToInteger (TBRP) == 0x27)) { Local0 = 0xFF Local1 = 0x06 } } If ((Local0 != 0xFF)) { Local1 = 0x06 Notify (\_SB.PCI0.BR2D.H000, Local0) Notify (\_SB.PCI0.BR2D.H001, Local0) Notify (\_SB.PCI0.BR2D.H002, Local0) Notify (\_SB.PCI0.BR2D.H003, Local0) Notify (\_SB.PCI0.BR2D.H004, Local0) Notify (\_SB.PCI0.BR2D.H005, Local0) Notify (\_SB.PCI0.BR2D.H006, Local0) Notify (\_SB.PCI0.BR2D.H007, Local0) } If ((\_SB.PCI0.BR3A.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR3A.PMEH (0x05) } Else { Local0 = \_SB.PCI0.BR3A.HPEH (0x05) If ((ToInteger (TBRP) == 0x28)) { Local0 = 0xFF Local1 = 0x07 } } If ((Local0 != 0xFF)) { Local1 = 0x07 Notify (\_SB.PCI0.BR3A.H000, Local0) Notify (\_SB.PCI0.BR3A.H001, Local0) Notify (\_SB.PCI0.BR3A.H002, Local0) Notify (\_SB.PCI0.BR3A.H003, Local0) Notify (\_SB.PCI0.BR3A.H004, Local0) Notify (\_SB.PCI0.BR3A.H005, Local0) Notify (\_SB.PCI0.BR3A.H006, Local0) Notify (\_SB.PCI0.BR3A.H007, Local0) } If ((\_SB.PCI0.BR3B.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR3B.PMEH (0x06) } Else { Local0 = \_SB.PCI0.BR3B.HPEH (0x06) If ((ToInteger (TBRP) == 0x29)) { Local0 = 0xFF Local1 = 0x08 } } If ((Local0 != 0xFF)) { Local1 = 0x08 Notify (\_SB.PCI0.BR3B.H000, Local0) Notify (\_SB.PCI0.BR3B.H001, Local0) Notify (\_SB.PCI0.BR3B.H002, Local0) Notify (\_SB.PCI0.BR3B.H003, Local0) Notify (\_SB.PCI0.BR3B.H004, Local0) Notify (\_SB.PCI0.BR3B.H005, Local0) Notify (\_SB.PCI0.BR3B.H006, Local0) Notify (\_SB.PCI0.BR3B.H007, Local0) } If ((\_SB.PCI0.BR3C.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR3C.PMEH (0x07) } Else { Local0 = \_SB.PCI0.BR3C.HPEH (0x07) If ((ToInteger (TBRP) == 0x2A)) { Local0 = 0xFF Local1 = 0x09 } } If ((Local0 != 0xFF)) { Local1 = 0x09 Notify (\_SB.PCI0.BR3C.H000, Local0) Notify (\_SB.PCI0.BR3C.H001, Local0) Notify (\_SB.PCI0.BR3C.H002, Local0) Notify (\_SB.PCI0.BR3C.H003, Local0) Notify (\_SB.PCI0.BR3C.H004, Local0) Notify (\_SB.PCI0.BR3C.H005, Local0) Notify (\_SB.PCI0.BR3C.H006, Local0) Notify (\_SB.PCI0.BR3C.H007, Local0) } If ((\_SB.PCI0.BR3D.PMEP == 0x01)) { Local0 = \_SB.PCI0.BR3D.PMEH (0x08) } Else { Local0 = \_SB.PCI0.BR3D.HPEH (0x08) If ((ToInteger (TBRP) == 0x2B)) { Local0 = 0xFF Local1 = 0x0A } } If ((Local0 != 0xFF)) { Local1 = 0x0A Notify (\_SB.PCI0.BR3D.H000, Local0) Notify (\_SB.PCI0.BR3D.H001, Local0) Notify (\_SB.PCI0.BR3D.H002, Local0) Notify (\_SB.PCI0.BR3D.H003, Local0) Notify (\_SB.PCI0.BR3D.H004, Local0) Notify (\_SB.PCI0.BR3D.H005, Local0) Notify (\_SB.PCI0.BR3D.H006, Local0) Notify (\_SB.PCI0.BR3D.H007, Local0) } If ((\_SB.PCI1.QRP0.PMEP == 0x01)) { Local0 = \_SB.PCI1.QRP0.PMEH (0x09) } Else { Local0 = \_SB.PCI1.QRP0.HPEH (0x09) If ((ToInteger (TBRP) == 0x30)) { Local0 = 0xFF Local1 = 0x10 } } If ((Local0 != 0xFF)) { Local1 = 0x10 Notify (\_SB.PCI1.QRP0.H000, Local0) Notify (\_SB.PCI1.QRP0.H001, Local0) Notify (\_SB.PCI1.QRP0.H002, Local0) Notify (\_SB.PCI1.QRP0.H003, Local0) Notify (\_SB.PCI1.QRP0.H004, Local0) Notify (\_SB.PCI1.QRP0.H005, Local0) Notify (\_SB.PCI1.QRP0.H006, Local0) Notify (\_SB.PCI1.QRP0.H007, Local0) } If ((\_SB.PCI1.QR2A.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR2A.PMEH (0x01) } Else { Local0 = \_SB.PCI1.QR2A.HPEH (0x01) If ((ToInteger (TBRP) == 0x34)) { Local0 = 0xFF Local1 = 0x11 } } If ((Local0 != 0xFF)) { Local1 = 0x11 Notify (\_SB.PCI1.QR2A.H000, Local0) Notify (\_SB.PCI1.QR2A.H001, Local0) Notify (\_SB.PCI1.QR2A.H002, Local0) Notify (\_SB.PCI1.QR2A.H003, Local0) Notify (\_SB.PCI1.QR2A.H004, Local0) Notify (\_SB.PCI1.QR2A.H005, Local0) Notify (\_SB.PCI1.QR2A.H006, Local0) Notify (\_SB.PCI1.QR2A.H007, Local0) } If ((\_SB.PCI1.QR2B.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR2B.PMEH (0x02) } Else { Local0 = \_SB.PCI1.QR2B.HPEH (0x02) If ((ToInteger (TBRP) == 0x35)) { Local0 = 0xFF Local1 = 0x12 } } If ((Local0 != 0xFF)) { Local1 = 0x12 Notify (\_SB.PCI1.QR2B.H000, Local0) Notify (\_SB.PCI1.QR2B.H001, Local0) Notify (\_SB.PCI1.QR2B.H002, Local0) Notify (\_SB.PCI1.QR2B.H003, Local0) Notify (\_SB.PCI1.QR2B.H004, Local0) Notify (\_SB.PCI1.QR2B.H005, Local0) Notify (\_SB.PCI1.QR2B.H006, Local0) Notify (\_SB.PCI1.QR2B.H007, Local0) } If ((\_SB.PCI1.QR2C.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR2C.PMEH (0x03) } Else { Local0 = \_SB.PCI1.QR2C.HPEH (0x03) If ((ToInteger (TBRP) == 0x36)) { Local0 = 0xFF Local1 = 0x13 } } If ((Local0 != 0xFF)) { Local1 = 0x13 Notify (\_SB.PCI1.QR2C.H000, Local0) Notify (\_SB.PCI1.QR2C.H001, Local0) Notify (\_SB.PCI1.QR2C.H002, Local0) Notify (\_SB.PCI1.QR2C.H003, Local0) Notify (\_SB.PCI1.QR2C.H004, Local0) Notify (\_SB.PCI1.QR2C.H005, Local0) Notify (\_SB.PCI1.QR2C.H006, Local0) Notify (\_SB.PCI1.QR2C.H007, Local0) } If ((\_SB.PCI1.QR2D.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR2D.PMEH (0x04) } Else { Local0 = \_SB.PCI1.QR2D.HPEH (0x04) If ((ToInteger (TBRP) == 0x37)) { Local0 = 0xFF Local1 = 0x14 } } If ((Local0 != 0xFF)) { Local1 = 0x14 Notify (\_SB.PCI1.QR2D.H000, Local0) Notify (\_SB.PCI1.QR2D.H001, Local0) Notify (\_SB.PCI1.QR2D.H002, Local0) Notify (\_SB.PCI1.QR2D.H003, Local0) Notify (\_SB.PCI1.QR2D.H004, Local0) Notify (\_SB.PCI1.QR2D.H005, Local0) Notify (\_SB.PCI1.QR2D.H006, Local0) Notify (\_SB.PCI1.QR2D.H007, Local0) } If ((\_SB.PCI1.QR3A.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR3A.PMEH (0x05) } Else { Local0 = \_SB.PCI1.QR3A.HPEH (0x05) If ((ToInteger (TBRP) == 0x38)) { Local0 = 0xFF Local1 = 0x15 } } If ((Local0 != 0xFF)) { Local1 = 0x15 Notify (\_SB.PCI1.QR3A.H000, Local0) Notify (\_SB.PCI1.QR3A.H001, Local0) Notify (\_SB.PCI1.QR3A.H002, Local0) Notify (\_SB.PCI1.QR3A.H003, Local0) Notify (\_SB.PCI1.QR3A.H004, Local0) Notify (\_SB.PCI1.QR3A.H005, Local0) Notify (\_SB.PCI1.QR3A.H006, Local0) Notify (\_SB.PCI1.QR3A.H007, Local0) } If ((\_SB.PCI1.QR3B.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR3B.PMEH (0x06) } Else { Local0 = \_SB.PCI1.QR3B.HPEH (0x06) If ((ToInteger (TBRP) == 0x39)) { Local0 = 0xFF Local1 = 0x16 } } If ((Local0 != 0xFF)) { Local1 = 0x16 Notify (\_SB.PCI1.QR3B.H000, Local0) Notify (\_SB.PCI1.QR3B.H001, Local0) Notify (\_SB.PCI1.QR3B.H002, Local0) Notify (\_SB.PCI1.QR3B.H003, Local0) Notify (\_SB.PCI1.QR3B.H004, Local0) Notify (\_SB.PCI1.QR3B.H005, Local0) Notify (\_SB.PCI1.QR3B.H006, Local0) Notify (\_SB.PCI1.QR3B.H007, Local0) } If ((\_SB.PCI1.QR3C.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR3C.PMEH (0x07) } Else { Local0 = \_SB.PCI1.QR3C.HPEH (0x07) If ((ToInteger (TBRP) == 0x3A)) { Local0 = 0xFF Local1 = 0x17 } } If ((Local0 != 0xFF)) { Local1 = 0x17 Notify (\_SB.PCI1.QR3C.H000, Local0) Notify (\_SB.PCI1.QR3C.H001, Local0) Notify (\_SB.PCI1.QR3C.H002, Local0) Notify (\_SB.PCI1.QR3C.H003, Local0) Notify (\_SB.PCI1.QR3C.H004, Local0) Notify (\_SB.PCI1.QR3C.H005, Local0) Notify (\_SB.PCI1.QR3C.H006, Local0) Notify (\_SB.PCI1.QR3C.H007, Local0) } If ((\_SB.PCI1.QR3D.PMEP == 0x01)) { Local0 = \_SB.PCI1.QR3D.PMEH (0x08) } Else { Local0 = \_SB.PCI1.QR3D.HPEH (0x08) If ((ToInteger (TBRP) == 0x3B)) { Local0 = 0xFF Local1 = 0x18 } } If ((Local0 != 0xFF)) { Local1 = 0x18 Notify (\_SB.PCI1.QR3D.H000, Local0) Notify (\_SB.PCI1.QR3D.H001, Local0) Notify (\_SB.PCI1.QR3D.H002, Local0) Notify (\_SB.PCI1.QR3D.H003, Local0) Notify (\_SB.PCI1.QR3D.H004, Local0) Notify (\_SB.PCI1.QR3D.H005, Local0) Notify (\_SB.PCI1.QR3D.H006, Local0) Notify (\_SB.PCI1.QR3D.H007, Local0) } If ((\_SB.PCI2.RRP0.PMEP == 0x01)) { Local0 = \_SB.PCI2.RRP0.PMEH (0x09) } Else { Local0 = \_SB.PCI2.RRP0.HPEH (0x09) } If ((Local0 != 0xFF)) { Local1 = 0x20 Notify (\_SB.PCI2.RRP0.H000, Local0) Notify (\_SB.PCI2.RRP0.H001, Local0) Notify (\_SB.PCI2.RRP0.H002, Local0) Notify (\_SB.PCI2.RRP0.H003, Local0) Notify (\_SB.PCI2.RRP0.H004, Local0) Notify (\_SB.PCI2.RRP0.H005, Local0) Notify (\_SB.PCI2.RRP0.H006, Local0) Notify (\_SB.PCI2.RRP0.H007, Local0) } If ((\_SB.PCI2.RR2A.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR2A.PMEH (0x01) } Else { Local0 = \_SB.PCI2.RR2A.HPEH (0x01) } If ((Local0 != 0xFF)) { Local1 = 0x21 Notify (\_SB.PCI2.RR2A.H000, Local0) Notify (\_SB.PCI2.RR2A.H001, Local0) Notify (\_SB.PCI2.RR2A.H002, Local0) Notify (\_SB.PCI2.RR2A.H003, Local0) Notify (\_SB.PCI2.RR2A.H004, Local0) Notify (\_SB.PCI2.RR2A.H005, Local0) Notify (\_SB.PCI2.RR2A.H006, Local0) Notify (\_SB.PCI2.RR2A.H007, Local0) } If ((\_SB.PCI2.RR2B.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR2B.PMEH (0x02) } Else { Local0 = \_SB.PCI2.RR2B.HPEH (0x02) } If ((Local0 != 0xFF)) { Local1 = 0x22 Notify (\_SB.PCI2.RR2B.H000, Local0) Notify (\_SB.PCI2.RR2B.H001, Local0) Notify (\_SB.PCI2.RR2B.H002, Local0) Notify (\_SB.PCI2.RR2B.H003, Local0) Notify (\_SB.PCI2.RR2B.H004, Local0) Notify (\_SB.PCI2.RR2B.H005, Local0) Notify (\_SB.PCI2.RR2B.H006, Local0) Notify (\_SB.PCI2.RR2B.H007, Local0) } If ((\_SB.PCI2.RR2C.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR2C.PMEH (0x03) } Else { Local0 = \_SB.PCI2.RR2C.HPEH (0x03) } If ((Local0 != 0xFF)) { Local1 = 0x23 Notify (\_SB.PCI2.RR2C.H000, Local0) Notify (\_SB.PCI2.RR2C.H001, Local0) Notify (\_SB.PCI2.RR2C.H002, Local0) Notify (\_SB.PCI2.RR2C.H003, Local0) Notify (\_SB.PCI2.RR2C.H004, Local0) Notify (\_SB.PCI2.RR2C.H005, Local0) Notify (\_SB.PCI2.RR2C.H006, Local0) Notify (\_SB.PCI2.RR2C.H007, Local0) } If ((\_SB.PCI2.RR2D.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR2D.PMEH (0x04) } Else { Local0 = \_SB.PCI2.RR2D.HPEH (0x04) } If ((Local0 != 0xFF)) { Local1 = 0x24 Notify (\_SB.PCI2.RR2D.H000, Local0) Notify (\_SB.PCI2.RR2D.H001, Local0) Notify (\_SB.PCI2.RR2D.H002, Local0) Notify (\_SB.PCI2.RR2D.H003, Local0) Notify (\_SB.PCI2.RR2D.H004, Local0) Notify (\_SB.PCI2.RR2D.H005, Local0) Notify (\_SB.PCI2.RR2D.H006, Local0) Notify (\_SB.PCI2.RR2D.H007, Local0) } If ((\_SB.PCI2.RR3A.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR3A.PMEH (0x05) } Else { Local0 = \_SB.PCI2.RR3A.HPEH (0x05) } If ((Local0 != 0xFF)) { Local1 = 0x25 Notify (\_SB.PCI2.RR3A.H000, Local0) Notify (\_SB.PCI2.RR3A.H001, Local0) Notify (\_SB.PCI2.RR3A.H002, Local0) Notify (\_SB.PCI2.RR3A.H003, Local0) Notify (\_SB.PCI2.RR3A.H004, Local0) Notify (\_SB.PCI2.RR3A.H005, Local0) Notify (\_SB.PCI2.RR3A.H006, Local0) Notify (\_SB.PCI2.RR3A.H007, Local0) } If ((\_SB.PCI2.RR3B.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR3B.PMEH (0x06) } Else { Local0 = \_SB.PCI2.RR3B.HPEH (0x06) } If ((Local0 != 0xFF)) { Local1 = 0x26 Notify (\_SB.PCI2.RR3B.H000, Local0) Notify (\_SB.PCI2.RR3B.H001, Local0) Notify (\_SB.PCI2.RR3B.H002, Local0) Notify (\_SB.PCI2.RR3B.H003, Local0) Notify (\_SB.PCI2.RR3B.H004, Local0) Notify (\_SB.PCI2.RR3B.H005, Local0) Notify (\_SB.PCI2.RR3B.H006, Local0) Notify (\_SB.PCI2.RR3B.H007, Local0) } If ((\_SB.PCI2.RR3C.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR3C.PMEH (0x07) } Else { Local0 = \_SB.PCI2.RR3C.HPEH (0x07) } If ((Local0 != 0xFF)) { Local1 = 0x27 Notify (\_SB.PCI2.RR3C.H000, Local0) Notify (\_SB.PCI2.RR3C.H001, Local0) Notify (\_SB.PCI2.RR3C.H002, Local0) Notify (\_SB.PCI2.RR3C.H003, Local0) Notify (\_SB.PCI2.RR3C.H004, Local0) Notify (\_SB.PCI2.RR3C.H005, Local0) Notify (\_SB.PCI2.RR3C.H006, Local0) Notify (\_SB.PCI2.RR3C.H007, Local0) } If ((\_SB.PCI2.RR3D.PMEP == 0x01)) { Local0 = \_SB.PCI2.RR3D.PMEH (0x08) } Else { Local0 = \_SB.PCI2.RR3D.HPEH (0x08) } If ((Local0 != 0xFF)) { Local1 = 0x28 Notify (\_SB.PCI2.RR3D.H000, Local0) Notify (\_SB.PCI2.RR3D.H001, Local0) Notify (\_SB.PCI2.RR3D.H002, Local0) Notify (\_SB.PCI2.RR3D.H003, Local0) Notify (\_SB.PCI2.RR3D.H004, Local0) Notify (\_SB.PCI2.RR3D.H005, Local0) Notify (\_SB.PCI2.RR3D.H006, Local0) Notify (\_SB.PCI2.RR3D.H007, Local0) } If ((\_SB.PCI3.SRP0.PMEP == 0x01)) { Local0 = \_SB.PCI3.SRP0.PMEH (0x00) } Else { Local0 = \_SB.PCI3.SRP0.HPEH (0x00) } If ((Local0 != 0xFF)) { Local1 = 0x30 Notify (\_SB.PCI3.SRP0.H000, Local0) Notify (\_SB.PCI3.SRP0.H001, Local0) Notify (\_SB.PCI3.SRP0.H002, Local0) Notify (\_SB.PCI3.SRP0.H003, Local0) Notify (\_SB.PCI3.SRP0.H004, Local0) Notify (\_SB.PCI3.SRP0.H005, Local0) Notify (\_SB.PCI3.SRP0.H006, Local0) Notify (\_SB.PCI3.SRP0.H007, Local0) } If ((\_SB.PCI3.SR2A.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR2A.PMEH (0x01) } Else { Local0 = \_SB.PCI3.SR2A.HPEH (0x01) } If ((Local0 != 0xFF)) { Local1 = 0x31 Notify (\_SB.PCI3.SR2A.H000, Local0) Notify (\_SB.PCI3.SR2A.H001, Local0) Notify (\_SB.PCI3.SR2A.H002, Local0) Notify (\_SB.PCI3.SR2A.H003, Local0) Notify (\_SB.PCI3.SR2A.H004, Local0) Notify (\_SB.PCI3.SR2A.H005, Local0) Notify (\_SB.PCI3.SR2A.H006, Local0) Notify (\_SB.PCI3.SR2A.H007, Local0) } If ((\_SB.PCI3.SR2B.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR2B.PMEH (0x02) } Else { Local0 = \_SB.PCI3.SR2B.HPEH (0x02) } If ((Local0 != 0xFF)) { Local1 = 0x32 Notify (\_SB.PCI3.SR2B.H000, Local0) Notify (\_SB.PCI3.SR2B.H001, Local0) Notify (\_SB.PCI3.SR2B.H002, Local0) Notify (\_SB.PCI3.SR2B.H003, Local0) Notify (\_SB.PCI3.SR2B.H004, Local0) Notify (\_SB.PCI3.SR2B.H005, Local0) Notify (\_SB.PCI3.SR2B.H006, Local0) Notify (\_SB.PCI3.SR2B.H007, Local0) } If ((\_SB.PCI3.SR2C.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR2C.PMEH (0x03) } Else { Local0 = \_SB.PCI3.SR2C.HPEH (0x03) } If ((Local0 != 0xFF)) { Local1 = 0x33 Notify (\_SB.PCI3.SR2C.H000, Local0) Notify (\_SB.PCI3.SR2C.H001, Local0) Notify (\_SB.PCI3.SR2C.H002, Local0) Notify (\_SB.PCI3.SR2C.H003, Local0) Notify (\_SB.PCI3.SR2C.H004, Local0) Notify (\_SB.PCI3.SR2C.H005, Local0) Notify (\_SB.PCI3.SR2C.H006, Local0) Notify (\_SB.PCI3.SR2C.H007, Local0) } If ((\_SB.PCI3.SR2D.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR2D.PMEH (0x04) } Else { Local0 = \_SB.PCI3.SR2D.HPEH (0x04) } If ((Local0 != 0xFF)) { Local1 = 0x34 Notify (\_SB.PCI3.SR2D.H000, Local0) Notify (\_SB.PCI3.SR2D.H001, Local0) Notify (\_SB.PCI3.SR2D.H002, Local0) Notify (\_SB.PCI3.SR2D.H003, Local0) Notify (\_SB.PCI3.SR2D.H004, Local0) Notify (\_SB.PCI3.SR2D.H005, Local0) Notify (\_SB.PCI3.SR2D.H006, Local0) Notify (\_SB.PCI3.SR2D.H007, Local0) } If ((\_SB.PCI3.SR3A.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR3A.PMEH (0x05) } Else { Local0 = \_SB.PCI3.SR3A.HPEH (0x05) } If ((Local0 != 0xFF)) { Local1 = 0x35 Notify (\_SB.PCI3.SR3A.H000, Local0) Notify (\_SB.PCI3.SR3A.H001, Local0) Notify (\_SB.PCI3.SR3A.H002, Local0) Notify (\_SB.PCI3.SR3A.H003, Local0) Notify (\_SB.PCI3.SR3A.H004, Local0) Notify (\_SB.PCI3.SR3A.H005, Local0) Notify (\_SB.PCI3.SR3A.H006, Local0) Notify (\_SB.PCI3.SR3A.H007, Local0) } If ((\_SB.PCI3.SR3B.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR3B.PMEH (0x06) } Else { Local0 = \_SB.PCI3.SR3B.HPEH (0x06) } If ((Local0 != 0xFF)) { Local1 = 0x36 Notify (\_SB.PCI3.SR3B.H000, Local0) Notify (\_SB.PCI3.SR3B.H001, Local0) Notify (\_SB.PCI3.SR3B.H002, Local0) Notify (\_SB.PCI3.SR3B.H003, Local0) Notify (\_SB.PCI3.SR3B.H004, Local0) Notify (\_SB.PCI3.SR3B.H005, Local0) Notify (\_SB.PCI3.SR3B.H006, Local0) Notify (\_SB.PCI3.SR3B.H007, Local0) } If ((\_SB.PCI3.SR3C.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR3C.PMEH (0x07) } Else { Local0 = \_SB.PCI3.SR3C.HPEH (0x07) } If ((Local0 != 0xFF)) { Local1 = 0x37 Notify (\_SB.PCI3.SR3C.H000, Local0) Notify (\_SB.PCI3.SR3C.H001, Local0) Notify (\_SB.PCI3.SR3C.H002, Local0) Notify (\_SB.PCI3.SR3C.H003, Local0) Notify (\_SB.PCI3.SR3C.H004, Local0) Notify (\_SB.PCI3.SR3C.H005, Local0) Notify (\_SB.PCI3.SR3C.H006, Local0) Notify (\_SB.PCI3.SR3C.H007, Local0) } If ((\_SB.PCI3.SR3D.PMEP == 0x01)) { Local0 = \_SB.PCI3.SR3D.PMEH (0x08) } Else { Local0 = \_SB.PCI3.SR3D.HPEH (0x08) } If ((Local0 != 0xFF)) { Local1 = 0x38 Notify (\_SB.PCI3.SR3D.H000, Local0) Notify (\_SB.PCI3.SR3D.H001, Local0) Notify (\_SB.PCI3.SR3D.H002, Local0) Notify (\_SB.PCI3.SR3D.H003, Local0) Notify (\_SB.PCI3.SR3D.H004, Local0) Notify (\_SB.PCI3.SR3D.H005, Local0) Notify (\_SB.PCI3.SR3D.H006, Local0) Notify (\_SB.PCI3.SR3D.H007, Local0) } If ((Local0 != 0x00)) { If ((Local1 == 0x01)) { \_SB.PCI0.BR1A.PMES = 0x01 \_SB.PCI0.BR1A.PMEP = 0x01 } If ((Local1 == 0x02)) { \_SB.PCI0.BR1B.PMES = 0x01 \_SB.PCI0.BR1B.PMEP = 0x01 } If ((Local1 == 0x03)) { \_SB.PCI0.BR2A.PMES = 0x01 \_SB.PCI0.BR2A.PMEP = 0x01 } If ((Local1 == 0x04)) { \_SB.PCI0.BR2B.PMES = 0x01 \_SB.PCI0.BR2B.PMEP = 0x01 } If ((Local1 == 0x05)) { \_SB.PCI0.BR2C.PMES = 0x01 \_SB.PCI0.BR2C.PMEP = 0x01 } If ((Local1 == 0x06)) { \_SB.PCI0.BR2D.PMES = 0x01 \_SB.PCI0.BR2D.PMEP = 0x01 } If ((Local1 == 0x07)) { \_SB.PCI0.BR3A.PMES = 0x01 \_SB.PCI0.BR3A.PMEP = 0x01 } If ((Local1 == 0x08)) { \_SB.PCI0.BR3B.PMES = 0x01 \_SB.PCI0.BR3B.PMEP = 0x01 } If ((Local1 == 0x09)) { \_SB.PCI0.BR3C.PMES = 0x01 \_SB.PCI0.BR3C.PMEP = 0x01 } If ((Local1 == 0x0A)) { \_SB.PCI0.BR3D.PMES = 0x01 \_SB.PCI0.BR3D.PMEP = 0x01 } If ((Local1 == 0x10)) { \_SB.PCI1.QRP0.PMES = 0x01 \_SB.PCI1.QRP0.PMEP = 0x01 } If ((Local1 == 0x11)) { \_SB.PCI1.QR2A.PMES = 0x01 \_SB.PCI1.QR2A.PMEP = 0x01 } If ((Local1 == 0x12)) { \_SB.PCI1.QR2B.PMES = 0x01 \_SB.PCI1.QR2B.PMEP = 0x01 } If ((Local1 == 0x13)) { \_SB.PCI1.QR2C.PMES = 0x01 \_SB.PCI1.QR2C.PMEP = 0x01 } If ((Local1 == 0x14)) { \_SB.PCI1.QR2D.PMES = 0x01 \_SB.PCI1.QR2D.PMEP = 0x01 } If ((Local1 == 0x15)) { \_SB.PCI1.QR3A.PMES = 0x01 \_SB.PCI1.QR3A.PMEP = 0x01 } If ((Local1 == 0x16)) { \_SB.PCI1.QR3B.PMES = 0x01 \_SB.PCI1.QR3B.PMEP = 0x01 } If ((Local1 == 0x17)) { \_SB.PCI1.QR3C.PMES = 0x01 \_SB.PCI1.QR3C.PMEP = 0x01 } If ((Local1 == 0x18)) { \_SB.PCI1.QR3D.PMES = 0x01 \_SB.PCI1.QR3D.PMEP = 0x01 } If ((Local1 == 0x20)) { \_SB.PCI2.RRP0.PMES = 0x01 \_SB.PCI2.RRP0.PMEP = 0x01 } If ((Local1 == 0x21)) { \_SB.PCI2.RR2A.PMES = 0x01 \_SB.PCI2.RR2A.PMEP = 0x01 } If ((Local1 == 0x22)) { \_SB.PCI2.RR2B.PMES = 0x01 \_SB.PCI2.RR2B.PMEP = 0x01 } If ((Local1 == 0x23)) { \_SB.PCI2.RR2C.PMES = 0x01 \_SB.PCI2.RR2C.PMEP = 0x01 } If ((Local1 == 0x24)) { \_SB.PCI2.RR2D.PMES = 0x01 \_SB.PCI2.RR2D.PMEP = 0x01 } If ((Local1 == 0x25)) { \_SB.PCI2.RR3A.PMES = 0x01 \_SB.PCI2.RR3A.PMEP = 0x01 } If ((Local1 == 0x26)) { \_SB.PCI2.RR3B.PMES = 0x01 \_SB.PCI2.RR3B.PMEP = 0x01 } If ((Local1 == 0x27)) { \_SB.PCI2.RR3C.PMES = 0x01 \_SB.PCI2.RR3C.PMEP = 0x01 } If ((Local1 == 0x28)) { \_SB.PCI2.RR3D.PMES = 0x01 \_SB.PCI2.RR3D.PMEP = 0x01 } If ((Local1 == 0x30)) { \_SB.PCI3.SRP0.PMES = 0x01 \_SB.PCI3.SRP0.PMEP = 0x01 } If ((Local1 == 0x31)) { \_SB.PCI3.SR2A.PMES = 0x01 \_SB.PCI3.SR2A.PMEP = 0x01 } If ((Local1 == 0x32)) { \_SB.PCI3.SR2B.PMES = 0x01 \_SB.PCI3.SR2B.PMEP = 0x01 } If ((Local1 == 0x33)) { \_SB.PCI3.SR2C.PMES = 0x01 \_SB.PCI3.SR2C.PMEP = 0x01 } If ((Local1 == 0x34)) { \_SB.PCI3.SR2D.PMES = 0x01 \_SB.PCI3.SR2D.PMEP = 0x01 } If ((Local1 == 0x35)) { \_SB.PCI3.SR3A.PMES = 0x01 \_SB.PCI3.SR3A.PMEP = 0x01 } If ((Local1 == 0x36)) { \_SB.PCI3.SR3B.PMES = 0x01 \_SB.PCI3.SR3B.PMEP = 0x01 } If ((Local1 == 0x37)) { \_SB.PCI3.SR3C.PMES = 0x01 \_SB.PCI3.SR3C.PMEP = 0x01 } If ((Local1 == 0x38)) { \_SB.PCI3.SR3D.PMES = 0x01 \_SB.PCI3.SR3D.PMEP = 0x01 } PEES = 0x01 PMEE = 0x00 } } Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { If ((\_SB.PCI0.RP01.DEVS () != 0x00)) { \_SB.PCI0.RP01.HPME () Notify (\_SB.PCI0.RP01, 0x02) // Device Wake } If ((\_SB.PCI0.RP02.DEVS () != 0x00)) { \_SB.PCI0.RP02.HPME () Notify (\_SB.PCI0.RP02, 0x02) // Device Wake } If ((\_SB.PCI0.RP03.DEVS () != 0x00)) { \_SB.PCI0.RP03.HPME () Notify (\_SB.PCI0.RP03, 0x02) // Device Wake } If ((\_SB.PCI0.RP04.DEVS () != 0x00)) { \_SB.PCI0.RP04.HPME () Notify (\_SB.PCI0.RP04, 0x02) // Device Wake } If ((\_SB.PCI0.RP05.DEVS () != 0x00)) { \_SB.PCI0.RP05.HPME () Notify (\_SB.PCI0.RP05, 0x02) // Device Wake } If ((\_SB.PCI0.RP06.DEVS () != 0x00)) { \_SB.PCI0.RP06.HPME () Notify (\_SB.PCI0.RP06, 0x02) // Device Wake } If ((\_SB.PCI0.RP07.DEVS () != 0x00)) { \_SB.PCI0.RP07.HPME () Notify (\_SB.PCI0.RP07, 0x02) // Device Wake } If ((\_SB.PCI0.RP08.DEVS () != 0x00)) { \_SB.PCI0.RP08.HPME () Notify (\_SB.PCI0.RP08, 0x02) // Device Wake } If ((\_SB.PCI0.BR1A.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR1A, 0x02) // Device Wake } If ((\_SB.PCI0.BR1B.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR1B, 0x02) // Device Wake } If ((\_SB.PCI0.BR2A.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR2A, 0x02) // Device Wake } If ((\_SB.PCI0.BR2B.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR2B, 0x02) // Device Wake } If ((\_SB.PCI0.BR2C.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR2C, 0x02) // Device Wake } If ((\_SB.PCI0.BR2D.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR2D, 0x02) // Device Wake } If ((\_SB.PCI0.BR3A.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR3A, 0x02) // Device Wake } If ((\_SB.PCI0.BR3B.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR3B, 0x02) // Device Wake } If ((\_SB.PCI0.BR3C.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR3C, 0x02) // Device Wake } If ((\_SB.PCI0.BR3D.DEVS () != 0x00)) { Notify (\_SB.PCI0.BR3D, 0x02) // Device Wake } If ((\_SB.PCI1.QRP0.DEVS () != 0x00)) { Notify (\_SB.PCI1.QRP0, 0x02) // Device Wake } If ((\_SB.PCI1.QR1A.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR1A, 0x02) // Device Wake } If ((\_SB.PCI1.QR1B.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR1B, 0x02) // Device Wake } If ((\_SB.PCI1.QR2A.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR2A, 0x02) // Device Wake } If ((\_SB.PCI1.QR2B.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR2B, 0x02) // Device Wake } If ((\_SB.PCI1.QR2C.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR2C, 0x02) // Device Wake } If ((\_SB.PCI1.QR2D.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR2D, 0x02) // Device Wake } If ((\_SB.PCI1.QR3A.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR3A, 0x02) // Device Wake } If ((\_SB.PCI1.QR3B.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR3B, 0x02) // Device Wake } If ((\_SB.PCI1.QR3C.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR3C, 0x02) // Device Wake } If ((\_SB.PCI1.QR3D.DEVS () != 0x00)) { Notify (\_SB.PCI1.QR3D, 0x02) // Device Wake } If ((\_SB.PCI2.RRP0.DEVS () != 0x00)) { Notify (\_SB.PCI2.RRP0, 0x02) // Device Wake } If ((\_SB.PCI2.RR1A.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR1A, 0x02) // Device Wake } If ((\_SB.PCI2.RR1B.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR1B, 0x02) // Device Wake } If ((\_SB.PCI2.RR2A.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR2A, 0x02) // Device Wake } If ((\_SB.PCI2.RR2B.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR2B, 0x02) // Device Wake } If ((\_SB.PCI2.RR2C.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR2C, 0x02) // Device Wake } If ((\_SB.PCI2.RR2D.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR2D, 0x02) // Device Wake } If ((\_SB.PCI2.RR3A.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR3A, 0x02) // Device Wake } If ((\_SB.PCI2.RR3B.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR3B, 0x02) // Device Wake } If ((\_SB.PCI2.RR3C.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR3C, 0x02) // Device Wake } If ((\_SB.PCI2.RR3D.DEVS () != 0x00)) { Notify (\_SB.PCI2.RR3D, 0x02) // Device Wake } If ((\_SB.PCI3.SRP0.DEVS () != 0x00)) { Notify (\_SB.PCI3.SRP0, 0x02) // Device Wake } If ((\_SB.PCI3.SR1A.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR1A, 0x02) // Device Wake } If ((\_SB.PCI3.SR1B.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR1B, 0x02) // Device Wake } If ((\_SB.PCI3.SR2A.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR2A, 0x02) // Device Wake } If ((\_SB.PCI3.SR2B.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR2B, 0x02) // Device Wake } If ((\_SB.PCI3.SR2C.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR2C, 0x02) // Device Wake } If ((\_SB.PCI3.SR2D.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR2D, 0x02) // Device Wake } If ((\_SB.PCI3.SR3A.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR3A, 0x02) // Device Wake } If ((\_SB.PCI3.SR3B.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR3B, 0x02) // Device Wake } If ((\_SB.PCI3.SR3C.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR3C, 0x02) // Device Wake } If ((\_SB.PCI3.SR3D.DEVS () != 0x00)) { Notify (\_SB.PCI3.SR3D, 0x02) // Device Wake } } } Device (_SB.TPM) { Method (_HID, 0, NotSerialized) // _HID: Hardware ID { If (TCMF) { Return (0x01013469) } ElseIf ((TTDP == 0x00)) { Return (0x310CD041) } Else { Return ("MSFT0101") } } Method (_STR, 0, NotSerialized) // _STR: Description String { If ((TTDP == 0x00)) { Return (Unicode ("TPM 1.2 Device")) } Else { Return (Unicode ("TPM 2.0 Device")) } } Name (_UID, 0x01) // _UID: Unique ID Name (CRST, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00001000, // Address Length _Y10) Memory32Fixed (ReadOnly, 0xFED70000, // Address Base 0x00001000, // Address Length _Y11) }) Name (CRSD, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED40000, // Address Base 0x00001000, // Address Length _Y12) }) Name (CRSI, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED40000, // Address Base 0x00001000, // Address Length _Y13) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If ((AMDT == 0x01)) { CreateDWordField (CRST, \_SB.TPM._Y10._BAS, MTFB) // _BAS: Base Address CreateDWordField (CRST, \_SB.TPM._Y10._LEN, LTFB) // _LEN: Length MTFB = TPMB /* \TPMB */ LTFB = 0x1000 CreateDWordField (CRST, \_SB.TPM._Y11._BAS, MTFC) // _BAS: Base Address CreateDWordField (CRST, \_SB.TPM._Y11._LEN, LTFC) // _LEN: Length MTFC = TPMC /* \TPMC */ LTFC = 0x1000 Return (CRST) /* \_SB_.TPM_.CRST */ } Else { If ((DTPT == 0x01)) { CreateDWordField (CRSD, \_SB.TPM._Y12._BAS, MTFE) // _BAS: Base Address CreateDWordField (CRSD, \_SB.TPM._Y12._LEN, LTFE) // _LEN: Length MTFE = 0xFED40000 LTFE = 0x0880 Return (CRSD) /* \_SB_.TPM_.CRSD */ } ElseIf ((TTPF == 0x01)) { CreateDWordField (CRSI, \_SB.TPM._Y13._BAS, MTFD) // _BAS: Base Address CreateDWordField (CRSI, \_SB.TPM._Y13._LEN, LTFD) // _LEN: Length MTFD = 0xFED40000 LTFD = 0x5000 Return (CRSI) /* \_SB_.TPM_.CRSI */ } ElseIf ((TTPF == 0x00)) { CreateDWordField (CRSI, \_SB.TPM._Y13._BAS, MTFF) // _BAS: Base Address MTFF = TPMM /* \TPMM */ Return (CRSI) /* \_SB_.TPM_.CRSI */ } MTFE = 0x00 LTFE = 0x00 Return (CRSI) /* \_SB_.TPM_.CRSI */ } } OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000) Field (TMMB, ByteAcc, Lock, Preserve) { Offset (0x04), LCST, 32, Offset (0x40), CREQ, 32, CSTS, 32, Offset (0x4C), SCMD, 32 } OperationRegion (CRBD, SystemMemory, TPMM, 0x48) Field (CRBD, AnyAcc, NoLock, Preserve) { Offset (0x04), HERR, 32, Offset (0x40), HCMD, 32, HSTS, 32 } Method (_STA, 0, NotSerialized) // _STA: Status { If ((TTDP == 0x00)) { If (TPMF) { Return (0x0F) } Return (0x00) } ElseIf ((TTDP == 0x01)) { If (TPMF) { Return (0x0F) } Return (0x00) } Return (0x00) } Method (STRT, 3, Serialized) { OperationRegion (TPMR, SystemMemory, FTPM, 0x1000) Field (TPMR, AnyAcc, NoLock, Preserve) { Offset (0x04), FERR, 32, Offset (0x0C), BEGN, 32 } Name (TIMR, 0x00) Switch (ToInteger (Arg1)) { Case (0x00) { Return (Buffer (0x01) { 0x03 // . }) } Case (0x01) { TIMR = 0x00 If ((AMDT == 0x01)) { While (((BEGN == One) && (TIMR < 0x0200))) { If ((BEGN == One)) { Sleep (0x01) TIMR++ } } Return (Zero) } Else { If ((((HSTS & 0x02) | (HSTS & 0x01)) == 0x03)) { HCMD = 0x01 } Else { FERR = 0x01 BEGN = 0x00 } Return (0x00) } } } Return (0x01) } Method (CRYF, 3, Serialized) { Switch (ToInteger (Arg1)) { Case (0x00) { Return (Buffer (0x01) { 0x03 // . }) } Case (0x01) { Name (TPMV, Package (0x02) { 0x01, Package (0x02) { 0x01, 0x20 } }) If ((_STA () == 0x00)) { Return (Package (0x01) { 0x00 }) } Return (TPMV) /* \_SB_.TPM_.CRYF.TPMV */ } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB.TPM) { OperationRegion (TSMI, SystemIO, SMIA, 0x02) Field (TSMI, WordAcc, NoLock, Preserve) { SMI, 16 } OperationRegion (ATNV, SystemMemory, PPIM, PPIL) Field (ATNV, AnyAcc, NoLock, Preserve) { RQST, 32, RCNT, 32, ERRO, 32, FLAG, 32, MISC, 32, OPTN, 32, SRSP, 32 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */)) { Switch (ToInteger (Arg2)) { Case (0x00) { Return (Buffer (0x02) { 0xFF, 0x01 // .. }) } Case (0x01) { If ((PPIV == 0x00)) { Return ("1.2") } Else { Return ("1.3") } } Case (0x02) { ToInteger (DerefOf (Arg3 [0x00]), RQST) /* \_SB_.TPM_.RQST */ SRSP = 0x00 FLAG = 0x02 TMF1 = OFST /* \OFST */ SRSP = 0x00 SMI = TMF1 /* \TMF1 */ Return (SRSP) /* \_SB_.TPM_.SRSP */ } Case (0x03) { Name (PPI1, Package (0x02) { 0x00, 0x00 }) PPI1 [0x01] = RQST /* \_SB_.TPM_.RQST */ Return (PPI1) /* \_SB_.TPM_._DSM.PPI1 */ } Case (0x04) { Return (TRST) /* \TRST */ } Case (0x05) { Name (PPI2, Package (0x03) { 0x00, 0x00, 0x00 }) SRSP = 0x00 FLAG = 0x05 SMI = OFST /* \OFST */ PPI2 [0x01] = RCNT /* \_SB_.TPM_.RCNT */ PPI2 [0x02] = ERRO /* \_SB_.TPM_.ERRO */ Return (PPI2) /* \_SB_.TPM_._DSM.PPI2 */ } Case (0x06) { Return (0x03) } Case (0x07) { ToInteger (DerefOf (Arg3 [0x00]), RQST) /* \_SB_.TPM_.RQST */ FLAG = 0x07 OPTN = 0x00 If ((RQST == 0x17)) { ToInteger (DerefOf (Arg3 [0x01]), OPTN) /* \_SB_.TPM_.OPTN */ } TMF1 = OFST /* \OFST */ SRSP = 0x00 SMI = TMF1 /* \TMF1 */ Return (SRSP) /* \_SB_.TPM_.SRSP */ } Case (0x08) { ToInteger (DerefOf (Arg3 [0x00]), RQST) /* \_SB_.TPM_.RQST */ FLAG = 0x08 TMF1 = OFST /* \OFST */ SRSP = 0x00 SMI = TMF1 /* \TMF1 */ Return (SRSP) /* \_SB_.TPM_.SRSP */ } Default { } } } ElseIf ((Arg0 == ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) { Switch (ToInteger (Arg2)) { Case (0x00) { Return (Buffer (0x01) { 0x03 // . }) } Case (0x01) { ToInteger (DerefOf (Arg3 [0x00]), RQST) /* \_SB_.TPM_.RQST */ FLAG = 0x09 TMF1 = OFST /* \OFST */ SRSP = 0x00 SMI = TMF1 /* \TMF1 */ Return (SRSP) /* \_SB_.TPM_.SRSP */ } Default { } } } If ((Arg0 == ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8"))) { Return (CRYF (Arg1, Arg2, Arg3)) } If ((Arg0 == ToUUID ("6bbf6cab-5463-4714-b7cd-f0203c0368d4"))) { Return (STRT (Arg1, Arg2, Arg3)) } Return (Buffer (0x01) { 0x00 // . }) } Method (TPTS, 1, NotSerialized) { } } Scope (\) { Mutex (OSUM, 0x00) Event (WFEV) Name (PEMA, 0xE0000000) Name (TBRP, 0x04) Name (TBUS, 0xFF) Name (TBHR, 0xFF) Name (TBMV, 0xFF) Name (RPR6, 0x00) Name (RPR7, 0x00) Name (RPR8, 0x00) Name (RPR9, 0x00) Name (RPRA, 0x00) Name (RPRB, 0x00) OperationRegion (TBNV, SystemMemory, 0xFFFF0000, 0x7B7B) Field (TBNV, AnyAcc, Lock, Preserve) { ATSF, 8, TBHS, 8, THRS, 8, TBWS, 8 } OperationRegion (SPRT, SystemIO, 0xB2, 0x02) Field (SPRT, ByteAcc, Lock, Preserve) { SSMP, 8 } Method (TBWK, 1, NotSerialized) { \_SB.PCI0.RP05.TWAK (Arg0) } Method (TBPS, 1, NotSerialized) { \_SB.PCI0.RP05.TPTS (Arg0) } } Scope (_SB) { Method (TBFP, 1, NotSerialized) { If (Arg0){} Else { } } Device (WMTF) { Name (_HID, "PNP0C14" /* Windows Management Instrumentation Device */) // _HID: Hardware ID Name (_UID, "TBFP") // _UID: Unique ID Name (_WDG, Buffer (0x14) { /* 0000 */ 0x48, 0xFD, 0xCC, 0x86, 0x5E, 0x20, 0x77, 0x4A, // H...^ wJ /* 0008 */ 0x9C, 0x48, 0x20, 0x21, 0xCB, 0xED, 0xE3, 0x41, // .H !...A /* 0010 */ 0x54, 0x46, 0x01, 0x02 // TF.. }) Method (WMTF, 3, NotSerialized) { CreateByteField (Arg2, 0x00, FP) If (FP) { TBFP (0x01) } Else { TBFP (0x00) } } } } Scope (_GPE) { Method (OSUP, 1, NotSerialized) { Local0 = (Arg0 + 0x0548) OperationRegion (PXVD, SystemMemory, Local0, 0x08) Field (PXVD, DWordAcc, NoLock, Preserve) { TB2P, 32, P2TB, 32 } Local1 = 0x64 P2TB = 0x0D While ((Local1 > 0x00)) { Local1 = (Local1 - 0x01) Local2 = TB2P /* \_GPE.OSUP.TB2P */ If ((Local2 == 0xFFFFFFFF)) { Return (0x02) } If ((Local2 & 0x01)) { Break } Sleep (0x32) } P2TB = 0x00 Return (0x01) } Method (TSXE, 0, NotSerialized) { DBG8 = 0x14 Local0 = MMTB () OperationRegion (PXVD, SystemMemory, Local0, 0x0550) Field (PXVD, DWordAcc, NoLock, Preserve) { VIDI, 32, Offset (0x548), TB2P, 32, P2TB, 32 } P2TB = 0x09 Local1 = 0x64 While ((Local1 > 0x00)) { Local1 = (Local1 - 0x01) Local2 = TB2P /* \_GPE.TSXE.TB2P */ If ((Local2 == 0xFFFFFFFF)) { Return (Zero) } If ((Local2 & 0x01)) { Break } Sleep (0x32) } P2TB = 0x00 Local1 = 0x01F4 While ((Local1 > 0x00)) { Local1 = (Local1 - 0x01) Local2 = VIDI /* \_GPE.TSXE.VIDI */ If ((Local2 != 0xFFFFFFFF)) { Return (0x00) } Sleep (0x32) } Return (Zero) } Method (MMRP, 0, NotSerialized) { Local0 = PEMA /* \PEMA */ If ((ToInteger (TBRP) < 0x08)) { Local0 += 0x000E0000 Local1 = ToInteger (TBRP) Local1 *= 0x1000 Local0 += Local1 } Else { Local0 += 0x8000 Local1 = (ToInteger (TBRP) - 0x20) Divide (Local1, 0x04, Local5, Local4) Local4 *= 0x8000 Local0 += Local4 Local5 *= 0x1000 Local0 += Local5 } Return (Local0) } Method (MMTB, 0, NotSerialized) { Local0 = MMRP () OperationRegion (MMMM, SystemMemory, Local0, 0x1A) Field (MMMM, AnyAcc, NoLock, Preserve) { Offset (0x19), SBUS, 8 } Local2 = SBUS /* \_GPE.MMTB.SBUS */ Local0 = PEMA /* \PEMA */ Local2 *= 0x00100000 Local0 += Local2 Return (Local0) } Method (GDRP, 0, NotSerialized) { Local0 = MMRP () OperationRegion (RP_X, SystemMemory, Local0, 0x0100) Field (RP_X, AnyAcc, NoLock, Preserve) { Offset (0x84), NBPS, 2, Offset (0xA4), PSD3, 2, Offset (0xE4), HNPS, 2 } If ((ToInteger (TBRP) < 0x20)) { PSD3 = 0x00 Return (PSD3) /* \_GPE.GDRP.PSD3 */ } Else { HNPS = 0x00 Return (HNPS) /* \_GPE.GDRP.HNPS */ } } Method (RPDX, 1, NotSerialized) { Local0 = MMRP () OperationRegion (RP_X, SystemMemory, Local0, 0x0100) Field (RP_X, AnyAcc, NoLock, Preserve) { Offset (0x84), NBPS, 2, Offset (0xA4), PSD3, 2, Offset (0xE4), HNPS, 2 } If ((ToInteger (TBRP) < 0x20)) { PSD3 = Arg0 } Else { HNPS = Arg0 } Sleep (0x64) } Method (TBAC, 0, NotSerialized) { Acquire (OSUM, 0xFFFF) Local0 = MMRP () OperationRegion (RP_X, SystemMemory, Local0, 0x0100) Field (RP_X, AnyAcc, NoLock, Preserve) { Offset (0x08), RDCC, 32, Offset (0x18), PBUS, 8, SBUS, 8, SUBS, 8, Offset (0x84), NBPS, 2, Offset (0xA4), PSD3, 2, Offset (0xE4), HNPS, 2 } Local1 = 0x00 While (0x01) { If (((RDCC != 0xFFFFFFFF) && (SBUS != 0xFF))) { If (((ToInteger (TBRP) < 0x10) && (PSD3 == 0x00))) { Break } If (((ToInteger (TBRP) >= 0x10) && (HNPS == 0x00))) { Break } } Else { Local1 += 0x01 If ((Local1 > 0x03E8)) { DBG9 = 0x7BAC Sleep (0x03E8) Break } Else { Sleep (0x10) } } } Release (OSUM) } Method (NTFY, 0, Serialized) { Sleep (0x64) Switch (ToInteger (TBRP)) { Case (0x00) { Notify (\_SB.PCI0.RP01, 0x00) // Bus Check } Case (0x01) { Notify (\_SB.PCI0.RP02, 0x00) // Bus Check } Case (0x02) { Notify (\_SB.PCI0.RP03, 0x00) // Bus Check } Case (0x03) { Notify (\_SB.PCI0.RP04, 0x00) // Bus Check } Case (0x04) { Notify (\_SB.PCI0.RP05, 0x00) // Bus Check } Case (0x05) { Notify (\_SB.PCI0.RP06, 0x00) // Bus Check } Case (0x06) { Notify (\_SB.PCI0.RP07, 0x00) // Bus Check } Case (0x07) { Notify (\_SB.PCI0.RP08, 0x00) // Bus Check } Case (0x20) { Notify (\_SB.PCI0.BR1A, 0x00) // Bus Check } Case (0x21) { Notify (\_SB.PCI0.BR1B, 0x00) // Bus Check } Case (0x24) { Notify (\_SB.PCI0.BR2A, 0x00) // Bus Check } Case (0x25) { Notify (\_SB.PCI0.BR2B, 0x00) // Bus Check } Case (0x26) { Notify (\_SB.PCI0.BR2C, 0x00) // Bus Check } Case (0x27) { Notify (\_SB.PCI0.BR2D, 0x00) // Bus Check } Case (0x28) { Notify (\_SB.PCI0.BR3A, 0x00) // Bus Check } Case (0x29) { Notify (\_SB.PCI0.BR3B, 0x00) // Bus Check } Case (0x2A) { Notify (\_SB.PCI0.BR3C, 0x00) // Bus Check } Case (0x2B) { Notify (\_SB.PCI0.BR3D, 0x00) // Bus Check } } } Method (TBFF, 0, NotSerialized) { Local0 = MMTB () OperationRegion (PXVD, SystemMemory, Local0, 0x04) Field (PXVD, DWordAcc, NoLock, Preserve) { VEDI, 32 } Local1 = VEDI /* \_GPE.TBFF.VEDI */ If ((Local1 == 0xFFFFFFFF)) { Return (OSUP (Local0)) } Else { Return (0x00) } } Method (OE1X, 0, NotSerialized) { Name (TSNE, 0xFF) If ((OSVR < 0x0E)) { Return (Zero) } Wait (WFEV, 0xFFFF) Signal (WFEV) TBAC () Acquire (OSUM, 0xFFFF) If ((TBHR != 0x01)) { Local0 = TBFF () If ((Local0 == 0x01)) { Sleep (0x10) Release (OSUM) Return (Zero) } If ((Local0 == 0x02)) { If ((TSNE & 0x02)) { Sleep (0x10) NTFY () } DBG8 = 0x7D Release (OSUM) Return (Zero) } } If ((TSNE & 0x01)) { SSMP = TBSW /* \TBSW */ } If ((TSNE & 0x02)) { NTFY () } Sleep (0x10) Release (OSUM) } } Scope (_SB.PCI0.RP05) { Method (TINI, 0, NotSerialized) { If ((OSVR < 0x0E)) { Return (Zero) } If (((TBHR != 0xFF) && (TBHR != 0x01))) { \_GPE.TBAC () Acquire (OSUM, 0xFFFF) DBG8 = 0x51 Local3 = \_GPE.MMTB () \_GPE.OSUP (Local3) Release (OSUM) Signal (WFEV) } } Method (TWAK, 1, NotSerialized) { Name (RPL1, 0x00) Name (RPL6, 0x00) Name (RPL7, 0x00) Name (RPL8, 0x00) Name (RPL9, 0x00) Name (RPLA, 0x00) Name (RPLB, 0x00) If ((OSVR < 0x0E)) { Return (Zero) } If (((TBHR != 0xFF) && (TBHR != 0x01))) { \_GPE.TBAC () Acquire (OSUM, 0xFFFF) If ((ToInteger (THRS) == 0x01)) { If ((ToInteger (TBWS) == 0x00)) { Sleep (0x01F4) } \_GPE.TSXE () If ((ToInteger (TBRP) > 0x0F)) { Sleep (0x0258) } } Local0 = \_GPE.MMRP () OperationRegion (RP_X, SystemMemory, Local0, 0x34) Field (RP_X, DWordAcc, NoLock, Preserve) { REG0, 32, REG1, 32, REG2, 32, REG3, 32, REG4, 32, REG5, 32, REG6, 32, REG7, 32, REG8, 32, REG9, 32, REGA, 32, REGB, 32, REGC, 32 } RPL1 = REG1 /* \_SB_.PCI0.RP05.TWAK.REG1 */ RPL6 = REG6 /* \_SB_.PCI0.RP05.TWAK.REG6 */ RPL7 = REG7 /* \_SB_.PCI0.RP05.TWAK.REG7 */ RPL8 = REG8 /* \_SB_.PCI0.RP05.TWAK.REG8 */ RPL9 = REG9 /* \_SB_.PCI0.RP05.TWAK.REG9 */ RPLA = REGA /* \_SB_.PCI0.RP05.TWAK.REGA */ RPLB = REGB /* \_SB_.PCI0.RP05.TWAK.REGB */ REG6 = RPR6 /* \RPR6 */ REG7 = RPR7 /* \RPR7 */ REG8 = RPR8 /* \RPR8 */ REG9 = RPR9 /* \RPR9 */ REGA = RPRA /* \RPRA */ REGB = RPRB /* \RPRB */ REG1 = 0x00100007 Local2 = \_GPE.GDRP () \_GPE.RPDX (Zero) Local3 = \_GPE.MMTB () \_GPE.OSUP (Local3) SSMP = TBSW /* \TBSW */ REG1 = RPL1 /* \_SB_.PCI0.RP05.TWAK.RPL1 */ REG6 = RPL6 /* \_SB_.PCI0.RP05.TWAK.RPL6 */ REG7 = RPL7 /* \_SB_.PCI0.RP05.TWAK.RPL7 */ REG8 = RPL8 /* \_SB_.PCI0.RP05.TWAK.RPL8 */ REG9 = RPL9 /* \_SB_.PCI0.RP05.TWAK.RPL9 */ REGA = RPLA /* \_SB_.PCI0.RP05.TWAK.RPLA */ REGB = RPLB /* \_SB_.PCI0.RP05.TWAK.RPLB */ \_GPE.RPDX (Local2) Release (OSUM) \_GPE.NTFY () } Signal (WFEV) } Method (TPTS, 1, NotSerialized) { If ((OSVR < 0x0E)) { Return (Zero) } If (((TBHR != 0xFF) && (TBHR != 0x01))) { Acquire (OSUM, 0xFFFF) Local0 = \_GPE.MMRP () OperationRegion (RP_X, SystemMemory, Local0, 0x34) Field (RP_X, DWordAcc, NoLock, Preserve) { REG0, 32, REG1, 32, REG2, 32, REG3, 32, REG4, 32, REG5, 32, REG6, 32, REG7, 32, REG8, 32, REG9, 32, REGA, 32, REGB, 32, REGC, 32 } RPR6 = REG6 /* \_SB_.PCI0.RP05.TPTS.REG6 */ RPR7 = REG7 /* \_SB_.PCI0.RP05.TPTS.REG7 */ RPR8 = REG8 /* \_SB_.PCI0.RP05.TPTS.REG8 */ RPR9 = REG9 /* \_SB_.PCI0.RP05.TPTS.REG9 */ RPRA = REGA /* \_SB_.PCI0.RP05.TPTS.REGA */ RPRB = REGB /* \_SB_.PCI0.RP05.TPTS.REGB */ Release (OSUM) } Reset (WFEV) } } OperationRegion (_SB.PCI0.LPC0.PIX0, PCI_Config, 0x60, 0x0C) Field (\_SB.PCI0.LPC0.PIX0, ByteAcc, NoLock, Preserve) { PIRA, 8, PIRB, 8, PIRC, 8, PIRD, 8, Offset (0x08), PIRE, 8, PIRF, 8, PIRG, 8, PIRH, 8 } Scope (_SB) { Name (BUFA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y14) {15} }) CreateWordField (BUFA, \_SB._Y14._INT, IRA0) // _INT: Interrupts Device (LNKA) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x01) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRA & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSA) /* \_SB_.PRSA */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRA |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRA & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRA = Local0 } } Device (LNKB) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRB & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSB) /* \_SB_.PRSB */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRB |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRB & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRB = Local0 } } Device (LNKC) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRC & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSC) /* \_SB_.PRSC */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRC |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRC & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRC = Local0 } } Device (LNKD) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRD & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSD) /* \_SB_.PRSD */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRD |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRD & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRD = Local0 } } Device (LNKE) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRE & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSE) /* \_SB_.PRSE */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRE |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRE & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRE = Local0 } } Device (LNKF) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRF & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSF) /* \_SB_.PRSF */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRF |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRF & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRF = Local0 } } Device (LNKG) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRG & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSG) /* \_SB_.PRSG */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRG |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRG & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRG = Local0 } } Device (LNKH) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Local0 = (PIRH & 0x80) If (Local0) { Return (0x09) } Else { Return (0x0B) } } Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings { Return (PRSH) /* \_SB_.PRSH */ } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { PIRH |= 0x80 } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Local0 = (PIRH & 0x0F) IRA0 = (0x01 << Local0) Return (BUFA) /* \_SB_.BUFA */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, 0x01, IRA) FindSetRightBit (IRA, Local0) Local0-- PIRH = Local0 } } } Scope (_SB) { Name (XCPD, 0x00) Name (XNPT, 0x01) Name (XCAP, 0x02) Name (XDCP, 0x04) Name (XDCT, 0x08) Name (XDST, 0x0A) Name (XLCP, 0x0C) Name (XLCT, 0x10) Name (XLST, 0x12) Name (XSCP, 0x14) Name (XSCT, 0x18) Name (XSST, 0x1A) Name (XRCT, 0x1C) Mutex (MUTE, 0x00) Method (RBPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x01) Field (PCFG, ByteAcc, NoLock, Preserve) { XCFG, 8 } Release (MUTE) Return (XCFG) /* \_SB_.RBPE.XCFG */ } Method (RWPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) Arg0 &= 0xFFFFFFFE Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x02) Field (PCFG, WordAcc, NoLock, Preserve) { XCFG, 16 } Release (MUTE) Return (XCFG) /* \_SB_.RWPE.XCFG */ } Method (RDPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) Arg0 &= 0xFFFFFFFC Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } Release (MUTE) Return (XCFG) /* \_SB_.RDPE.XCFG */ } Method (WBPE, 2, NotSerialized) { Acquire (MUTE, 0x0FFF) Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x01) Field (PCFG, ByteAcc, NoLock, Preserve) { XCFG, 8 } XCFG = Arg1 Release (MUTE) } Method (WWPE, 2, NotSerialized) { Acquire (MUTE, 0x03E8) Arg0 &= 0xFFFFFFFE Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x02) Field (PCFG, WordAcc, NoLock, Preserve) { XCFG, 16 } XCFG = Arg1 Release (MUTE) } Method (WDPE, 2, NotSerialized) { Acquire (MUTE, 0x03E8) Arg0 &= 0xFFFFFFFC Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } XCFG = Arg1 Release (MUTE) } Method (RWDP, 3, NotSerialized) { Acquire (MUTE, 0x03E8) Arg0 &= 0xFFFFFFFC Local0 = (Arg0 + PEBS) /* \PEBS */ OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } Local1 = (XCFG & Arg2) XCFG = (Local1 | Arg1) Release (MUTE) } Method (RPME, 1, NotSerialized) { Local0 = (Arg0 + 0x84) Local1 = RDPE (Local0) If ((Local1 == 0xFFFFFFFF)) { Return (0x00) } Else { If ((Local1 && 0x00010000)) { WDPE (Local0, (Local1 & 0x00010000)) Return (0x01) } Return (0x00) } } } Scope (_SB.PCI0.BR1A) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 == 0x02) && (Arg2 == 0x00))) { Return (Buffer (0x01) { 0x80 // . }) } If (((Arg1 == 0x02) && (Arg2 == 0x07))) { Return (Package (0x02) { 0x01, Unicode (" Slot01 x8") }) } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB.PCI0.BR2A) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 == 0x02) && (Arg2 == 0x00))) { Return (Buffer (0x01) { 0x80 // . }) } If (((Arg1 == 0x02) && (Arg2 == 0x07))) { Return (Package (0x02) { 0x06, Unicode (" Slot06 x16") }) } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB.PCI0.BR3A) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 == 0x02) && (Arg2 == 0x00))) { Return (Buffer (0x01) { 0x80 // . }) } If (((Arg1 == 0x02) && (Arg2 == 0x07))) { Return (Package (0x02) { 0x04, Unicode (" Slot04 x16") }) } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB.PCI1.QR1A) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 == 0x02) && (Arg2 == 0x00))) { Return (Buffer (0x01) { 0x80 // . }) } If (((Arg1 == 0x02) && (Arg2 == 0x07))) { Return (Package (0x02) { 0x05, Unicode (" Slot05 x8") }) } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB.PCI1.QR2A) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 == 0x02) && (Arg2 == 0x00))) { Return (Buffer (0x01) { 0x80 // . }) } If (((Arg1 == 0x02) && (Arg2 == 0x07))) { Return (Package (0x02) { 0x02, Unicode (" Slot02 x16") }) } } Return (Buffer (0x01) { 0x00 // . }) } } Scope (_SB) { Device (INTS) { Name (_HID, EisaId ("INT3510")) // _HID: Hardware ID Name (_STR, Unicode ("Intel Nitrous Device")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { If ((CPUT == 0x02)) { If ((SCUF == 0x00)) { Return (0x0F) } Else { Return (0x00) } } Else { Return (0x00) } } } } } FACP ---- [000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] [004h 0004 4] Table Length : 0000010C [008h 0008 1] Revision : 05 [009h 0009 1] Checksum : 3B [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "AMI " [020h 0032 4] Asl Compiler Revision : 00010013 [024h 0036 4] FACS Address : BD312F80 [028h 0040 4] DSDT Address : BB0C51C8 [02Ch 0044 1] Model : 01 [02Dh 0045 1] PM Profile : 01 [Desktop] [02Eh 0046 2] SCI Interrupt : 0009 [030h 0048 4] SMI Command Port : 000000B2 [034h 0052 1] ACPI Enable Value : A0 [035h 0053 1] ACPI Disable Value : A1 [036h 0054 1] S4BIOS Command : 00 [037h 0055 1] P-State Control : 00 [038h 0056 4] PM1A Event Block Address : 00000400 [03Ch 0060 4] PM1B Event Block Address : 00000000 [040h 0064 4] PM1A Control Block Address : 00000404 [044h 0068 4] PM1B Control Block Address : 00000000 [048h 0072 4] PM2 Control Block Address : 00000450 [04Ch 0076 4] PM Timer Block Address : 00000408 [050h 0080 4] GPE0 Block Address : 00000420 [054h 0084 4] GPE1 Block Address : 00000000 [058h 0088 1] PM1 Event Block Length : 04 [059h 0089 1] PM1 Control Block Length : 02 [05Ah 0090 1] PM2 Control Block Length : 01 [05Bh 0091 1] PM Timer Block Length : 04 [05Ch 0092 1] GPE0 Block Length : 10 [05Dh 0093 1] GPE1 Block Length : 00 [05Eh 0094 1] GPE1 Base Offset : 00 [05Fh 0095 1] _CST Support : 00 [060h 0096 2] C2 Latency : 0065 [062h 0098 2] C3 Latency : 03E9 [064h 0100 2] CPU Cache Size : 0400 [066h 0102 2] Cache Flush Stride : 0010 [068h 0104 1] Duty Cycle Offset : 01 [069h 0105 1] Duty Cycle Width : 03 [06Ah 0106 1] RTC Day Alarm Index : 0D [06Bh 0107 1] RTC Month Alarm Index : 00 [06Ch 0108 1] RTC Century Index : 32 [06Dh 0109 2] Boot Flags (decoded below) : 0010 Legacy Devices Supported (V2) : 0 8042 Present on ports 60/64 (V2) : 0 VGA Not Present (V4) : 0 MSI Not Supported (V4) : 0 PCIe ASPM Not Supported (V4) : 1 CMOS RTC Not Present (V5) : 0 [06Fh 0111 1] Reserved : 00 [070h 0112 4] Flags (decoded below) : 000084A5 WBINVD instruction is operational (V1) : 1 WBINVD flushes all caches (V1) : 0 All CPUs support C1 (V1) : 1 C2 works on MP system (V1) : 0 Control Method Power Button (V1) : 0 Control Method Sleep Button (V1) : 1 RTC wake not in fixed reg space (V1) : 0 RTC can wake system from S4 (V1) : 1 32-bit PM Timer (V1) : 0 Docking Supported (V1) : 0 Reset Register Supported (V2) : 1 Sealed Case (V3) : 0 Headless - No Video (V3) : 0 Use native instr after SLP_TYPx (V3) : 0 PCIEXP_WAK Bits Supported (V4) : 0 Use Platform Timer (V4) : 1 RTC_STS valid on S4 wake (V4) : 0 Remote Power-on capable (V4) : 0 Use APIC Cluster Model (V4) : 0 Use APIC Physical Destination Mode (V4) : 0 Hardware Reduced (V5) : 0 Low Power S0 Idle (V5) : 0 [074h 0116 12] Reset Register : [Generic Address Structure] [074h 0116 1] Space ID : 01 [SystemIO] [075h 0117 1] Bit Width : 08 [076h 0118 1] Bit Offset : 00 [077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] [078h 0120 8] Address : 0000000000000CF9 [080h 0128 1] Value to cause reset : 06 [081h 0129 2] ARM Flags (decoded below) : 0000 PSCI Compliant : 0 Must use HVC for PSCI : 0 [083h 0131 1] FADT Minor Revision : 00 [084h 0132 8] FACS Address : 0000000000000000 [08Ch 0140 8] DSDT Address : 00000000BB0C51C8 [094h 0148 12] PM1A Event Block : [Generic Address Structure] [094h 0148 1] Space ID : 01 [SystemIO] [095h 0149 1] Bit Width : 20 [096h 0150 1] Bit Offset : 00 [097h 0151 1] Encoded Access Width : 02 [Word Access:16] [098h 0152 8] Address : 0000000000000400 [0A0h 0160 12] PM1B Event Block : [Generic Address Structure] [0A0h 0160 1] Space ID : 01 [SystemIO] [0A1h 0161 1] Bit Width : 00 [0A2h 0162 1] Bit Offset : 00 [0A3h 0163 1] Encoded Access Width : 02 [Word Access:16] [0A4h 0164 8] Address : 0000000000000000 [0ACh 0172 12] PM1A Control Block : [Generic Address Structure] [0ACh 0172 1] Space ID : 01 [SystemIO] [0ADh 0173 1] Bit Width : 10 [0AEh 0174 1] Bit Offset : 00 [0AFh 0175 1] Encoded Access Width : 02 [Word Access:16] [0B0h 0176 8] Address : 0000000000000404 [0B8h 0184 12] PM1B Control Block : [Generic Address Structure] [0B8h 0184 1] Space ID : 01 [SystemIO] [0B9h 0185 1] Bit Width : 00 [0BAh 0186 1] Bit Offset : 00 [0BBh 0187 1] Encoded Access Width : 02 [Word Access:16] [0BCh 0188 8] Address : 0000000000000000 [0C4h 0196 12] PM2 Control Block : [Generic Address Structure] [0C4h 0196 1] Space ID : 01 [SystemIO] [0C5h 0197 1] Bit Width : 08 [0C6h 0198 1] Bit Offset : 00 [0C7h 0199 1] Encoded Access Width : 01 [Byte Access:8] [0C8h 0200 8] Address : 0000000000000450 [0D0h 0208 12] PM Timer Block : [Generic Address Structure] [0D0h 0208 1] Space ID : 01 [SystemIO] [0D1h 0209 1] Bit Width : 20 [0D2h 0210 1] Bit Offset : 00 [0D3h 0211 1] Encoded Access Width : 03 [DWord Access:32] [0D4h 0212 8] Address : 0000000000000408 [0DCh 0220 12] GPE0 Block : [Generic Address Structure] [0DCh 0220 1] Space ID : 01 [SystemIO] [0DDh 0221 1] Bit Width : 80 [0DEh 0222 1] Bit Offset : 00 [0DFh 0223 1] Encoded Access Width : 01 [Byte Access:8] [0E0h 0224 8] Address : 0000000000000420 [0E8h 0232 12] GPE1 Block : [Generic Address Structure] [0E8h 0232 1] Space ID : 01 [SystemIO] [0E9h 0233 1] Bit Width : 00 [0EAh 0234 1] Bit Offset : 00 [0EBh 0235 1] Encoded Access Width : 01 [Byte Access:8] [0ECh 0236 8] Address : 0000000000000000 [0F4h 0244 12] Sleep Control Register : [Generic Address Structure] [0F4h 0244 1] Space ID : 00 [SystemMemory] [0F5h 0245 1] Bit Width : 00 [0F6h 0246 1] Bit Offset : 00 [0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy] [0F8h 0248 8] Address : 0000000000000000 [100h 0256 12] Sleep Status Register : [Generic Address Structure] [100h 0256 1] Space ID : 00 [SystemMemory] [101h 0257 1] Bit Width : 00 [102h 0258 1] Bit Offset : 00 [103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy] [104h 0260 8] Address : 0000000000000000 /**** ACPI table terminates in the middle of a data structure! (dump table) */ Raw Table Data: Length 268 (0x10C) 0000: 46 41 43 50 0C 01 00 00 05 3B 41 4C 41 53 4B 41 // FACP.....;ALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 // A M I ... ..AMI 0020: 13 00 01 00 80 2F 31 BD C8 51 0C BB 01 01 09 00 // ...../1..Q...... 0030: B2 00 00 00 A0 A1 00 00 00 04 00 00 00 00 00 00 // ................ 0040: 04 04 00 00 00 00 00 00 50 04 00 00 08 04 00 00 // ........P....... 0050: 20 04 00 00 00 00 00 00 04 02 01 04 10 00 00 00 // ............... 0060: 65 00 E9 03 00 04 10 00 01 03 0D 00 32 10 00 00 // e...........2... 0070: A5 84 00 00 01 08 00 00 F9 0C 00 00 00 00 00 00 // ................ 0080: 06 00 00 00 00 00 00 00 00 00 00 00 C8 51 0C BB // .............Q.. 0090: 00 00 00 00 01 20 00 02 00 04 00 00 00 00 00 00 // ..... .......... 00A0: 01 00 00 02 00 00 00 00 00 00 00 00 01 10 00 02 // ................ 00B0: 04 04 00 00 00 00 00 00 01 00 00 02 00 00 00 00 // ................ 00C0: 00 00 00 00 01 08 00 01 50 04 00 00 00 00 00 00 // ........P....... 00D0: 01 20 00 03 08 04 00 00 00 00 00 00 01 80 00 01 // . .............. 00E0: 20 04 00 00 00 00 00 00 01 00 00 01 00 00 00 00 // ............... 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 00 00 00 00 00 00 00 00 // ............ FACS ---- [000h 0000 4] Signature : "FACS" [004h 0004 4] Length : 00000040 [008h 0008 4] Hardware Signature : DF342501 [00Ch 0012 4] 32 Firmware Waking Vector : 00000000 [010h 0016 4] Global Lock : 00000000 [014h 0020 4] Flags (decoded below) : 00000000 S4BIOS Support Present : 0 64-bit Wake Supported (V2) : 0 [018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 [020h 0032 1] Version : 02 [021h 0033 3] Reserved : 000000 [024h 0036 4] OspmFlags (decoded below) : 00000000 64-bit Wake Env Required (V2) : 0 Raw Table Data: Length 64 (0x40) 0000: 46 41 43 53 40 00 00 00 01 25 34 DF 00 00 00 00 // FACS@....%4..... 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0020: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ FIDT ---- [000h 0000 4] Signature : "FIDT" [004h 0004 4] Table Length : 0000009C [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 56 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "AMI " [020h 0032 4] Asl Compiler Revision : 00010013 **** Unknown ACPI table signature [FIDT] Raw Table Data: Length 156 (0x9C) 0000: 46 49 44 54 9C 00 00 00 01 56 41 4C 41 53 4B 41 // FIDT.....VALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 // A M I ... ..AMI 0020: 13 00 01 00 24 46 49 44 04 78 00 41 32 38 36 30 // ....$FID.x.A2860 0030: 00 00 00 00 54 10 80 38 8B 64 E0 58 3E 9F 5C 0D // ....T..8.d.X>.\. 0040: 97 DF 08 CD 30 35 00 30 36 00 30 30 00 31 30 00 // ....05.06.00.10. 0050: 00 00 00 00 00 00 00 FF FF 41 4C 41 53 4B 41 41 // .........ALASKAA 0060: 20 4D 20 49 20 00 00 00 00 00 00 00 00 00 00 00 // M I ........... 0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 // ............ FPDT ---- [000h 0000 4] Signature : "FPDT" [Firmware Performance Data Table] [004h 0004 4] Table Length : 00000044 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : DA [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "AMI " [020h 0032 4] Asl Compiler Revision : 00010013 [024h 0036 2] Subtable Type : 0001 [026h 0038 1] Length : 10 [027h 0039 1] Revision : 01 [028h 0040 4] Reserved : 00000000 [02Ch 0044 8] S3PT Record Address : 00000000BDB70430 [034h 0052 2] Subtable Type : 0000 [036h 0054 1] Length : 10 [037h 0055 1] Revision : 01 [038h 0056 4] Reserved : 00000000 [03Ch 0060 8] FPDT Boot Record Address : 00000000BDB70450 Raw Table Data: Length 68 (0x44) 0000: 46 50 44 54 44 00 00 00 01 DA 41 4C 41 53 4B 41 // FPDTD.....ALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 // A M I ... ..AMI 0020: 13 00 01 00 01 00 10 01 00 00 00 00 30 04 B7 BD // ............0... 0030: 00 00 00 00 00 00 10 01 00 00 00 00 50 04 B7 BD // ............P... 0040: 00 00 00 00 // .... HPET ---- [000h 0000 4] Signature : "HPET" [High Precision Event Timer table] [004h 0004 4] Table Length : 00000038 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 4D [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20091013 [024h 0036 4] Hardware Block ID : 8086A701 [028h 0040 12] Timer Block Register : [Generic Address Structure] [028h 0040 1] Space ID : 00 [SystemMemory] [029h 0041 1] Bit Width : 40 [02Ah 0042 1] Bit Offset : 00 [02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] [02Ch 0044 8] Address : 00000000FED00000 [034h 0052 1] Sequence Number : 00 [035h 0053 2] Minimum Clock Ticks : 37EE [037h 0055 1] Flags (decoded below) : 00 4K Page Protect : 0 64K Page Protect : 0 Raw Table Data: Length 56 (0x38) 0000: 48 50 45 54 38 00 00 00 01 4D 41 4C 41 53 4B 41 // HPET8....MALASKA 0010: 41 20 4D 20 49 20 00 00 01 00 00 00 49 4E 54 4C // A M I ......INTL 0020: 13 10 09 20 01 A7 86 80 00 40 00 00 00 00 D0 FE // ... .....@...... 0030: 00 00 00 00 00 EE 37 00 // ......7. MCFG ---- [000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] [004h 0004 4] Table Length : 0000003C [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 01 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I" [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "MSFT" [020h 0032 4] Asl Compiler Revision : 00000097 [024h 0036 8] Reserved : 0000000000000000 [02Ch 0044 8] Base Address : 00000000E0000000 [034h 0052 2] Segment Group Number : 0000 [036h 0054 1] Start Bus Number : 00 [037h 0055 1] End Bus Number : FF [038h 0056 4] Reserved : 00000000 Raw Table Data: Length 60 (0x3C) 0000: 4D 43 46 47 3C 00 00 00 01 01 41 4C 41 53 4B 41 // MCFG<.....ALASKA 0010: 41 20 4D 20 49 00 00 00 09 20 07 01 4D 53 46 54 // A M I.... ..MSFT 0020: 97 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E0 // ................ 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ MSCT ---- [000h 0000 4] Signature : "MSCT" [Maximum System Characteristics Table] [004h 0004 4] Table Length : 00000090 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : F2 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20091013 [024h 0036 4] Proximity Offset : 00000038 [028h 0040 4] Max Proximity Domains : 00000003 [02Ch 0044 4] Max Clock Domains : 00000000 [030h 0048 8] Max Physical Address : 00000FFFFFFFFFFF [038h 0056 1] Revision : 01 [039h 0057 1] Length : 16 [03Ah 0058 4] Domain Range Start : 00000000 [03Eh 0062 4] Domain Range End : 00000003 [042h 0066 4] Processor Capacity : 00000030 [046h 0070 8] Memory Capacity : 00000FFFFFFFFFFF [04Eh 0078 1] Revision : 01 [04Fh 0079 1] Length : 16 [050h 0080 4] Domain Range Start : 00000000 [054h 0084 4] Domain Range End : 00000000 [058h 0088 4] Processor Capacity : 00000000 [05Ch 0092 8] Memory Capacity : 0000000000000000 [064h 0100 1] Revision : 01 [065h 0101 1] Length : 16 [066h 0102 4] Domain Range Start : 00000000 [06Ah 0106 4] Domain Range End : 00000000 [06Eh 0110 4] Processor Capacity : 00000000 [072h 0114 8] Memory Capacity : 0000000000000000 [07Ah 0122 1] Revision : 01 [07Bh 0123 1] Length : 16 [07Ch 0124 4] Domain Range Start : 00000000 [080h 0128 4] Domain Range End : 00000000 [084h 0132 4] Processor Capacity : 00000000 [088h 0136 8] Memory Capacity : 0000000000000000 Raw Table Data: Length 144 (0x90) 0000: 4D 53 43 54 90 00 00 00 01 F2 41 4C 41 53 4B 41 // MSCT......ALASKA 0010: 41 20 4D 20 49 20 00 00 01 00 00 00 49 4E 54 4C // A M I ......INTL 0020: 13 10 09 20 38 00 00 00 03 00 00 00 00 00 00 00 // ... 8........... 0030: FF FF FF FF FF 0F 00 00 01 16 00 00 00 00 03 00 // ................ 0040: 00 00 30 00 00 00 FF FF FF FF FF 0F 00 00 01 16 // ..0............. 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0060: 00 00 00 00 01 16 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 00 00 00 00 00 00 00 00 01 16 00 00 00 00 // ................ 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ SLIT ---- [000h 0000 4] Signature : "SLIT" [System Locality Information Table] [004h 0004 4] Table Length : 0000002D [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 23 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20091013 [024h 0036 8] Localities : 0000000000000001 [02Ch 0044 1] Locality 0 : 0A Raw Table Data: Length 45 (0x2D) 0000: 53 4C 49 54 2D 00 00 00 01 23 41 4C 41 53 4B 41 // SLIT-....#ALASKA 0010: 41 20 4D 20 49 20 00 00 01 00 00 00 49 4E 54 4C // A M I ......INTL 0020: 13 10 09 20 01 00 00 00 00 00 00 00 0A // ... ......... SRAT ---- [000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] [004h 0004 4] Table Length : 00001158 [008h 0008 1] Revision : 03 [009h 0009 1] Checksum : DC [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20091013 [024h 0036 4] Table Revision : 00000001 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [031h 0049 1] Length : 10 [032h 0050 1] Proximity Domain Low(8) : 00 [033h 0051 1] Apic ID : 00 [034h 0052 4] Flags (decoded below) : 00000001 Enabled : 1 [038h 0056 1] Local Sapic EID : 00 [039h 0057 3] Proximity Domain High(24) : 000000 [03Ch 0060 4] Clock Domain : 00000000 [040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [041h 0065 1] Length : 10 [042h 0066 1] Proximity Domain Low(8) : 00 [043h 0067 1] Apic ID : 02 [044h 0068 4] Flags (decoded below) : 00000001 Enabled : 1 [048h 0072 1] Local Sapic EID : 00 [049h 0073 3] Proximity Domain High(24) : 000000 [04Ch 0076 4] Clock Domain : 00000000 [050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [051h 0081 1] Length : 10 [052h 0082 1] Proximity Domain Low(8) : 00 [053h 0083 1] Apic ID : 04 [054h 0084 4] Flags (decoded below) : 00000001 Enabled : 1 [058h 0088 1] Local Sapic EID : 00 [059h 0089 3] Proximity Domain High(24) : 000000 [05Ch 0092 4] Clock Domain : 00000000 [060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [061h 0097 1] Length : 10 [062h 0098 1] Proximity Domain Low(8) : 00 [063h 0099 1] Apic ID : 06 [064h 0100 4] Flags (decoded below) : 00000001 Enabled : 1 [068h 0104 1] Local Sapic EID : 00 [069h 0105 3] Proximity Domain High(24) : 000000 [06Ch 0108 4] Clock Domain : 00000000 [070h 0112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [071h 0113 1] Length : 10 [072h 0114 1] Proximity Domain Low(8) : 00 [073h 0115 1] Apic ID : 08 [074h 0116 4] Flags (decoded below) : 00000001 Enabled : 1 [078h 0120 1] Local Sapic EID : 00 [079h 0121 3] Proximity Domain High(24) : 000000 [07Ch 0124 4] Clock Domain : 00000000 [080h 0128 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [081h 0129 1] Length : 10 [082h 0130 1] Proximity Domain Low(8) : 00 [083h 0131 1] Apic ID : 0A [084h 0132 4] Flags (decoded below) : 00000001 Enabled : 1 [088h 0136 1] Local Sapic EID : 00 [089h 0137 3] Proximity Domain High(24) : 000000 [08Ch 0140 4] Clock Domain : 00000000 [090h 0144 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [091h 0145 1] Length : 10 [092h 0146 1] Proximity Domain Low(8) : 00 [093h 0147 1] Apic ID : 01 [094h 0148 4] Flags (decoded below) : 00000001 Enabled : 1 [098h 0152 1] Local Sapic EID : 00 [099h 0153 3] Proximity Domain High(24) : 000000 [09Ch 0156 4] Clock Domain : 00000000 [0A0h 0160 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0A1h 0161 1] Length : 10 [0A2h 0162 1] Proximity Domain Low(8) : 00 [0A3h 0163 1] Apic ID : 03 [0A4h 0164 4] Flags (decoded below) : 00000001 Enabled : 1 [0A8h 0168 1] Local Sapic EID : 00 [0A9h 0169 3] Proximity Domain High(24) : 000000 [0ACh 0172 4] Clock Domain : 00000000 [0B0h 0176 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0B1h 0177 1] Length : 10 [0B2h 0178 1] Proximity Domain Low(8) : 00 [0B3h 0179 1] Apic ID : 05 [0B4h 0180 4] Flags (decoded below) : 00000001 Enabled : 1 [0B8h 0184 1] Local Sapic EID : 00 [0B9h 0185 3] Proximity Domain High(24) : 000000 [0BCh 0188 4] Clock Domain : 00000000 [0C0h 0192 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0C1h 0193 1] Length : 10 [0C2h 0194 1] Proximity Domain Low(8) : 00 [0C3h 0195 1] Apic ID : 07 [0C4h 0196 4] Flags (decoded below) : 00000001 Enabled : 1 [0C8h 0200 1] Local Sapic EID : 00 [0C9h 0201 3] Proximity Domain High(24) : 000000 [0CCh 0204 4] Clock Domain : 00000000 [0D0h 0208 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0D1h 0209 1] Length : 10 [0D2h 0210 1] Proximity Domain Low(8) : 00 [0D3h 0211 1] Apic ID : 09 [0D4h 0212 4] Flags (decoded below) : 00000001 Enabled : 1 [0D8h 0216 1] Local Sapic EID : 00 [0D9h 0217 3] Proximity Domain High(24) : 000000 [0DCh 0220 4] Clock Domain : 00000000 [0E0h 0224 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0E1h 0225 1] Length : 10 [0E2h 0226 1] Proximity Domain Low(8) : 00 [0E3h 0227 1] Apic ID : 0B [0E4h 0228 4] Flags (decoded below) : 00000001 Enabled : 1 [0E8h 0232 1] Local Sapic EID : 00 [0E9h 0233 3] Proximity Domain High(24) : 000000 [0ECh 0236 4] Clock Domain : 00000000 [0F0h 0240 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [0F1h 0241 1] Length : 10 [0F2h 0242 1] Proximity Domain Low(8) : 00 [0F3h 0243 1] Apic ID : FF [0F4h 0244 4] Flags (decoded below) : 00000000 Enabled : 0 [0F8h 0248 1] Local Sapic EID : 00 [0F9h 0249 3] Proximity Domain High(24) : 000000 [0FCh 0252 4] Clock Domain : 00000000 [100h 0256 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [101h 0257 1] Length : 10 [102h 0258 1] Proximity Domain Low(8) : 00 [103h 0259 1] Apic ID : FF [104h 0260 4] Flags (decoded below) : 00000000 Enabled : 0 [108h 0264 1] Local Sapic EID : 00 [109h 0265 3] Proximity Domain High(24) : 000000 [10Ch 0268 4] Clock Domain : 00000000 [110h 0272 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [111h 0273 1] Length : 10 [112h 0274 1] Proximity Domain Low(8) : 00 [113h 0275 1] Apic ID : FF [114h 0276 4] Flags (decoded below) : 00000000 Enabled : 0 [118h 0280 1] Local Sapic EID : 00 [119h 0281 3] Proximity Domain High(24) : 000000 [11Ch 0284 4] Clock Domain : 00000000 [120h 0288 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [121h 0289 1] Length : 10 [122h 0290 1] Proximity Domain Low(8) : 00 [123h 0291 1] Apic ID : FF [124h 0292 4] Flags (decoded below) : 00000000 Enabled : 0 [128h 0296 1] Local Sapic EID : 00 [129h 0297 3] Proximity Domain High(24) : 000000 [12Ch 0300 4] Clock Domain : 00000000 [130h 0304 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [131h 0305 1] Length : 10 [132h 0306 1] Proximity Domain Low(8) : 00 [133h 0307 1] Apic ID : FF [134h 0308 4] Flags (decoded below) : 00000000 Enabled : 0 [138h 0312 1] Local Sapic EID : 00 [139h 0313 3] Proximity Domain High(24) : 000000 [13Ch 0316 4] Clock Domain : 00000000 [140h 0320 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [141h 0321 1] Length : 10 [142h 0322 1] Proximity Domain Low(8) : 00 [143h 0323 1] Apic ID : FF [144h 0324 4] Flags (decoded below) : 00000000 Enabled : 0 [148h 0328 1] Local Sapic EID : 00 [149h 0329 3] Proximity Domain High(24) : 000000 [14Ch 0332 4] Clock Domain : 00000000 [150h 0336 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [151h 0337 1] Length : 10 [152h 0338 1] Proximity Domain Low(8) : 00 [153h 0339 1] Apic ID : FF [154h 0340 4] Flags (decoded below) : 00000000 Enabled : 0 [158h 0344 1] Local Sapic EID : 00 [159h 0345 3] Proximity Domain High(24) : 000000 [15Ch 0348 4] Clock Domain : 00000000 [160h 0352 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [161h 0353 1] Length : 10 [162h 0354 1] Proximity Domain Low(8) : 00 [163h 0355 1] Apic ID : FF [164h 0356 4] Flags (decoded below) : 00000000 Enabled : 0 [168h 0360 1] Local Sapic EID : 00 [169h 0361 3] Proximity Domain High(24) : 000000 [16Ch 0364 4] Clock Domain : 00000000 [170h 0368 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [171h 0369 1] Length : 10 [172h 0370 1] Proximity Domain Low(8) : 00 [173h 0371 1] Apic ID : FF [174h 0372 4] Flags (decoded below) : 00000000 Enabled : 0 [178h 0376 1] Local Sapic EID : 00 [179h 0377 3] Proximity Domain High(24) : 000000 [17Ch 0380 4] Clock Domain : 00000000 [180h 0384 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [181h 0385 1] Length : 10 [182h 0386 1] Proximity Domain Low(8) : 00 [183h 0387 1] Apic ID : FF [184h 0388 4] Flags (decoded below) : 00000000 Enabled : 0 [188h 0392 1] Local Sapic EID : 00 [189h 0393 3] Proximity Domain High(24) : 000000 [18Ch 0396 4] Clock Domain : 00000000 [190h 0400 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [191h 0401 1] Length : 10 [192h 0402 1] Proximity Domain Low(8) : 00 [193h 0403 1] Apic ID : FF [194h 0404 4] Flags (decoded below) : 00000000 Enabled : 0 [198h 0408 1] Local Sapic EID : 00 [199h 0409 3] Proximity Domain High(24) : 000000 [19Ch 0412 4] Clock Domain : 00000000 [1A0h 0416 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1A1h 0417 1] Length : 10 [1A2h 0418 1] Proximity Domain Low(8) : 00 [1A3h 0419 1] Apic ID : FF [1A4h 0420 4] Flags (decoded below) : 00000000 Enabled : 0 [1A8h 0424 1] Local Sapic EID : 00 [1A9h 0425 3] Proximity Domain High(24) : 000000 [1ACh 0428 4] Clock Domain : 00000000 [1B0h 0432 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1B1h 0433 1] Length : 10 [1B2h 0434 1] Proximity Domain Low(8) : 01 [1B3h 0435 1] Apic ID : FF [1B4h 0436 4] Flags (decoded below) : 00000000 Enabled : 0 [1B8h 0440 1] Local Sapic EID : 00 [1B9h 0441 3] Proximity Domain High(24) : 000000 [1BCh 0444 4] Clock Domain : 00000000 [1C0h 0448 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1C1h 0449 1] Length : 10 [1C2h 0450 1] Proximity Domain Low(8) : 01 [1C3h 0451 1] Apic ID : FF [1C4h 0452 4] Flags (decoded below) : 00000000 Enabled : 0 [1C8h 0456 1] Local Sapic EID : 00 [1C9h 0457 3] Proximity Domain High(24) : 000000 [1CCh 0460 4] Clock Domain : 00000000 [1D0h 0464 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1D1h 0465 1] Length : 10 [1D2h 0466 1] Proximity Domain Low(8) : 01 [1D3h 0467 1] Apic ID : FF [1D4h 0468 4] Flags (decoded below) : 00000000 Enabled : 0 [1D8h 0472 1] Local Sapic EID : 00 [1D9h 0473 3] Proximity Domain High(24) : 000000 [1DCh 0476 4] Clock Domain : 00000000 [1E0h 0480 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1E1h 0481 1] Length : 10 [1E2h 0482 1] Proximity Domain Low(8) : 01 [1E3h 0483 1] Apic ID : FF [1E4h 0484 4] Flags (decoded below) : 00000000 Enabled : 0 [1E8h 0488 1] Local Sapic EID : 00 [1E9h 0489 3] Proximity Domain High(24) : 000000 [1ECh 0492 4] Clock Domain : 00000000 [1F0h 0496 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [1F1h 0497 1] Length : 10 [1F2h 0498 1] Proximity Domain Low(8) : 01 [1F3h 0499 1] Apic ID : FF [1F4h 0500 4] Flags (decoded below) : 00000000 Enabled : 0 [1F8h 0504 1] Local Sapic EID : 00 [1F9h 0505 3] Proximity Domain High(24) : 000000 [1FCh 0508 4] Clock Domain : 00000000 [200h 0512 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [201h 0513 1] Length : 10 [202h 0514 1] Proximity Domain Low(8) : 01 [203h 0515 1] Apic ID : FF [204h 0516 4] Flags (decoded below) : 00000000 Enabled : 0 [208h 0520 1] Local Sapic EID : 00 [209h 0521 3] Proximity Domain High(24) : 000000 [20Ch 0524 4] Clock Domain : 00000000 [210h 0528 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [211h 0529 1] Length : 10 [212h 0530 1] Proximity Domain Low(8) : 01 [213h 0531 1] Apic ID : FF [214h 0532 4] Flags (decoded below) : 00000000 Enabled : 0 [218h 0536 1] Local Sapic EID : 00 [219h 0537 3] Proximity Domain High(24) : 000000 [21Ch 0540 4] Clock Domain : 00000000 [220h 0544 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [221h 0545 1] Length : 10 [222h 0546 1] Proximity Domain Low(8) : 01 [223h 0547 1] Apic ID : FF [224h 0548 4] Flags (decoded below) : 00000000 Enabled : 0 [228h 0552 1] Local Sapic EID : 00 [229h 0553 3] Proximity Domain High(24) : 000000 [22Ch 0556 4] Clock Domain : 00000000 [230h 0560 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [231h 0561 1] Length : 10 [232h 0562 1] Proximity Domain Low(8) : 01 [233h 0563 1] Apic ID : FF [234h 0564 4] Flags (decoded below) : 00000000 Enabled : 0 [238h 0568 1] Local Sapic EID : 00 [239h 0569 3] Proximity Domain High(24) : 000000 [23Ch 0572 4] Clock Domain : 00000000 [240h 0576 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [241h 0577 1] Length : 10 [242h 0578 1] Proximity Domain Low(8) : 01 [243h 0579 1] Apic ID : FF [244h 0580 4] Flags (decoded below) : 00000000 Enabled : 0 [248h 0584 1] Local Sapic EID : 00 [249h 0585 3] Proximity Domain High(24) : 000000 [24Ch 0588 4] Clock Domain : 00000000 [250h 0592 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [251h 0593 1] Length : 10 [252h 0594 1] Proximity Domain Low(8) : 01 [253h 0595 1] Apic ID : FF [254h 0596 4] Flags (decoded below) : 00000000 Enabled : 0 [258h 0600 1] Local Sapic EID : 00 [259h 0601 3] Proximity Domain High(24) : 000000 [25Ch 0604 4] Clock Domain : 00000000 [260h 0608 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [261h 0609 1] Length : 10 [262h 0610 1] Proximity Domain Low(8) : 01 [263h 0611 1] Apic ID : FF [264h 0612 4] Flags (decoded below) : 00000000 Enabled : 0 [268h 0616 1] Local Sapic EID : 00 [269h 0617 3] Proximity Domain High(24) : 000000 [26Ch 0620 4] Clock Domain : 00000000 [270h 0624 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [271h 0625 1] Length : 10 [272h 0626 1] Proximity Domain Low(8) : 01 [273h 0627 1] Apic ID : FF [274h 0628 4] Flags (decoded below) : 00000000 Enabled : 0 [278h 0632 1] Local Sapic EID : 00 [279h 0633 3] Proximity Domain High(24) : 000000 [27Ch 0636 4] Clock Domain : 00000000 [280h 0640 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [281h 0641 1] Length : 10 [282h 0642 1] Proximity Domain Low(8) : 01 [283h 0643 1] Apic ID : FF [284h 0644 4] Flags (decoded below) : 00000000 Enabled : 0 [288h 0648 1] Local Sapic EID : 00 [289h 0649 3] Proximity Domain High(24) : 000000 [28Ch 0652 4] Clock Domain : 00000000 [290h 0656 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [291h 0657 1] Length : 10 [292h 0658 1] Proximity Domain Low(8) : 01 [293h 0659 1] Apic ID : FF [294h 0660 4] Flags (decoded below) : 00000000 Enabled : 0 [298h 0664 1] Local Sapic EID : 00 [299h 0665 3] Proximity Domain High(24) : 000000 [29Ch 0668 4] Clock Domain : 00000000 [2A0h 0672 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2A1h 0673 1] Length : 10 [2A2h 0674 1] Proximity Domain Low(8) : 01 [2A3h 0675 1] Apic ID : FF [2A4h 0676 4] Flags (decoded below) : 00000000 Enabled : 0 [2A8h 0680 1] Local Sapic EID : 00 [2A9h 0681 3] Proximity Domain High(24) : 000000 [2ACh 0684 4] Clock Domain : 00000000 [2B0h 0688 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2B1h 0689 1] Length : 10 [2B2h 0690 1] Proximity Domain Low(8) : 01 [2B3h 0691 1] Apic ID : FF [2B4h 0692 4] Flags (decoded below) : 00000000 Enabled : 0 [2B8h 0696 1] Local Sapic EID : 00 [2B9h 0697 3] Proximity Domain High(24) : 000000 [2BCh 0700 4] Clock Domain : 00000000 [2C0h 0704 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2C1h 0705 1] Length : 10 [2C2h 0706 1] Proximity Domain Low(8) : 01 [2C3h 0707 1] Apic ID : FF [2C4h 0708 4] Flags (decoded below) : 00000000 Enabled : 0 [2C8h 0712 1] Local Sapic EID : 00 [2C9h 0713 3] Proximity Domain High(24) : 000000 [2CCh 0716 4] Clock Domain : 00000000 [2D0h 0720 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2D1h 0721 1] Length : 10 [2D2h 0722 1] Proximity Domain Low(8) : 01 [2D3h 0723 1] Apic ID : FF [2D4h 0724 4] Flags (decoded below) : 00000000 Enabled : 0 [2D8h 0728 1] Local Sapic EID : 00 [2D9h 0729 3] Proximity Domain High(24) : 000000 [2DCh 0732 4] Clock Domain : 00000000 [2E0h 0736 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2E1h 0737 1] Length : 10 [2E2h 0738 1] Proximity Domain Low(8) : 01 [2E3h 0739 1] Apic ID : FF [2E4h 0740 4] Flags (decoded below) : 00000000 Enabled : 0 [2E8h 0744 1] Local Sapic EID : 00 [2E9h 0745 3] Proximity Domain High(24) : 000000 [2ECh 0748 4] Clock Domain : 00000000 [2F0h 0752 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [2F1h 0753 1] Length : 10 [2F2h 0754 1] Proximity Domain Low(8) : 01 [2F3h 0755 1] Apic ID : FF [2F4h 0756 4] Flags (decoded below) : 00000000 Enabled : 0 [2F8h 0760 1] Local Sapic EID : 00 [2F9h 0761 3] Proximity Domain High(24) : 000000 [2FCh 0764 4] Clock Domain : 00000000 [300h 0768 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [301h 0769 1] Length : 10 [302h 0770 1] Proximity Domain Low(8) : 01 [303h 0771 1] Apic ID : FF [304h 0772 4] Flags (decoded below) : 00000000 Enabled : 0 [308h 0776 1] Local Sapic EID : 00 [309h 0777 3] Proximity Domain High(24) : 000000 [30Ch 0780 4] Clock Domain : 00000000 [310h 0784 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [311h 0785 1] Length : 10 [312h 0786 1] Proximity Domain Low(8) : 01 [313h 0787 1] Apic ID : FF [314h 0788 4] Flags (decoded below) : 00000000 Enabled : 0 [318h 0792 1] Local Sapic EID : 00 [319h 0793 3] Proximity Domain High(24) : 000000 [31Ch 0796 4] Clock Domain : 00000000 [320h 0800 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [321h 0801 1] Length : 10 [322h 0802 1] Proximity Domain Low(8) : 01 [323h 0803 1] Apic ID : FF [324h 0804 4] Flags (decoded below) : 00000000 Enabled : 0 [328h 0808 1] Local Sapic EID : 00 [329h 0809 3] Proximity Domain High(24) : 000000 [32Ch 0812 4] Clock Domain : 00000000 [330h 0816 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [331h 0817 1] Length : 10 [332h 0818 1] Proximity Domain Low(8) : 02 [333h 0819 1] Apic ID : FF [334h 0820 4] Flags (decoded below) : 00000000 Enabled : 0 [338h 0824 1] Local Sapic EID : 00 [339h 0825 3] Proximity Domain High(24) : 000000 [33Ch 0828 4] Clock Domain : 00000000 [340h 0832 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [341h 0833 1] Length : 10 [342h 0834 1] Proximity Domain Low(8) : 02 [343h 0835 1] Apic ID : FF [344h 0836 4] Flags (decoded below) : 00000000 Enabled : 0 [348h 0840 1] Local Sapic EID : 00 [349h 0841 3] Proximity Domain High(24) : 000000 [34Ch 0844 4] Clock Domain : 00000000 [350h 0848 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [351h 0849 1] Length : 10 [352h 0850 1] Proximity Domain Low(8) : 02 [353h 0851 1] Apic ID : FF [354h 0852 4] Flags (decoded below) : 00000000 Enabled : 0 [358h 0856 1] Local Sapic EID : 00 [359h 0857 3] Proximity Domain High(24) : 000000 [35Ch 0860 4] Clock Domain : 00000000 [360h 0864 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [361h 0865 1] Length : 10 [362h 0866 1] Proximity Domain Low(8) : 02 [363h 0867 1] Apic ID : FF [364h 0868 4] Flags (decoded below) : 00000000 Enabled : 0 [368h 0872 1] Local Sapic EID : 00 [369h 0873 3] Proximity Domain High(24) : 000000 [36Ch 0876 4] Clock Domain : 00000000 [370h 0880 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [371h 0881 1] Length : 10 [372h 0882 1] Proximity Domain Low(8) : 02 [373h 0883 1] Apic ID : FF [374h 0884 4] Flags (decoded below) : 00000000 Enabled : 0 [378h 0888 1] Local Sapic EID : 00 [379h 0889 3] Proximity Domain High(24) : 000000 [37Ch 0892 4] Clock Domain : 00000000 [380h 0896 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [381h 0897 1] Length : 10 [382h 0898 1] Proximity Domain Low(8) : 02 [383h 0899 1] Apic ID : FF [384h 0900 4] Flags (decoded below) : 00000000 Enabled : 0 [388h 0904 1] Local Sapic EID : 00 [389h 0905 3] Proximity Domain High(24) : 000000 [38Ch 0908 4] Clock Domain : 00000000 [390h 0912 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [391h 0913 1] Length : 10 [392h 0914 1] Proximity Domain Low(8) : 02 [393h 0915 1] Apic ID : FF [394h 0916 4] Flags (decoded below) : 00000000 Enabled : 0 [398h 0920 1] Local Sapic EID : 00 [399h 0921 3] Proximity Domain High(24) : 000000 [39Ch 0924 4] Clock Domain : 00000000 [3A0h 0928 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3A1h 0929 1] Length : 10 [3A2h 0930 1] Proximity Domain Low(8) : 02 [3A3h 0931 1] Apic ID : FF [3A4h 0932 4] Flags (decoded below) : 00000000 Enabled : 0 [3A8h 0936 1] Local Sapic EID : 00 [3A9h 0937 3] Proximity Domain High(24) : 000000 [3ACh 0940 4] Clock Domain : 00000000 [3B0h 0944 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3B1h 0945 1] Length : 10 [3B2h 0946 1] Proximity Domain Low(8) : 02 [3B3h 0947 1] Apic ID : FF [3B4h 0948 4] Flags (decoded below) : 00000000 Enabled : 0 [3B8h 0952 1] Local Sapic EID : 00 [3B9h 0953 3] Proximity Domain High(24) : 000000 [3BCh 0956 4] Clock Domain : 00000000 [3C0h 0960 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3C1h 0961 1] Length : 10 [3C2h 0962 1] Proximity Domain Low(8) : 02 [3C3h 0963 1] Apic ID : FF [3C4h 0964 4] Flags (decoded below) : 00000000 Enabled : 0 [3C8h 0968 1] Local Sapic EID : 00 [3C9h 0969 3] Proximity Domain High(24) : 000000 [3CCh 0972 4] Clock Domain : 00000000 [3D0h 0976 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3D1h 0977 1] Length : 10 [3D2h 0978 1] Proximity Domain Low(8) : 02 [3D3h 0979 1] Apic ID : FF [3D4h 0980 4] Flags (decoded below) : 00000000 Enabled : 0 [3D8h 0984 1] Local Sapic EID : 00 [3D9h 0985 3] Proximity Domain High(24) : 000000 [3DCh 0988 4] Clock Domain : 00000000 [3E0h 0992 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3E1h 0993 1] Length : 10 [3E2h 0994 1] Proximity Domain Low(8) : 02 [3E3h 0995 1] Apic ID : FF [3E4h 0996 4] Flags (decoded below) : 00000000 Enabled : 0 [3E8h 1000 1] Local Sapic EID : 00 [3E9h 1001 3] Proximity Domain High(24) : 000000 [3ECh 1004 4] Clock Domain : 00000000 [3F0h 1008 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [3F1h 1009 1] Length : 10 [3F2h 1010 1] Proximity Domain Low(8) : 02 [3F3h 1011 1] Apic ID : FF [3F4h 1012 4] Flags (decoded below) : 00000000 Enabled : 0 [3F8h 1016 1] Local Sapic EID : 00 [3F9h 1017 3] Proximity Domain High(24) : 000000 [3FCh 1020 4] Clock Domain : 00000000 [400h 1024 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [401h 1025 1] Length : 10 [402h 1026 1] Proximity Domain Low(8) : 02 [403h 1027 1] Apic ID : FF [404h 1028 4] Flags (decoded below) : 00000000 Enabled : 0 [408h 1032 1] Local Sapic EID : 00 [409h 1033 3] Proximity Domain High(24) : 000000 [40Ch 1036 4] Clock Domain : 00000000 [410h 1040 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [411h 1041 1] Length : 10 [412h 1042 1] Proximity Domain Low(8) : 02 [413h 1043 1] Apic ID : FF [414h 1044 4] Flags (decoded below) : 00000000 Enabled : 0 [418h 1048 1] Local Sapic EID : 00 [419h 1049 3] Proximity Domain High(24) : 000000 [41Ch 1052 4] Clock Domain : 00000000 [420h 1056 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [421h 1057 1] Length : 10 [422h 1058 1] Proximity Domain Low(8) : 02 [423h 1059 1] Apic ID : FF [424h 1060 4] Flags (decoded below) : 00000000 Enabled : 0 [428h 1064 1] Local Sapic EID : 00 [429h 1065 3] Proximity Domain High(24) : 000000 [42Ch 1068 4] Clock Domain : 00000000 [430h 1072 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [431h 1073 1] Length : 10 [432h 1074 1] Proximity Domain Low(8) : 02 [433h 1075 1] Apic ID : FF [434h 1076 4] Flags (decoded below) : 00000000 Enabled : 0 [438h 1080 1] Local Sapic EID : 00 [439h 1081 3] Proximity Domain High(24) : 000000 [43Ch 1084 4] Clock Domain : 00000000 [440h 1088 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [441h 1089 1] Length : 10 [442h 1090 1] Proximity Domain Low(8) : 02 [443h 1091 1] Apic ID : FF [444h 1092 4] Flags (decoded below) : 00000000 Enabled : 0 [448h 1096 1] Local Sapic EID : 00 [449h 1097 3] Proximity Domain High(24) : 000000 [44Ch 1100 4] Clock Domain : 00000000 [450h 1104 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [451h 1105 1] Length : 10 [452h 1106 1] Proximity Domain Low(8) : 02 [453h 1107 1] Apic ID : FF [454h 1108 4] Flags (decoded below) : 00000000 Enabled : 0 [458h 1112 1] Local Sapic EID : 00 [459h 1113 3] Proximity Domain High(24) : 000000 [45Ch 1116 4] Clock Domain : 00000000 [460h 1120 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [461h 1121 1] Length : 10 [462h 1122 1] Proximity Domain Low(8) : 02 [463h 1123 1] Apic ID : FF [464h 1124 4] Flags (decoded below) : 00000000 Enabled : 0 [468h 1128 1] Local Sapic EID : 00 [469h 1129 3] Proximity Domain High(24) : 000000 [46Ch 1132 4] Clock Domain : 00000000 [470h 1136 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [471h 1137 1] Length : 10 [472h 1138 1] Proximity Domain Low(8) : 02 [473h 1139 1] Apic ID : FF [474h 1140 4] Flags (decoded below) : 00000000 Enabled : 0 [478h 1144 1] Local Sapic EID : 00 [479h 1145 3] Proximity Domain High(24) : 000000 [47Ch 1148 4] Clock Domain : 00000000 [480h 1152 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [481h 1153 1] Length : 10 [482h 1154 1] Proximity Domain Low(8) : 02 [483h 1155 1] Apic ID : FF [484h 1156 4] Flags (decoded below) : 00000000 Enabled : 0 [488h 1160 1] Local Sapic EID : 00 [489h 1161 3] Proximity Domain High(24) : 000000 [48Ch 1164 4] Clock Domain : 00000000 [490h 1168 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [491h 1169 1] Length : 10 [492h 1170 1] Proximity Domain Low(8) : 02 [493h 1171 1] Apic ID : FF [494h 1172 4] Flags (decoded below) : 00000000 Enabled : 0 [498h 1176 1] Local Sapic EID : 00 [499h 1177 3] Proximity Domain High(24) : 000000 [49Ch 1180 4] Clock Domain : 00000000 [4A0h 1184 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4A1h 1185 1] Length : 10 [4A2h 1186 1] Proximity Domain Low(8) : 02 [4A3h 1187 1] Apic ID : FF [4A4h 1188 4] Flags (decoded below) : 00000000 Enabled : 0 [4A8h 1192 1] Local Sapic EID : 00 [4A9h 1193 3] Proximity Domain High(24) : 000000 [4ACh 1196 4] Clock Domain : 00000000 [4B0h 1200 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4B1h 1201 1] Length : 10 [4B2h 1202 1] Proximity Domain Low(8) : 03 [4B3h 1203 1] Apic ID : FF [4B4h 1204 4] Flags (decoded below) : 00000000 Enabled : 0 [4B8h 1208 1] Local Sapic EID : 00 [4B9h 1209 3] Proximity Domain High(24) : 000000 [4BCh 1212 4] Clock Domain : 00000000 [4C0h 1216 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4C1h 1217 1] Length : 10 [4C2h 1218 1] Proximity Domain Low(8) : 03 [4C3h 1219 1] Apic ID : FF [4C4h 1220 4] Flags (decoded below) : 00000000 Enabled : 0 [4C8h 1224 1] Local Sapic EID : 00 [4C9h 1225 3] Proximity Domain High(24) : 000000 [4CCh 1228 4] Clock Domain : 00000000 [4D0h 1232 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4D1h 1233 1] Length : 10 [4D2h 1234 1] Proximity Domain Low(8) : 03 [4D3h 1235 1] Apic ID : FF [4D4h 1236 4] Flags (decoded below) : 00000000 Enabled : 0 [4D8h 1240 1] Local Sapic EID : 00 [4D9h 1241 3] Proximity Domain High(24) : 000000 [4DCh 1244 4] Clock Domain : 00000000 [4E0h 1248 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4E1h 1249 1] Length : 10 [4E2h 1250 1] Proximity Domain Low(8) : 03 [4E3h 1251 1] Apic ID : FF [4E4h 1252 4] Flags (decoded below) : 00000000 Enabled : 0 [4E8h 1256 1] Local Sapic EID : 00 [4E9h 1257 3] Proximity Domain High(24) : 000000 [4ECh 1260 4] Clock Domain : 00000000 [4F0h 1264 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [4F1h 1265 1] Length : 10 [4F2h 1266 1] Proximity Domain Low(8) : 03 [4F3h 1267 1] Apic ID : FF [4F4h 1268 4] Flags (decoded below) : 00000000 Enabled : 0 [4F8h 1272 1] Local Sapic EID : 00 [4F9h 1273 3] Proximity Domain High(24) : 000000 [4FCh 1276 4] Clock Domain : 00000000 [500h 1280 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [501h 1281 1] Length : 10 [502h 1282 1] Proximity Domain Low(8) : 03 [503h 1283 1] Apic ID : FF [504h 1284 4] Flags (decoded below) : 00000000 Enabled : 0 [508h 1288 1] Local Sapic EID : 00 [509h 1289 3] Proximity Domain High(24) : 000000 [50Ch 1292 4] Clock Domain : 00000000 [510h 1296 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [511h 1297 1] Length : 10 [512h 1298 1] Proximity Domain Low(8) : 03 [513h 1299 1] Apic ID : FF [514h 1300 4] Flags (decoded below) : 00000000 Enabled : 0 [518h 1304 1] Local Sapic EID : 00 [519h 1305 3] Proximity Domain High(24) : 000000 [51Ch 1308 4] Clock Domain : 00000000 [520h 1312 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [521h 1313 1] Length : 10 [522h 1314 1] Proximity Domain Low(8) : 03 [523h 1315 1] Apic ID : FF [524h 1316 4] Flags (decoded below) : 00000000 Enabled : 0 [528h 1320 1] Local Sapic EID : 00 [529h 1321 3] Proximity Domain High(24) : 000000 [52Ch 1324 4] Clock Domain : 00000000 [530h 1328 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [531h 1329 1] Length : 10 [532h 1330 1] Proximity Domain Low(8) : 03 [533h 1331 1] Apic ID : FF [534h 1332 4] Flags (decoded below) : 00000000 Enabled : 0 [538h 1336 1] Local Sapic EID : 00 [539h 1337 3] Proximity Domain High(24) : 000000 [53Ch 1340 4] Clock Domain : 00000000 [540h 1344 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [541h 1345 1] Length : 10 [542h 1346 1] Proximity Domain Low(8) : 03 [543h 1347 1] Apic ID : FF [544h 1348 4] Flags (decoded below) : 00000000 Enabled : 0 [548h 1352 1] Local Sapic EID : 00 [549h 1353 3] Proximity Domain High(24) : 000000 [54Ch 1356 4] Clock Domain : 00000000 [550h 1360 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [551h 1361 1] Length : 10 [552h 1362 1] Proximity Domain Low(8) : 03 [553h 1363 1] Apic ID : FF [554h 1364 4] Flags (decoded below) : 00000000 Enabled : 0 [558h 1368 1] Local Sapic EID : 00 [559h 1369 3] Proximity Domain High(24) : 000000 [55Ch 1372 4] Clock Domain : 00000000 [560h 1376 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [561h 1377 1] Length : 10 [562h 1378 1] Proximity Domain Low(8) : 03 [563h 1379 1] Apic ID : FF [564h 1380 4] Flags (decoded below) : 00000000 Enabled : 0 [568h 1384 1] Local Sapic EID : 00 [569h 1385 3] Proximity Domain High(24) : 000000 [56Ch 1388 4] Clock Domain : 00000000 [570h 1392 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [571h 1393 1] Length : 10 [572h 1394 1] Proximity Domain Low(8) : 03 [573h 1395 1] Apic ID : FF [574h 1396 4] Flags (decoded below) : 00000000 Enabled : 0 [578h 1400 1] Local Sapic EID : 00 [579h 1401 3] Proximity Domain High(24) : 000000 [57Ch 1404 4] Clock Domain : 00000000 [580h 1408 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [581h 1409 1] Length : 10 [582h 1410 1] Proximity Domain Low(8) : 03 [583h 1411 1] Apic ID : FF [584h 1412 4] Flags (decoded below) : 00000000 Enabled : 0 [588h 1416 1] Local Sapic EID : 00 [589h 1417 3] Proximity Domain High(24) : 000000 [58Ch 1420 4] Clock Domain : 00000000 [590h 1424 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [591h 1425 1] Length : 10 [592h 1426 1] Proximity Domain Low(8) : 03 [593h 1427 1] Apic ID : FF [594h 1428 4] Flags (decoded below) : 00000000 Enabled : 0 [598h 1432 1] Local Sapic EID : 00 [599h 1433 3] Proximity Domain High(24) : 000000 [59Ch 1436 4] Clock Domain : 00000000 [5A0h 1440 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5A1h 1441 1] Length : 10 [5A2h 1442 1] Proximity Domain Low(8) : 03 [5A3h 1443 1] Apic ID : FF [5A4h 1444 4] Flags (decoded below) : 00000000 Enabled : 0 [5A8h 1448 1] Local Sapic EID : 00 [5A9h 1449 3] Proximity Domain High(24) : 000000 [5ACh 1452 4] Clock Domain : 00000000 [5B0h 1456 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5B1h 1457 1] Length : 10 [5B2h 1458 1] Proximity Domain Low(8) : 03 [5B3h 1459 1] Apic ID : FF [5B4h 1460 4] Flags (decoded below) : 00000000 Enabled : 0 [5B8h 1464 1] Local Sapic EID : 00 [5B9h 1465 3] Proximity Domain High(24) : 000000 [5BCh 1468 4] Clock Domain : 00000000 [5C0h 1472 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5C1h 1473 1] Length : 10 [5C2h 1474 1] Proximity Domain Low(8) : 03 [5C3h 1475 1] Apic ID : FF [5C4h 1476 4] Flags (decoded below) : 00000000 Enabled : 0 [5C8h 1480 1] Local Sapic EID : 00 [5C9h 1481 3] Proximity Domain High(24) : 000000 [5CCh 1484 4] Clock Domain : 00000000 [5D0h 1488 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5D1h 1489 1] Length : 10 [5D2h 1490 1] Proximity Domain Low(8) : 03 [5D3h 1491 1] Apic ID : FF [5D4h 1492 4] Flags (decoded below) : 00000000 Enabled : 0 [5D8h 1496 1] Local Sapic EID : 00 [5D9h 1497 3] Proximity Domain High(24) : 000000 [5DCh 1500 4] Clock Domain : 00000000 [5E0h 1504 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5E1h 1505 1] Length : 10 [5E2h 1506 1] Proximity Domain Low(8) : 03 [5E3h 1507 1] Apic ID : FF [5E4h 1508 4] Flags (decoded below) : 00000000 Enabled : 0 [5E8h 1512 1] Local Sapic EID : 00 [5E9h 1513 3] Proximity Domain High(24) : 000000 [5ECh 1516 4] Clock Domain : 00000000 [5F0h 1520 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [5F1h 1521 1] Length : 10 [5F2h 1522 1] Proximity Domain Low(8) : 03 [5F3h 1523 1] Apic ID : FF [5F4h 1524 4] Flags (decoded below) : 00000000 Enabled : 0 [5F8h 1528 1] Local Sapic EID : 00 [5F9h 1529 3] Proximity Domain High(24) : 000000 [5FCh 1532 4] Clock Domain : 00000000 [600h 1536 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [601h 1537 1] Length : 10 [602h 1538 1] Proximity Domain Low(8) : 03 [603h 1539 1] Apic ID : FF [604h 1540 4] Flags (decoded below) : 00000000 Enabled : 0 [608h 1544 1] Local Sapic EID : 00 [609h 1545 3] Proximity Domain High(24) : 000000 [60Ch 1548 4] Clock Domain : 00000000 [610h 1552 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [611h 1553 1] Length : 10 [612h 1554 1] Proximity Domain Low(8) : 03 [613h 1555 1] Apic ID : FF [614h 1556 4] Flags (decoded below) : 00000000 Enabled : 0 [618h 1560 1] Local Sapic EID : 00 [619h 1561 3] Proximity Domain High(24) : 000000 [61Ch 1564 4] Clock Domain : 00000000 [620h 1568 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [621h 1569 1] Length : 10 [622h 1570 1] Proximity Domain Low(8) : 03 [623h 1571 1] Apic ID : FF [624h 1572 4] Flags (decoded below) : 00000000 Enabled : 0 [628h 1576 1] Local Sapic EID : 00 [629h 1577 3] Proximity Domain High(24) : 000000 [62Ch 1580 4] Clock Domain : 00000000 [630h 1584 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [631h 1585 1] Length : 10 [632h 1586 1] Proximity Domain Low(8) : 00 [633h 1587 1] Apic ID : FF [634h 1588 4] Flags (decoded below) : 00000000 Enabled : 0 [638h 1592 1] Local Sapic EID : 00 [639h 1593 3] Proximity Domain High(24) : 000000 [63Ch 1596 4] Clock Domain : 00000000 [640h 1600 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [641h 1601 1] Length : 10 [642h 1602 1] Proximity Domain Low(8) : 00 [643h 1603 1] Apic ID : FF [644h 1604 4] Flags (decoded below) : 00000000 Enabled : 0 [648h 1608 1] Local Sapic EID : 00 [649h 1609 3] Proximity Domain High(24) : 000000 [64Ch 1612 4] Clock Domain : 00000000 [650h 1616 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [651h 1617 1] Length : 10 [652h 1618 1] Proximity Domain Low(8) : 00 [653h 1619 1] Apic ID : FF [654h 1620 4] Flags (decoded below) : 00000000 Enabled : 0 [658h 1624 1] Local Sapic EID : 00 [659h 1625 3] Proximity Domain High(24) : 000000 [65Ch 1628 4] Clock Domain : 00000000 [660h 1632 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [661h 1633 1] Length : 10 [662h 1634 1] Proximity Domain Low(8) : 00 [663h 1635 1] Apic ID : FF [664h 1636 4] Flags (decoded below) : 00000000 Enabled : 0 [668h 1640 1] Local Sapic EID : 00 [669h 1641 3] Proximity Domain High(24) : 000000 [66Ch 1644 4] Clock Domain : 00000000 [670h 1648 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [671h 1649 1] Length : 10 [672h 1650 1] Proximity Domain Low(8) : 00 [673h 1651 1] Apic ID : FF [674h 1652 4] Flags (decoded below) : 00000000 Enabled : 0 [678h 1656 1] Local Sapic EID : 00 [679h 1657 3] Proximity Domain High(24) : 000000 [67Ch 1660 4] Clock Domain : 00000000 [680h 1664 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [681h 1665 1] Length : 10 [682h 1666 1] Proximity Domain Low(8) : 00 [683h 1667 1] Apic ID : FF [684h 1668 4] Flags (decoded below) : 00000000 Enabled : 0 [688h 1672 1] Local Sapic EID : 00 [689h 1673 3] Proximity Domain High(24) : 000000 [68Ch 1676 4] Clock Domain : 00000000 [690h 1680 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [691h 1681 1] Length : 10 [692h 1682 1] Proximity Domain Low(8) : 00 [693h 1683 1] Apic ID : FF [694h 1684 4] Flags (decoded below) : 00000000 Enabled : 0 [698h 1688 1] Local Sapic EID : 00 [699h 1689 3] Proximity Domain High(24) : 000000 [69Ch 1692 4] Clock Domain : 00000000 [6A0h 1696 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6A1h 1697 1] Length : 10 [6A2h 1698 1] Proximity Domain Low(8) : 00 [6A3h 1699 1] Apic ID : FF [6A4h 1700 4] Flags (decoded below) : 00000000 Enabled : 0 [6A8h 1704 1] Local Sapic EID : 00 [6A9h 1705 3] Proximity Domain High(24) : 000000 [6ACh 1708 4] Clock Domain : 00000000 [6B0h 1712 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6B1h 1713 1] Length : 10 [6B2h 1714 1] Proximity Domain Low(8) : 00 [6B3h 1715 1] Apic ID : FF [6B4h 1716 4] Flags (decoded below) : 00000000 Enabled : 0 [6B8h 1720 1] Local Sapic EID : 00 [6B9h 1721 3] Proximity Domain High(24) : 000000 [6BCh 1724 4] Clock Domain : 00000000 [6C0h 1728 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6C1h 1729 1] Length : 10 [6C2h 1730 1] Proximity Domain Low(8) : 00 [6C3h 1731 1] Apic ID : FF [6C4h 1732 4] Flags (decoded below) : 00000000 Enabled : 0 [6C8h 1736 1] Local Sapic EID : 00 [6C9h 1737 3] Proximity Domain High(24) : 000000 [6CCh 1740 4] Clock Domain : 00000000 [6D0h 1744 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6D1h 1745 1] Length : 10 [6D2h 1746 1] Proximity Domain Low(8) : 00 [6D3h 1747 1] Apic ID : FF [6D4h 1748 4] Flags (decoded below) : 00000000 Enabled : 0 [6D8h 1752 1] Local Sapic EID : 00 [6D9h 1753 3] Proximity Domain High(24) : 000000 [6DCh 1756 4] Clock Domain : 00000000 [6E0h 1760 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6E1h 1761 1] Length : 10 [6E2h 1762 1] Proximity Domain Low(8) : 00 [6E3h 1763 1] Apic ID : FF [6E4h 1764 4] Flags (decoded below) : 00000000 Enabled : 0 [6E8h 1768 1] Local Sapic EID : 00 [6E9h 1769 3] Proximity Domain High(24) : 000000 [6ECh 1772 4] Clock Domain : 00000000 [6F0h 1776 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [6F1h 1777 1] Length : 10 [6F2h 1778 1] Proximity Domain Low(8) : 00 [6F3h 1779 1] Apic ID : FF [6F4h 1780 4] Flags (decoded below) : 00000000 Enabled : 0 [6F8h 1784 1] Local Sapic EID : 00 [6F9h 1785 3] Proximity Domain High(24) : 000000 [6FCh 1788 4] Clock Domain : 00000000 [700h 1792 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [701h 1793 1] Length : 10 [702h 1794 1] Proximity Domain Low(8) : 00 [703h 1795 1] Apic ID : FF [704h 1796 4] Flags (decoded below) : 00000000 Enabled : 0 [708h 1800 1] Local Sapic EID : 00 [709h 1801 3] Proximity Domain High(24) : 000000 [70Ch 1804 4] Clock Domain : 00000000 [710h 1808 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [711h 1809 1] Length : 10 [712h 1810 1] Proximity Domain Low(8) : 00 [713h 1811 1] Apic ID : FF [714h 1812 4] Flags (decoded below) : 00000000 Enabled : 0 [718h 1816 1] Local Sapic EID : 00 [719h 1817 3] Proximity Domain High(24) : 000000 [71Ch 1820 4] Clock Domain : 00000000 [720h 1824 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [721h 1825 1] Length : 10 [722h 1826 1] Proximity Domain Low(8) : 00 [723h 1827 1] Apic ID : FF [724h 1828 4] Flags (decoded below) : 00000000 Enabled : 0 [728h 1832 1] Local Sapic EID : 00 [729h 1833 3] Proximity Domain High(24) : 000000 [72Ch 1836 4] Clock Domain : 00000000 [730h 1840 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [731h 1841 1] Length : 10 [732h 1842 1] Proximity Domain Low(8) : 00 [733h 1843 1] Apic ID : FF [734h 1844 4] Flags (decoded below) : 00000000 Enabled : 0 [738h 1848 1] Local Sapic EID : 00 [739h 1849 3] Proximity Domain High(24) : 000000 [73Ch 1852 4] Clock Domain : 00000000 [740h 1856 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [741h 1857 1] Length : 10 [742h 1858 1] Proximity Domain Low(8) : 00 [743h 1859 1] Apic ID : FF [744h 1860 4] Flags (decoded below) : 00000000 Enabled : 0 [748h 1864 1] Local Sapic EID : 00 [749h 1865 3] Proximity Domain High(24) : 000000 [74Ch 1868 4] Clock Domain : 00000000 [750h 1872 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [751h 1873 1] Length : 10 [752h 1874 1] Proximity Domain Low(8) : 00 [753h 1875 1] Apic ID : FF [754h 1876 4] Flags (decoded below) : 00000000 Enabled : 0 [758h 1880 1] Local Sapic EID : 00 [759h 1881 3] Proximity Domain High(24) : 000000 [75Ch 1884 4] Clock Domain : 00000000 [760h 1888 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [761h 1889 1] Length : 10 [762h 1890 1] Proximity Domain Low(8) : 00 [763h 1891 1] Apic ID : FF [764h 1892 4] Flags (decoded below) : 00000000 Enabled : 0 [768h 1896 1] Local Sapic EID : 00 [769h 1897 3] Proximity Domain High(24) : 000000 [76Ch 1900 4] Clock Domain : 00000000 [770h 1904 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [771h 1905 1] Length : 10 [772h 1906 1] Proximity Domain Low(8) : 00 [773h 1907 1] Apic ID : FF [774h 1908 4] Flags (decoded below) : 00000000 Enabled : 0 [778h 1912 1] Local Sapic EID : 00 [779h 1913 3] Proximity Domain High(24) : 000000 [77Ch 1916 4] Clock Domain : 00000000 [780h 1920 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [781h 1921 1] Length : 10 [782h 1922 1] Proximity Domain Low(8) : 00 [783h 1923 1] Apic ID : FF [784h 1924 4] Flags (decoded below) : 00000000 Enabled : 0 [788h 1928 1] Local Sapic EID : 00 [789h 1929 3] Proximity Domain High(24) : 000000 [78Ch 1932 4] Clock Domain : 00000000 [790h 1936 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [791h 1937 1] Length : 10 [792h 1938 1] Proximity Domain Low(8) : 00 [793h 1939 1] Apic ID : FF [794h 1940 4] Flags (decoded below) : 00000000 Enabled : 0 [798h 1944 1] Local Sapic EID : 00 [799h 1945 3] Proximity Domain High(24) : 000000 [79Ch 1948 4] Clock Domain : 00000000 [7A0h 1952 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7A1h 1953 1] Length : 10 [7A2h 1954 1] Proximity Domain Low(8) : 00 [7A3h 1955 1] Apic ID : FF [7A4h 1956 4] Flags (decoded below) : 00000000 Enabled : 0 [7A8h 1960 1] Local Sapic EID : 00 [7A9h 1961 3] Proximity Domain High(24) : 000000 [7ACh 1964 4] Clock Domain : 00000000 [7B0h 1968 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7B1h 1969 1] Length : 10 [7B2h 1970 1] Proximity Domain Low(8) : 01 [7B3h 1971 1] Apic ID : FF [7B4h 1972 4] Flags (decoded below) : 00000000 Enabled : 0 [7B8h 1976 1] Local Sapic EID : 00 [7B9h 1977 3] Proximity Domain High(24) : 000000 [7BCh 1980 4] Clock Domain : 00000000 [7C0h 1984 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7C1h 1985 1] Length : 10 [7C2h 1986 1] Proximity Domain Low(8) : 01 [7C3h 1987 1] Apic ID : FF [7C4h 1988 4] Flags (decoded below) : 00000000 Enabled : 0 [7C8h 1992 1] Local Sapic EID : 00 [7C9h 1993 3] Proximity Domain High(24) : 000000 [7CCh 1996 4] Clock Domain : 00000000 [7D0h 2000 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7D1h 2001 1] Length : 10 [7D2h 2002 1] Proximity Domain Low(8) : 01 [7D3h 2003 1] Apic ID : FF [7D4h 2004 4] Flags (decoded below) : 00000000 Enabled : 0 [7D8h 2008 1] Local Sapic EID : 00 [7D9h 2009 3] Proximity Domain High(24) : 000000 [7DCh 2012 4] Clock Domain : 00000000 [7E0h 2016 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7E1h 2017 1] Length : 10 [7E2h 2018 1] Proximity Domain Low(8) : 01 [7E3h 2019 1] Apic ID : FF [7E4h 2020 4] Flags (decoded below) : 00000000 Enabled : 0 [7E8h 2024 1] Local Sapic EID : 00 [7E9h 2025 3] Proximity Domain High(24) : 000000 [7ECh 2028 4] Clock Domain : 00000000 [7F0h 2032 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [7F1h 2033 1] Length : 10 [7F2h 2034 1] Proximity Domain Low(8) : 01 [7F3h 2035 1] Apic ID : FF [7F4h 2036 4] Flags (decoded below) : 00000000 Enabled : 0 [7F8h 2040 1] Local Sapic EID : 00 [7F9h 2041 3] Proximity Domain High(24) : 000000 [7FCh 2044 4] Clock Domain : 00000000 [800h 2048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [801h 2049 1] Length : 10 [802h 2050 1] Proximity Domain Low(8) : 01 [803h 2051 1] Apic ID : FF [804h 2052 4] Flags (decoded below) : 00000000 Enabled : 0 [808h 2056 1] Local Sapic EID : 00 [809h 2057 3] Proximity Domain High(24) : 000000 [80Ch 2060 4] Clock Domain : 00000000 [810h 2064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [811h 2065 1] Length : 10 [812h 2066 1] Proximity Domain Low(8) : 01 [813h 2067 1] Apic ID : FF [814h 2068 4] Flags (decoded below) : 00000000 Enabled : 0 [818h 2072 1] Local Sapic EID : 00 [819h 2073 3] Proximity Domain High(24) : 000000 [81Ch 2076 4] Clock Domain : 00000000 [820h 2080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [821h 2081 1] Length : 10 [822h 2082 1] Proximity Domain Low(8) : 01 [823h 2083 1] Apic ID : FF [824h 2084 4] Flags (decoded below) : 00000000 Enabled : 0 [828h 2088 1] Local Sapic EID : 00 [829h 2089 3] Proximity Domain High(24) : 000000 [82Ch 2092 4] Clock Domain : 00000000 [830h 2096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [831h 2097 1] Length : 10 [832h 2098 1] Proximity Domain Low(8) : 01 [833h 2099 1] Apic ID : FF [834h 2100 4] Flags (decoded below) : 00000000 Enabled : 0 [838h 2104 1] Local Sapic EID : 00 [839h 2105 3] Proximity Domain High(24) : 000000 [83Ch 2108 4] Clock Domain : 00000000 [840h 2112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [841h 2113 1] Length : 10 [842h 2114 1] Proximity Domain Low(8) : 01 [843h 2115 1] Apic ID : FF [844h 2116 4] Flags (decoded below) : 00000000 Enabled : 0 [848h 2120 1] Local Sapic EID : 00 [849h 2121 3] Proximity Domain High(24) : 000000 [84Ch 2124 4] Clock Domain : 00000000 [850h 2128 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [851h 2129 1] Length : 10 [852h 2130 1] Proximity Domain Low(8) : 01 [853h 2131 1] Apic ID : FF [854h 2132 4] Flags (decoded below) : 00000000 Enabled : 0 [858h 2136 1] Local Sapic EID : 00 [859h 2137 3] Proximity Domain High(24) : 000000 [85Ch 2140 4] Clock Domain : 00000000 [860h 2144 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [861h 2145 1] Length : 10 [862h 2146 1] Proximity Domain Low(8) : 01 [863h 2147 1] Apic ID : FF [864h 2148 4] Flags (decoded below) : 00000000 Enabled : 0 [868h 2152 1] Local Sapic EID : 00 [869h 2153 3] Proximity Domain High(24) : 000000 [86Ch 2156 4] Clock Domain : 00000000 [870h 2160 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [871h 2161 1] Length : 10 [872h 2162 1] Proximity Domain Low(8) : 01 [873h 2163 1] Apic ID : FF [874h 2164 4] Flags (decoded below) : 00000000 Enabled : 0 [878h 2168 1] Local Sapic EID : 00 [879h 2169 3] Proximity Domain High(24) : 000000 [87Ch 2172 4] Clock Domain : 00000000 [880h 2176 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [881h 2177 1] Length : 10 [882h 2178 1] Proximity Domain Low(8) : 01 [883h 2179 1] Apic ID : FF [884h 2180 4] Flags (decoded below) : 00000000 Enabled : 0 [888h 2184 1] Local Sapic EID : 00 [889h 2185 3] Proximity Domain High(24) : 000000 [88Ch 2188 4] Clock Domain : 00000000 [890h 2192 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [891h 2193 1] Length : 10 [892h 2194 1] Proximity Domain Low(8) : 01 [893h 2195 1] Apic ID : FF [894h 2196 4] Flags (decoded below) : 00000000 Enabled : 0 [898h 2200 1] Local Sapic EID : 00 [899h 2201 3] Proximity Domain High(24) : 000000 [89Ch 2204 4] Clock Domain : 00000000 [8A0h 2208 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8A1h 2209 1] Length : 10 [8A2h 2210 1] Proximity Domain Low(8) : 01 [8A3h 2211 1] Apic ID : FF [8A4h 2212 4] Flags (decoded below) : 00000000 Enabled : 0 [8A8h 2216 1] Local Sapic EID : 00 [8A9h 2217 3] Proximity Domain High(24) : 000000 [8ACh 2220 4] Clock Domain : 00000000 [8B0h 2224 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8B1h 2225 1] Length : 10 [8B2h 2226 1] Proximity Domain Low(8) : 01 [8B3h 2227 1] Apic ID : FF [8B4h 2228 4] Flags (decoded below) : 00000000 Enabled : 0 [8B8h 2232 1] Local Sapic EID : 00 [8B9h 2233 3] Proximity Domain High(24) : 000000 [8BCh 2236 4] Clock Domain : 00000000 [8C0h 2240 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8C1h 2241 1] Length : 10 [8C2h 2242 1] Proximity Domain Low(8) : 01 [8C3h 2243 1] Apic ID : FF [8C4h 2244 4] Flags (decoded below) : 00000000 Enabled : 0 [8C8h 2248 1] Local Sapic EID : 00 [8C9h 2249 3] Proximity Domain High(24) : 000000 [8CCh 2252 4] Clock Domain : 00000000 [8D0h 2256 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8D1h 2257 1] Length : 10 [8D2h 2258 1] Proximity Domain Low(8) : 01 [8D3h 2259 1] Apic ID : FF [8D4h 2260 4] Flags (decoded below) : 00000000 Enabled : 0 [8D8h 2264 1] Local Sapic EID : 00 [8D9h 2265 3] Proximity Domain High(24) : 000000 [8DCh 2268 4] Clock Domain : 00000000 [8E0h 2272 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8E1h 2273 1] Length : 10 [8E2h 2274 1] Proximity Domain Low(8) : 01 [8E3h 2275 1] Apic ID : FF [8E4h 2276 4] Flags (decoded below) : 00000000 Enabled : 0 [8E8h 2280 1] Local Sapic EID : 00 [8E9h 2281 3] Proximity Domain High(24) : 000000 [8ECh 2284 4] Clock Domain : 00000000 [8F0h 2288 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [8F1h 2289 1] Length : 10 [8F2h 2290 1] Proximity Domain Low(8) : 01 [8F3h 2291 1] Apic ID : FF [8F4h 2292 4] Flags (decoded below) : 00000000 Enabled : 0 [8F8h 2296 1] Local Sapic EID : 00 [8F9h 2297 3] Proximity Domain High(24) : 000000 [8FCh 2300 4] Clock Domain : 00000000 [900h 2304 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [901h 2305 1] Length : 10 [902h 2306 1] Proximity Domain Low(8) : 01 [903h 2307 1] Apic ID : FF [904h 2308 4] Flags (decoded below) : 00000000 Enabled : 0 [908h 2312 1] Local Sapic EID : 00 [909h 2313 3] Proximity Domain High(24) : 000000 [90Ch 2316 4] Clock Domain : 00000000 [910h 2320 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [911h 2321 1] Length : 10 [912h 2322 1] Proximity Domain Low(8) : 01 [913h 2323 1] Apic ID : FF [914h 2324 4] Flags (decoded below) : 00000000 Enabled : 0 [918h 2328 1] Local Sapic EID : 00 [919h 2329 3] Proximity Domain High(24) : 000000 [91Ch 2332 4] Clock Domain : 00000000 [920h 2336 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [921h 2337 1] Length : 10 [922h 2338 1] Proximity Domain Low(8) : 01 [923h 2339 1] Apic ID : FF [924h 2340 4] Flags (decoded below) : 00000000 Enabled : 0 [928h 2344 1] Local Sapic EID : 00 [929h 2345 3] Proximity Domain High(24) : 000000 [92Ch 2348 4] Clock Domain : 00000000 [930h 2352 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [931h 2353 1] Length : 10 [932h 2354 1] Proximity Domain Low(8) : 02 [933h 2355 1] Apic ID : FF [934h 2356 4] Flags (decoded below) : 00000000 Enabled : 0 [938h 2360 1] Local Sapic EID : 00 [939h 2361 3] Proximity Domain High(24) : 000000 [93Ch 2364 4] Clock Domain : 00000000 [940h 2368 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [941h 2369 1] Length : 10 [942h 2370 1] Proximity Domain Low(8) : 02 [943h 2371 1] Apic ID : FF [944h 2372 4] Flags (decoded below) : 00000000 Enabled : 0 [948h 2376 1] Local Sapic EID : 00 [949h 2377 3] Proximity Domain High(24) : 000000 [94Ch 2380 4] Clock Domain : 00000000 [950h 2384 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [951h 2385 1] Length : 10 [952h 2386 1] Proximity Domain Low(8) : 02 [953h 2387 1] Apic ID : FF [954h 2388 4] Flags (decoded below) : 00000000 Enabled : 0 [958h 2392 1] Local Sapic EID : 00 [959h 2393 3] Proximity Domain High(24) : 000000 [95Ch 2396 4] Clock Domain : 00000000 [960h 2400 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [961h 2401 1] Length : 10 [962h 2402 1] Proximity Domain Low(8) : 02 [963h 2403 1] Apic ID : FF [964h 2404 4] Flags (decoded below) : 00000000 Enabled : 0 [968h 2408 1] Local Sapic EID : 00 [969h 2409 3] Proximity Domain High(24) : 000000 [96Ch 2412 4] Clock Domain : 00000000 [970h 2416 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [971h 2417 1] Length : 10 [972h 2418 1] Proximity Domain Low(8) : 02 [973h 2419 1] Apic ID : FF [974h 2420 4] Flags (decoded below) : 00000000 Enabled : 0 [978h 2424 1] Local Sapic EID : 00 [979h 2425 3] Proximity Domain High(24) : 000000 [97Ch 2428 4] Clock Domain : 00000000 [980h 2432 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [981h 2433 1] Length : 10 [982h 2434 1] Proximity Domain Low(8) : 02 [983h 2435 1] Apic ID : FF [984h 2436 4] Flags (decoded below) : 00000000 Enabled : 0 [988h 2440 1] Local Sapic EID : 00 [989h 2441 3] Proximity Domain High(24) : 000000 [98Ch 2444 4] Clock Domain : 00000000 [990h 2448 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [991h 2449 1] Length : 10 [992h 2450 1] Proximity Domain Low(8) : 02 [993h 2451 1] Apic ID : FF [994h 2452 4] Flags (decoded below) : 00000000 Enabled : 0 [998h 2456 1] Local Sapic EID : 00 [999h 2457 3] Proximity Domain High(24) : 000000 [99Ch 2460 4] Clock Domain : 00000000 [9A0h 2464 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9A1h 2465 1] Length : 10 [9A2h 2466 1] Proximity Domain Low(8) : 02 [9A3h 2467 1] Apic ID : FF [9A4h 2468 4] Flags (decoded below) : 00000000 Enabled : 0 [9A8h 2472 1] Local Sapic EID : 00 [9A9h 2473 3] Proximity Domain High(24) : 000000 [9ACh 2476 4] Clock Domain : 00000000 [9B0h 2480 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9B1h 2481 1] Length : 10 [9B2h 2482 1] Proximity Domain Low(8) : 02 [9B3h 2483 1] Apic ID : FF [9B4h 2484 4] Flags (decoded below) : 00000000 Enabled : 0 [9B8h 2488 1] Local Sapic EID : 00 [9B9h 2489 3] Proximity Domain High(24) : 000000 [9BCh 2492 4] Clock Domain : 00000000 [9C0h 2496 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9C1h 2497 1] Length : 10 [9C2h 2498 1] Proximity Domain Low(8) : 02 [9C3h 2499 1] Apic ID : FF [9C4h 2500 4] Flags (decoded below) : 00000000 Enabled : 0 [9C8h 2504 1] Local Sapic EID : 00 [9C9h 2505 3] Proximity Domain High(24) : 000000 [9CCh 2508 4] Clock Domain : 00000000 [9D0h 2512 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9D1h 2513 1] Length : 10 [9D2h 2514 1] Proximity Domain Low(8) : 02 [9D3h 2515 1] Apic ID : FF [9D4h 2516 4] Flags (decoded below) : 00000000 Enabled : 0 [9D8h 2520 1] Local Sapic EID : 00 [9D9h 2521 3] Proximity Domain High(24) : 000000 [9DCh 2524 4] Clock Domain : 00000000 [9E0h 2528 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9E1h 2529 1] Length : 10 [9E2h 2530 1] Proximity Domain Low(8) : 02 [9E3h 2531 1] Apic ID : FF [9E4h 2532 4] Flags (decoded below) : 00000000 Enabled : 0 [9E8h 2536 1] Local Sapic EID : 00 [9E9h 2537 3] Proximity Domain High(24) : 000000 [9ECh 2540 4] Clock Domain : 00000000 [9F0h 2544 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [9F1h 2545 1] Length : 10 [9F2h 2546 1] Proximity Domain Low(8) : 02 [9F3h 2547 1] Apic ID : FF [9F4h 2548 4] Flags (decoded below) : 00000000 Enabled : 0 [9F8h 2552 1] Local Sapic EID : 00 [9F9h 2553 3] Proximity Domain High(24) : 000000 [9FCh 2556 4] Clock Domain : 00000000 [A00h 2560 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A01h 2561 1] Length : 10 [A02h 2562 1] Proximity Domain Low(8) : 02 [A03h 2563 1] Apic ID : FF [A04h 2564 4] Flags (decoded below) : 00000000 Enabled : 0 [A08h 2568 1] Local Sapic EID : 00 [A09h 2569 3] Proximity Domain High(24) : 000000 [A0Ch 2572 4] Clock Domain : 00000000 [A10h 2576 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A11h 2577 1] Length : 10 [A12h 2578 1] Proximity Domain Low(8) : 02 [A13h 2579 1] Apic ID : FF [A14h 2580 4] Flags (decoded below) : 00000000 Enabled : 0 [A18h 2584 1] Local Sapic EID : 00 [A19h 2585 3] Proximity Domain High(24) : 000000 [A1Ch 2588 4] Clock Domain : 00000000 [A20h 2592 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A21h 2593 1] Length : 10 [A22h 2594 1] Proximity Domain Low(8) : 02 [A23h 2595 1] Apic ID : FF [A24h 2596 4] Flags (decoded below) : 00000000 Enabled : 0 [A28h 2600 1] Local Sapic EID : 00 [A29h 2601 3] Proximity Domain High(24) : 000000 [A2Ch 2604 4] Clock Domain : 00000000 [A30h 2608 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A31h 2609 1] Length : 10 [A32h 2610 1] Proximity Domain Low(8) : 02 [A33h 2611 1] Apic ID : FF [A34h 2612 4] Flags (decoded below) : 00000000 Enabled : 0 [A38h 2616 1] Local Sapic EID : 00 [A39h 2617 3] Proximity Domain High(24) : 000000 [A3Ch 2620 4] Clock Domain : 00000000 [A40h 2624 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A41h 2625 1] Length : 10 [A42h 2626 1] Proximity Domain Low(8) : 02 [A43h 2627 1] Apic ID : FF [A44h 2628 4] Flags (decoded below) : 00000000 Enabled : 0 [A48h 2632 1] Local Sapic EID : 00 [A49h 2633 3] Proximity Domain High(24) : 000000 [A4Ch 2636 4] Clock Domain : 00000000 [A50h 2640 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A51h 2641 1] Length : 10 [A52h 2642 1] Proximity Domain Low(8) : 02 [A53h 2643 1] Apic ID : FF [A54h 2644 4] Flags (decoded below) : 00000000 Enabled : 0 [A58h 2648 1] Local Sapic EID : 00 [A59h 2649 3] Proximity Domain High(24) : 000000 [A5Ch 2652 4] Clock Domain : 00000000 [A60h 2656 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A61h 2657 1] Length : 10 [A62h 2658 1] Proximity Domain Low(8) : 02 [A63h 2659 1] Apic ID : FF [A64h 2660 4] Flags (decoded below) : 00000000 Enabled : 0 [A68h 2664 1] Local Sapic EID : 00 [A69h 2665 3] Proximity Domain High(24) : 000000 [A6Ch 2668 4] Clock Domain : 00000000 [A70h 2672 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A71h 2673 1] Length : 10 [A72h 2674 1] Proximity Domain Low(8) : 02 [A73h 2675 1] Apic ID : FF [A74h 2676 4] Flags (decoded below) : 00000000 Enabled : 0 [A78h 2680 1] Local Sapic EID : 00 [A79h 2681 3] Proximity Domain High(24) : 000000 [A7Ch 2684 4] Clock Domain : 00000000 [A80h 2688 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A81h 2689 1] Length : 10 [A82h 2690 1] Proximity Domain Low(8) : 02 [A83h 2691 1] Apic ID : FF [A84h 2692 4] Flags (decoded below) : 00000000 Enabled : 0 [A88h 2696 1] Local Sapic EID : 00 [A89h 2697 3] Proximity Domain High(24) : 000000 [A8Ch 2700 4] Clock Domain : 00000000 [A90h 2704 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [A91h 2705 1] Length : 10 [A92h 2706 1] Proximity Domain Low(8) : 02 [A93h 2707 1] Apic ID : FF [A94h 2708 4] Flags (decoded below) : 00000000 Enabled : 0 [A98h 2712 1] Local Sapic EID : 00 [A99h 2713 3] Proximity Domain High(24) : 000000 [A9Ch 2716 4] Clock Domain : 00000000 [AA0h 2720 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AA1h 2721 1] Length : 10 [AA2h 2722 1] Proximity Domain Low(8) : 02 [AA3h 2723 1] Apic ID : FF [AA4h 2724 4] Flags (decoded below) : 00000000 Enabled : 0 [AA8h 2728 1] Local Sapic EID : 00 [AA9h 2729 3] Proximity Domain High(24) : 000000 [AACh 2732 4] Clock Domain : 00000000 [AB0h 2736 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AB1h 2737 1] Length : 10 [AB2h 2738 1] Proximity Domain Low(8) : 03 [AB3h 2739 1] Apic ID : FF [AB4h 2740 4] Flags (decoded below) : 00000000 Enabled : 0 [AB8h 2744 1] Local Sapic EID : 00 [AB9h 2745 3] Proximity Domain High(24) : 000000 [ABCh 2748 4] Clock Domain : 00000000 [AC0h 2752 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AC1h 2753 1] Length : 10 [AC2h 2754 1] Proximity Domain Low(8) : 03 [AC3h 2755 1] Apic ID : FF [AC4h 2756 4] Flags (decoded below) : 00000000 Enabled : 0 [AC8h 2760 1] Local Sapic EID : 00 [AC9h 2761 3] Proximity Domain High(24) : 000000 [ACCh 2764 4] Clock Domain : 00000000 [AD0h 2768 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AD1h 2769 1] Length : 10 [AD2h 2770 1] Proximity Domain Low(8) : 03 [AD3h 2771 1] Apic ID : FF [AD4h 2772 4] Flags (decoded below) : 00000000 Enabled : 0 [AD8h 2776 1] Local Sapic EID : 00 [AD9h 2777 3] Proximity Domain High(24) : 000000 [ADCh 2780 4] Clock Domain : 00000000 [AE0h 2784 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AE1h 2785 1] Length : 10 [AE2h 2786 1] Proximity Domain Low(8) : 03 [AE3h 2787 1] Apic ID : FF [AE4h 2788 4] Flags (decoded below) : 00000000 Enabled : 0 [AE8h 2792 1] Local Sapic EID : 00 [AE9h 2793 3] Proximity Domain High(24) : 000000 [AECh 2796 4] Clock Domain : 00000000 [AF0h 2800 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [AF1h 2801 1] Length : 10 [AF2h 2802 1] Proximity Domain Low(8) : 03 [AF3h 2803 1] Apic ID : FF [AF4h 2804 4] Flags (decoded below) : 00000000 Enabled : 0 [AF8h 2808 1] Local Sapic EID : 00 [AF9h 2809 3] Proximity Domain High(24) : 000000 [AFCh 2812 4] Clock Domain : 00000000 [B00h 2816 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B01h 2817 1] Length : 10 [B02h 2818 1] Proximity Domain Low(8) : 03 [B03h 2819 1] Apic ID : FF [B04h 2820 4] Flags (decoded below) : 00000000 Enabled : 0 [B08h 2824 1] Local Sapic EID : 00 [B09h 2825 3] Proximity Domain High(24) : 000000 [B0Ch 2828 4] Clock Domain : 00000000 [B10h 2832 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B11h 2833 1] Length : 10 [B12h 2834 1] Proximity Domain Low(8) : 03 [B13h 2835 1] Apic ID : FF [B14h 2836 4] Flags (decoded below) : 00000000 Enabled : 0 [B18h 2840 1] Local Sapic EID : 00 [B19h 2841 3] Proximity Domain High(24) : 000000 [B1Ch 2844 4] Clock Domain : 00000000 [B20h 2848 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B21h 2849 1] Length : 10 [B22h 2850 1] Proximity Domain Low(8) : 03 [B23h 2851 1] Apic ID : FF [B24h 2852 4] Flags (decoded below) : 00000000 Enabled : 0 [B28h 2856 1] Local Sapic EID : 00 [B29h 2857 3] Proximity Domain High(24) : 000000 [B2Ch 2860 4] Clock Domain : 00000000 [B30h 2864 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B31h 2865 1] Length : 10 [B32h 2866 1] Proximity Domain Low(8) : 03 [B33h 2867 1] Apic ID : FF [B34h 2868 4] Flags (decoded below) : 00000000 Enabled : 0 [B38h 2872 1] Local Sapic EID : 00 [B39h 2873 3] Proximity Domain High(24) : 000000 [B3Ch 2876 4] Clock Domain : 00000000 [B40h 2880 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B41h 2881 1] Length : 10 [B42h 2882 1] Proximity Domain Low(8) : 03 [B43h 2883 1] Apic ID : FF [B44h 2884 4] Flags (decoded below) : 00000000 Enabled : 0 [B48h 2888 1] Local Sapic EID : 00 [B49h 2889 3] Proximity Domain High(24) : 000000 [B4Ch 2892 4] Clock Domain : 00000000 [B50h 2896 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B51h 2897 1] Length : 10 [B52h 2898 1] Proximity Domain Low(8) : 03 [B53h 2899 1] Apic ID : FF [B54h 2900 4] Flags (decoded below) : 00000000 Enabled : 0 [B58h 2904 1] Local Sapic EID : 00 [B59h 2905 3] Proximity Domain High(24) : 000000 [B5Ch 2908 4] Clock Domain : 00000000 [B60h 2912 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B61h 2913 1] Length : 10 [B62h 2914 1] Proximity Domain Low(8) : 03 [B63h 2915 1] Apic ID : FF [B64h 2916 4] Flags (decoded below) : 00000000 Enabled : 0 [B68h 2920 1] Local Sapic EID : 00 [B69h 2921 3] Proximity Domain High(24) : 000000 [B6Ch 2924 4] Clock Domain : 00000000 [B70h 2928 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B71h 2929 1] Length : 10 [B72h 2930 1] Proximity Domain Low(8) : 03 [B73h 2931 1] Apic ID : FF [B74h 2932 4] Flags (decoded below) : 00000000 Enabled : 0 [B78h 2936 1] Local Sapic EID : 00 [B79h 2937 3] Proximity Domain High(24) : 000000 [B7Ch 2940 4] Clock Domain : 00000000 [B80h 2944 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B81h 2945 1] Length : 10 [B82h 2946 1] Proximity Domain Low(8) : 03 [B83h 2947 1] Apic ID : FF [B84h 2948 4] Flags (decoded below) : 00000000 Enabled : 0 [B88h 2952 1] Local Sapic EID : 00 [B89h 2953 3] Proximity Domain High(24) : 000000 [B8Ch 2956 4] Clock Domain : 00000000 [B90h 2960 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [B91h 2961 1] Length : 10 [B92h 2962 1] Proximity Domain Low(8) : 03 [B93h 2963 1] Apic ID : FF [B94h 2964 4] Flags (decoded below) : 00000000 Enabled : 0 [B98h 2968 1] Local Sapic EID : 00 [B99h 2969 3] Proximity Domain High(24) : 000000 [B9Ch 2972 4] Clock Domain : 00000000 [BA0h 2976 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BA1h 2977 1] Length : 10 [BA2h 2978 1] Proximity Domain Low(8) : 03 [BA3h 2979 1] Apic ID : FF [BA4h 2980 4] Flags (decoded below) : 00000000 Enabled : 0 [BA8h 2984 1] Local Sapic EID : 00 [BA9h 2985 3] Proximity Domain High(24) : 000000 [BACh 2988 4] Clock Domain : 00000000 [BB0h 2992 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BB1h 2993 1] Length : 10 [BB2h 2994 1] Proximity Domain Low(8) : 03 [BB3h 2995 1] Apic ID : FF [BB4h 2996 4] Flags (decoded below) : 00000000 Enabled : 0 [BB8h 3000 1] Local Sapic EID : 00 [BB9h 3001 3] Proximity Domain High(24) : 000000 [BBCh 3004 4] Clock Domain : 00000000 [BC0h 3008 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BC1h 3009 1] Length : 10 [BC2h 3010 1] Proximity Domain Low(8) : 03 [BC3h 3011 1] Apic ID : FF [BC4h 3012 4] Flags (decoded below) : 00000000 Enabled : 0 [BC8h 3016 1] Local Sapic EID : 00 [BC9h 3017 3] Proximity Domain High(24) : 000000 [BCCh 3020 4] Clock Domain : 00000000 [BD0h 3024 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BD1h 3025 1] Length : 10 [BD2h 3026 1] Proximity Domain Low(8) : 03 [BD3h 3027 1] Apic ID : FF [BD4h 3028 4] Flags (decoded below) : 00000000 Enabled : 0 [BD8h 3032 1] Local Sapic EID : 00 [BD9h 3033 3] Proximity Domain High(24) : 000000 [BDCh 3036 4] Clock Domain : 00000000 [BE0h 3040 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BE1h 3041 1] Length : 10 [BE2h 3042 1] Proximity Domain Low(8) : 03 [BE3h 3043 1] Apic ID : FF [BE4h 3044 4] Flags (decoded below) : 00000000 Enabled : 0 [BE8h 3048 1] Local Sapic EID : 00 [BE9h 3049 3] Proximity Domain High(24) : 000000 [BECh 3052 4] Clock Domain : 00000000 [BF0h 3056 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [BF1h 3057 1] Length : 10 [BF2h 3058 1] Proximity Domain Low(8) : 03 [BF3h 3059 1] Apic ID : FF [BF4h 3060 4] Flags (decoded below) : 00000000 Enabled : 0 [BF8h 3064 1] Local Sapic EID : 00 [BF9h 3065 3] Proximity Domain High(24) : 000000 [BFCh 3068 4] Clock Domain : 00000000 [C00h 3072 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [C01h 3073 1] Length : 10 [C02h 3074 1] Proximity Domain Low(8) : 03 [C03h 3075 1] Apic ID : FF [C04h 3076 4] Flags (decoded below) : 00000000 Enabled : 0 [C08h 3080 1] Local Sapic EID : 00 [C09h 3081 3] Proximity Domain High(24) : 000000 [C0Ch 3084 4] Clock Domain : 00000000 [C10h 3088 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [C11h 3089 1] Length : 10 [C12h 3090 1] Proximity Domain Low(8) : 03 [C13h 3091 1] Apic ID : FF [C14h 3092 4] Flags (decoded below) : 00000000 Enabled : 0 [C18h 3096 1] Local Sapic EID : 00 [C19h 3097 3] Proximity Domain High(24) : 000000 [C1Ch 3100 4] Clock Domain : 00000000 [C20h 3104 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] [C21h 3105 1] Length : 10 [C22h 3106 1] Proximity Domain Low(8) : 03 [C23h 3107 1] Apic ID : FF [C24h 3108 4] Flags (decoded below) : 00000000 Enabled : 0 [C28h 3112 1] Local Sapic EID : 00 [C29h 3113 3] Proximity Domain High(24) : 000000 [C2Ch 3116 4] Clock Domain : 00000000 [C30h 3120 1] Subtable Type : 01 [Memory Affinity] [C31h 3121 1] Length : 28 [C32h 3122 4] Proximity Domain : 00000000 [C36h 3126 2] Reserved1 : 0000 [C38h 3128 8] Base Address : 0000000000000000 [C40h 3136 8] Address Length : 00000000C0000000 [C48h 3144 4] Reserved2 : 00000000 [C4Ch 3148 4] Flags (decoded below) : 00000001 Enabled : 1 Hot Pluggable : 0 Non-Volatile : 0 [C50h 3152 8] Reserved3 : 0000000000000000 [C58h 3160 1] Subtable Type : 01 [Memory Affinity] [C59h 3161 1] Length : 28 [C5Ah 3162 4] Proximity Domain : 00000000 [C5Eh 3166 2] Reserved1 : 0000 [C60h 3168 8] Base Address : 0000000100000000 [C68h 3176 8] Address Length : 0000000F40000000 [C70h 3184 4] Reserved2 : 00000000 [C74h 3188 4] Flags (decoded below) : 00000001 Enabled : 1 Hot Pluggable : 0 Non-Volatile : 0 [C78h 3192 8] Reserved3 : 0000000000000000 [C80h 3200 1] Subtable Type : 01 [Memory Affinity] [C81h 3201 1] Length : 28 [C82h 3202 4] Proximity Domain : 00000000 [C86h 3206 2] Reserved1 : 0000 [C88h 3208 8] Base Address : 0000000000000000 [C90h 3216 8] Address Length : 0000000000000000 [C98h 3224 4] Reserved2 : 00000000 [C9Ch 3228 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [CA0h 3232 8] Reserved3 : 0000000000000000 [CA8h 3240 1] Subtable Type : 01 [Memory Affinity] [CA9h 3241 1] Length : 28 [CAAh 3242 4] Proximity Domain : 00000000 [CAEh 3246 2] Reserved1 : 0000 [CB0h 3248 8] Base Address : 0000000000000000 [CB8h 3256 8] Address Length : 0000000000000000 [CC0h 3264 4] Reserved2 : 00000000 [CC4h 3268 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [CC8h 3272 8] Reserved3 : 0000000000000000 [CD0h 3280 1] Subtable Type : 01 [Memory Affinity] [CD1h 3281 1] Length : 28 [CD2h 3282 4] Proximity Domain : 00000000 [CD6h 3286 2] Reserved1 : 0000 [CD8h 3288 8] Base Address : 0000000000000000 [CE0h 3296 8] Address Length : 0000000000000000 [CE8h 3304 4] Reserved2 : 00000000 [CECh 3308 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [CF0h 3312 8] Reserved3 : 0000000000000000 [CF8h 3320 1] Subtable Type : 01 [Memory Affinity] [CF9h 3321 1] Length : 28 [CFAh 3322 4] Proximity Domain : 00000000 [CFEh 3326 2] Reserved1 : 0000 [D00h 3328 8] Base Address : 0000000000000000 [D08h 3336 8] Address Length : 0000000000000000 [D10h 3344 4] Reserved2 : 00000000 [D14h 3348 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [D18h 3352 8] Reserved3 : 0000000000000000 [D20h 3360 1] Subtable Type : 01 [Memory Affinity] [D21h 3361 1] Length : 28 [D22h 3362 4] Proximity Domain : 00000000 [D26h 3366 2] Reserved1 : 0000 [D28h 3368 8] Base Address : 0000000000000000 [D30h 3376 8] Address Length : 0000000000000000 [D38h 3384 4] Reserved2 : 00000000 [D3Ch 3388 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [D40h 3392 8] Reserved3 : 0000000000000000 [D48h 3400 1] Subtable Type : 01 [Memory Affinity] [D49h 3401 1] Length : 28 [D4Ah 3402 4] Proximity Domain : 00000000 [D4Eh 3406 2] Reserved1 : 0000 [D50h 3408 8] Base Address : 0000000000000000 [D58h 3416 8] Address Length : 0000000000000000 [D60h 3424 4] Reserved2 : 00000000 [D64h 3428 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [D68h 3432 8] Reserved3 : 0000000000000000 [D70h 3440 1] Subtable Type : 01 [Memory Affinity] [D71h 3441 1] Length : 28 [D72h 3442 4] Proximity Domain : 00000000 [D76h 3446 2] Reserved1 : 0000 [D78h 3448 8] Base Address : 0000000000000000 [D80h 3456 8] Address Length : 0000000000000000 [D88h 3464 4] Reserved2 : 00000000 [D8Ch 3468 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [D90h 3472 8] Reserved3 : 0000000000000000 [D98h 3480 1] Subtable Type : 01 [Memory Affinity] [D99h 3481 1] Length : 28 [D9Ah 3482 4] Proximity Domain : 00000000 [D9Eh 3486 2] Reserved1 : 0000 [DA0h 3488 8] Base Address : 0000000000000000 [DA8h 3496 8] Address Length : 0000000000000000 [DB0h 3504 4] Reserved2 : 00000000 [DB4h 3508 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [DB8h 3512 8] Reserved3 : 0000000000000000 [DC0h 3520 1] Subtable Type : 01 [Memory Affinity] [DC1h 3521 1] Length : 28 [DC2h 3522 4] Proximity Domain : 00000000 [DC6h 3526 2] Reserved1 : 0000 [DC8h 3528 8] Base Address : 0000000000000000 [DD0h 3536 8] Address Length : 0000000000000000 [DD8h 3544 4] Reserved2 : 00000000 [DDCh 3548 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [DE0h 3552 8] Reserved3 : 0000000000000000 [DE8h 3560 1] Subtable Type : 01 [Memory Affinity] [DE9h 3561 1] Length : 28 [DEAh 3562 4] Proximity Domain : 00000000 [DEEh 3566 2] Reserved1 : 0000 [DF0h 3568 8] Base Address : 0000000000000000 [DF8h 3576 8] Address Length : 0000000000000000 [E00h 3584 4] Reserved2 : 00000000 [E04h 3588 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [E08h 3592 8] Reserved3 : 0000000000000000 [E10h 3600 1] Subtable Type : 01 [Memory Affinity] [E11h 3601 1] Length : 28 [E12h 3602 4] Proximity Domain : 00000000 [E16h 3606 2] Reserved1 : 0000 [E18h 3608 8] Base Address : 0000000000000000 [E20h 3616 8] Address Length : 0000000000000000 [E28h 3624 4] Reserved2 : 00000000 [E2Ch 3628 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [E30h 3632 8] Reserved3 : 0000000000000000 [E38h 3640 1] Subtable Type : 01 [Memory Affinity] [E39h 3641 1] Length : 28 [E3Ah 3642 4] Proximity Domain : 00000000 [E3Eh 3646 2] Reserved1 : 0000 [E40h 3648 8] Base Address : 0000000000000000 [E48h 3656 8] Address Length : 0000000000000000 [E50h 3664 4] Reserved2 : 00000000 [E54h 3668 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [E58h 3672 8] Reserved3 : 0000000000000000 [E60h 3680 1] Subtable Type : 01 [Memory Affinity] [E61h 3681 1] Length : 28 [E62h 3682 4] Proximity Domain : 00000000 [E66h 3686 2] Reserved1 : 0000 [E68h 3688 8] Base Address : 0000000000000000 [E70h 3696 8] Address Length : 0000000000000000 [E78h 3704 4] Reserved2 : 00000000 [E7Ch 3708 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [E80h 3712 8] Reserved3 : 0000000000000000 [E88h 3720 1] Subtable Type : 01 [Memory Affinity] [E89h 3721 1] Length : 28 [E8Ah 3722 4] Proximity Domain : 00000000 [E8Eh 3726 2] Reserved1 : 0000 [E90h 3728 8] Base Address : 0000000000000000 [E98h 3736 8] Address Length : 0000000000000000 [EA0h 3744 4] Reserved2 : 00000000 [EA4h 3748 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [EA8h 3752 8] Reserved3 : 0000000000000000 [EB0h 3760 1] Subtable Type : 01 [Memory Affinity] [EB1h 3761 1] Length : 28 [EB2h 3762 4] Proximity Domain : 00000000 [EB6h 3766 2] Reserved1 : 0000 [EB8h 3768 8] Base Address : 0000000000000000 [EC0h 3776 8] Address Length : 0000000000000000 [EC8h 3784 4] Reserved2 : 00000000 [ECCh 3788 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [ED0h 3792 8] Reserved3 : 0000000000000000 [ED8h 3800 1] Subtable Type : 01 [Memory Affinity] [ED9h 3801 1] Length : 28 [EDAh 3802 4] Proximity Domain : 00000000 [EDEh 3806 2] Reserved1 : 0000 [EE0h 3808 8] Base Address : 0000000000000000 [EE8h 3816 8] Address Length : 0000000000000000 [EF0h 3824 4] Reserved2 : 00000000 [EF4h 3828 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [EF8h 3832 8] Reserved3 : 0000000000000000 [F00h 3840 1] Subtable Type : 01 [Memory Affinity] [F01h 3841 1] Length : 28 [F02h 3842 4] Proximity Domain : 00000000 [F06h 3846 2] Reserved1 : 0000 [F08h 3848 8] Base Address : 0000000000000000 [F10h 3856 8] Address Length : 0000000000000000 [F18h 3864 4] Reserved2 : 00000000 [F1Ch 3868 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [F20h 3872 8] Reserved3 : 0000000000000000 [F28h 3880 1] Subtable Type : 01 [Memory Affinity] [F29h 3881 1] Length : 28 [F2Ah 3882 4] Proximity Domain : 00000000 [F2Eh 3886 2] Reserved1 : 0000 [F30h 3888 8] Base Address : 0000000000000000 [F38h 3896 8] Address Length : 0000000000000000 [F40h 3904 4] Reserved2 : 00000000 [F44h 3908 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [F48h 3912 8] Reserved3 : 0000000000000000 [F50h 3920 1] Subtable Type : 01 [Memory Affinity] [F51h 3921 1] Length : 28 [F52h 3922 4] Proximity Domain : 00000000 [F56h 3926 2] Reserved1 : 0000 [F58h 3928 8] Base Address : 0000000000000000 [F60h 3936 8] Address Length : 0000000000000000 [F68h 3944 4] Reserved2 : 00000000 [F6Ch 3948 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [F70h 3952 8] Reserved3 : 0000000000000000 [F78h 3960 1] Subtable Type : 01 [Memory Affinity] [F79h 3961 1] Length : 28 [F7Ah 3962 4] Proximity Domain : 00000000 [F7Eh 3966 2] Reserved1 : 0000 [F80h 3968 8] Base Address : 0000000000000000 [F88h 3976 8] Address Length : 0000000000000000 [F90h 3984 4] Reserved2 : 00000000 [F94h 3988 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [F98h 3992 8] Reserved3 : 0000000000000000 [FA0h 4000 1] Subtable Type : 01 [Memory Affinity] [FA1h 4001 1] Length : 28 [FA2h 4002 4] Proximity Domain : 00000000 [FA6h 4006 2] Reserved1 : 0000 [FA8h 4008 8] Base Address : 0000000000000000 [FB0h 4016 8] Address Length : 0000000000000000 [FB8h 4024 4] Reserved2 : 00000000 [FBCh 4028 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [FC0h 4032 8] Reserved3 : 0000000000000000 [FC8h 4040 1] Subtable Type : 01 [Memory Affinity] [FC9h 4041 1] Length : 28 [FCAh 4042 4] Proximity Domain : 00000000 [FCEh 4046 2] Reserved1 : 0000 [FD0h 4048 8] Base Address : 0000000000000000 [FD8h 4056 8] Address Length : 0000000000000000 [FE0h 4064 4] Reserved2 : 00000000 [FE4h 4068 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [FE8h 4072 8] Reserved3 : 0000000000000000 [FF0h 4080 1] Subtable Type : 01 [Memory Affinity] [FF1h 4081 1] Length : 28 [FF2h 4082 4] Proximity Domain : 00000000 [FF6h 4086 2] Reserved1 : 0000 [FF8h 4088 8] Base Address : 0000000000000000 [1000h 4096 8] Address Length : 0000000000000000 [1008h 4104 4] Reserved2 : 00000000 [100Ch 4108 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1010h 4112 8] Reserved3 : 0000000000000000 [1018h 4120 1] Subtable Type : 01 [Memory Affinity] [1019h 4121 1] Length : 28 [101Ah 4122 4] Proximity Domain : 00000000 [101Eh 4126 2] Reserved1 : 0000 [1020h 4128 8] Base Address : 0000000000000000 [1028h 4136 8] Address Length : 0000000000000000 [1030h 4144 4] Reserved2 : 00000000 [1034h 4148 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1038h 4152 8] Reserved3 : 0000000000000000 [1040h 4160 1] Subtable Type : 01 [Memory Affinity] [1041h 4161 1] Length : 28 [1042h 4162 4] Proximity Domain : 00000000 [1046h 4166 2] Reserved1 : 0000 [1048h 4168 8] Base Address : 0000000000000000 [1050h 4176 8] Address Length : 0000000000000000 [1058h 4184 4] Reserved2 : 00000000 [105Ch 4188 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1060h 4192 8] Reserved3 : 0000000000000000 [1068h 4200 1] Subtable Type : 01 [Memory Affinity] [1069h 4201 1] Length : 28 [106Ah 4202 4] Proximity Domain : 00000000 [106Eh 4206 2] Reserved1 : 0000 [1070h 4208 8] Base Address : 0000000000000000 [1078h 4216 8] Address Length : 0000000000000000 [1080h 4224 4] Reserved2 : 00000000 [1084h 4228 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1088h 4232 8] Reserved3 : 0000000000000000 [1090h 4240 1] Subtable Type : 01 [Memory Affinity] [1091h 4241 1] Length : 28 [1092h 4242 4] Proximity Domain : 00000000 [1096h 4246 2] Reserved1 : 0000 [1098h 4248 8] Base Address : 0000000000000000 [10A0h 4256 8] Address Length : 0000000000000000 [10A8h 4264 4] Reserved2 : 00000000 [10ACh 4268 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [10B0h 4272 8] Reserved3 : 0000000000000000 [10B8h 4280 1] Subtable Type : 01 [Memory Affinity] [10B9h 4281 1] Length : 28 [10BAh 4282 4] Proximity Domain : 00000000 [10BEh 4286 2] Reserved1 : 0000 [10C0h 4288 8] Base Address : 0000000000000000 [10C8h 4296 8] Address Length : 0000000000000000 [10D0h 4304 4] Reserved2 : 00000000 [10D4h 4308 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [10D8h 4312 8] Reserved3 : 0000000000000000 [10E0h 4320 1] Subtable Type : 01 [Memory Affinity] [10E1h 4321 1] Length : 28 [10E2h 4322 4] Proximity Domain : 00000000 [10E6h 4326 2] Reserved1 : 0000 [10E8h 4328 8] Base Address : 0000000000000000 [10F0h 4336 8] Address Length : 0000000000000000 [10F8h 4344 4] Reserved2 : 00000000 [10FCh 4348 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1100h 4352 8] Reserved3 : 0000000000000000 [1108h 4360 1] Subtable Type : 01 [Memory Affinity] [1109h 4361 1] Length : 28 [110Ah 4362 4] Proximity Domain : 00000000 [110Eh 4366 2] Reserved1 : 0000 [1110h 4368 8] Base Address : 0000000000000000 [1118h 4376 8] Address Length : 0000000000000000 [1120h 4384 4] Reserved2 : 00000000 [1124h 4388 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1128h 4392 8] Reserved3 : 0000000000000000 [1130h 4400 1] Subtable Type : 01 [Memory Affinity] [1131h 4401 1] Length : 28 [1132h 4402 4] Proximity Domain : 00000000 [1136h 4406 2] Reserved1 : 0000 [1138h 4408 8] Base Address : 0000000000000000 [1140h 4416 8] Address Length : 0000000000000000 [1148h 4424 4] Reserved2 : 00000000 [114Ch 4428 4] Flags (decoded below) : 00000000 Enabled : 0 Hot Pluggable : 0 Non-Volatile : 0 [1150h 4432 8] Reserved3 : 0000000000000000 Raw Table Data: Length 4440 (0x1158) 0000: 53 52 41 54 58 11 00 00 03 DC 41 4C 41 53 4B 41 // SRATX.....ALASKA 0010: 41 20 4D 20 49 20 00 00 01 00 00 00 49 4E 54 4C // A M I ......INTL 0020: 13 10 09 20 01 00 00 00 00 00 00 00 00 00 00 00 // ... ............ 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 10 00 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0050: 00 10 00 04 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0060: 00 10 00 06 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 10 00 08 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0080: 00 10 00 0A 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0090: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00A0: 00 10 00 03 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00B0: 00 10 00 05 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00C0: 00 10 00 07 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00D0: 00 10 00 09 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00E0: 00 10 00 0B 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 00F0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0100: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0110: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0120: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0130: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0140: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0150: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0160: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0170: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0180: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0190: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01A0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01B0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01C0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01D0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01E0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 01F0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0200: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0210: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0220: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0230: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0240: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0250: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0260: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0270: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0280: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0290: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02A0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02B0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02C0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02D0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02E0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 02F0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0300: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0310: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0320: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0330: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0340: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0350: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0360: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0370: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0380: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0390: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03A0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03B0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03C0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03D0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03E0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 03F0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0400: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0410: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0420: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0430: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0440: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0450: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0460: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0470: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0480: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0490: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04A0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04B0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04C0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04D0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04E0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 04F0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0500: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0510: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0520: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0530: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0540: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0550: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0560: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0570: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0580: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0590: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05A0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05B0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05C0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05D0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05E0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 05F0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0600: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0610: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0620: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0630: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0640: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0650: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0660: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0670: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0680: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0690: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06A0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06B0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06C0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06D0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06E0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 06F0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0700: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0710: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0720: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0730: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0740: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0750: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0760: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0770: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0780: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0790: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07A0: 00 10 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07B0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07C0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07D0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07E0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 07F0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0800: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0810: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0820: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0830: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0840: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0850: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0860: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0870: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0880: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0890: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08A0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08B0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08C0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08D0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08E0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 08F0: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0900: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0910: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0920: 00 10 01 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0930: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0940: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0950: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0960: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0970: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0980: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0990: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09A0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09B0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09C0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09D0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09E0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 09F0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A00: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A10: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A20: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A30: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A40: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A50: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A60: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A70: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A80: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0A90: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AA0: 00 10 02 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AB0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AC0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AD0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AE0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0AF0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B00: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B10: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B20: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B30: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B40: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B50: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B60: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B70: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B80: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0B90: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BA0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BB0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BC0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BD0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BE0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0BF0: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0C00: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0C10: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0C20: 00 10 03 FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0C30: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0C40: 00 00 00 C0 00 00 00 00 00 00 00 00 01 00 00 00 // ................ 0C50: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0C60: 00 00 00 00 01 00 00 00 00 00 00 40 0F 00 00 00 // ...........@.... 0C70: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ 0C80: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0C90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0CA0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0CB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0CC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0CD0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0CE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0CF0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0D00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D20: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0D30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D40: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0D50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D70: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0D80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0D90: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0DA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0DB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0DC0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0DD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0DE0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0DF0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E10: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0E20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E30: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0E40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E60: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0E70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0E80: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0E90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0EA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0EB0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0EC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0ED0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0EE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0EF0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F00: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0F10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F20: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0F30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F50: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0F60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F70: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0F80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0F90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0FA0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 0FB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0FC0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 0FD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0FE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0FF0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 1000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1010: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 1020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1040: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 1050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1060: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 1070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 10A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 10B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 10C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 10D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 10E0: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 10F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1100: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... 1110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1130: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. 1140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 1150: 00 00 00 00 00 00 00 00 // ........ SSDT1 ----- DefinitionBlock ("", "SSDT", 2, "ALASKA", "PmMgt", 0x00000001) { External (_SB_.SCK0.CP00, DeviceObj) External (_SB_.SCK0.CP01, DeviceObj) External (_SB_.SCK0.CP02, DeviceObj) External (_SB_.SCK0.CP03, DeviceObj) External (_SB_.SCK0.CP04, DeviceObj) External (_SB_.SCK0.CP05, DeviceObj) External (_SB_.SCK0.CP06, DeviceObj) External (_SB_.SCK0.CP07, DeviceObj) External (_SB_.SCK0.CP08, DeviceObj) External (_SB_.SCK0.CP09, DeviceObj) External (_SB_.SCK0.CP0A, DeviceObj) External (_SB_.SCK0.CP0B, DeviceObj) External (_SB_.SCK0.CP0C, DeviceObj) External (_SB_.SCK0.CP0D, DeviceObj) External (_SB_.SCK0.CP0E, DeviceObj) External (_SB_.SCK0.CP0F, DeviceObj) External (_SB_.SCK0.CP10, DeviceObj) External (_SB_.SCK0.CP11, DeviceObj) External (_SB_.SCK0.CP12, DeviceObj) External (_SB_.SCK0.CP13, DeviceObj) External (_SB_.SCK0.CP14, DeviceObj) External (_SB_.SCK0.CP15, DeviceObj) External (_SB_.SCK0.CP16, DeviceObj) External (_SB_.SCK0.CP17, DeviceObj) External (_SB_.SCK0.CP18, DeviceObj) External (_SB_.SCK0.CP19, DeviceObj) External (_SB_.SCK0.CP1A, DeviceObj) External (_SB_.SCK0.CP1B, DeviceObj) External (_SB_.SCK0.CP1C, DeviceObj) External (_SB_.SCK0.CP1D, DeviceObj) External (_SB_.SCK0.CP1E, DeviceObj) External (_SB_.SCK0.CP1F, DeviceObj) External (_SB_.SCK0.CP20, DeviceObj) External (_SB_.SCK0.CP21, DeviceObj) External (_SB_.SCK0.CP22, DeviceObj) External (_SB_.SCK0.CP23, DeviceObj) External (_SB_.SCK0.CP24, DeviceObj) External (_SB_.SCK0.CP25, DeviceObj) External (_SB_.SCK0.CP26, DeviceObj) External (_SB_.SCK0.CP27, DeviceObj) External (_SB_.SCK0.CP28, DeviceObj) External (_SB_.SCK0.CP29, DeviceObj) External (_SB_.SCK0.CP2A, DeviceObj) External (_SB_.SCK0.CP2B, DeviceObj) External (_SB_.SCK0.CP2C, DeviceObj) External (_SB_.SCK0.CP2D, DeviceObj) External (_SB_.SCK0.CP2E, DeviceObj) External (_SB_.SCK0.CP2F, DeviceObj) External (_SB_.SCK1.CP00, DeviceObj) External (_SB_.SCK1.CP01, DeviceObj) External (_SB_.SCK1.CP02, DeviceObj) External (_SB_.SCK1.CP03, DeviceObj) External (_SB_.SCK1.CP04, DeviceObj) External (_SB_.SCK1.CP05, DeviceObj) External (_SB_.SCK1.CP06, DeviceObj) External (_SB_.SCK1.CP07, DeviceObj) External (_SB_.SCK1.CP08, DeviceObj) External (_SB_.SCK1.CP09, DeviceObj) External (_SB_.SCK1.CP0A, DeviceObj) External (_SB_.SCK1.CP0B, DeviceObj) External (_SB_.SCK1.CP0C, DeviceObj) External (_SB_.SCK1.CP0D, DeviceObj) External (_SB_.SCK1.CP0E, DeviceObj) External (_SB_.SCK1.CP0F, DeviceObj) External (_SB_.SCK1.CP10, DeviceObj) External (_SB_.SCK1.CP11, DeviceObj) External (_SB_.SCK1.CP12, DeviceObj) External (_SB_.SCK1.CP13, DeviceObj) External (_SB_.SCK1.CP14, DeviceObj) External (_SB_.SCK1.CP15, DeviceObj) External (_SB_.SCK1.CP16, DeviceObj) External (_SB_.SCK1.CP17, DeviceObj) External (_SB_.SCK1.CP18, DeviceObj) External (_SB_.SCK1.CP19, DeviceObj) External (_SB_.SCK1.CP1A, DeviceObj) External (_SB_.SCK1.CP1B, DeviceObj) External (_SB_.SCK1.CP1C, DeviceObj) External (_SB_.SCK1.CP1D, DeviceObj) External (_SB_.SCK1.CP1E, DeviceObj) External (_SB_.SCK1.CP1F, DeviceObj) External (_SB_.SCK1.CP20, DeviceObj) External (_SB_.SCK1.CP21, DeviceObj) External (_SB_.SCK1.CP22, DeviceObj) External (_SB_.SCK1.CP23, DeviceObj) External (_SB_.SCK1.CP24, DeviceObj) External (_SB_.SCK1.CP25, DeviceObj) External (_SB_.SCK1.CP26, DeviceObj) External (_SB_.SCK1.CP27, DeviceObj) External (_SB_.SCK1.CP28, DeviceObj) External (_SB_.SCK1.CP29, DeviceObj) External (_SB_.SCK1.CP2A, DeviceObj) External (_SB_.SCK1.CP2B, DeviceObj) External (_SB_.SCK1.CP2C, DeviceObj) External (_SB_.SCK1.CP2D, DeviceObj) External (_SB_.SCK1.CP2E, DeviceObj) External (_SB_.SCK1.CP2F, DeviceObj) External (_SB_.SCK2.CP00, DeviceObj) External (_SB_.SCK2.CP01, DeviceObj) External (_SB_.SCK2.CP02, DeviceObj) External (_SB_.SCK2.CP03, DeviceObj) External (_SB_.SCK2.CP04, DeviceObj) External (_SB_.SCK2.CP05, DeviceObj) External (_SB_.SCK2.CP06, DeviceObj) External (_SB_.SCK2.CP07, DeviceObj) External (_SB_.SCK2.CP08, DeviceObj) External (_SB_.SCK2.CP09, DeviceObj) External (_SB_.SCK2.CP0A, DeviceObj) External (_SB_.SCK2.CP0B, DeviceObj) External (_SB_.SCK2.CP0C, DeviceObj) External (_SB_.SCK2.CP0D, DeviceObj) External (_SB_.SCK2.CP0E, DeviceObj) External (_SB_.SCK2.CP0F, DeviceObj) External (_SB_.SCK2.CP10, DeviceObj) External (_SB_.SCK2.CP11, DeviceObj) External (_SB_.SCK2.CP12, DeviceObj) External (_SB_.SCK2.CP13, DeviceObj) External (_SB_.SCK2.CP14, DeviceObj) External (_SB_.SCK2.CP15, DeviceObj) External (_SB_.SCK2.CP16, DeviceObj) External (_SB_.SCK2.CP17, DeviceObj) External (_SB_.SCK2.CP18, DeviceObj) External (_SB_.SCK2.CP19, DeviceObj) External (_SB_.SCK2.CP1A, DeviceObj) External (_SB_.SCK2.CP1B, DeviceObj) External (_SB_.SCK2.CP1C, DeviceObj) External (_SB_.SCK2.CP1D, DeviceObj) External (_SB_.SCK2.CP1E, DeviceObj) External (_SB_.SCK2.CP1F, DeviceObj) External (_SB_.SCK2.CP20, DeviceObj) External (_SB_.SCK2.CP21, DeviceObj) External (_SB_.SCK2.CP22, DeviceObj) External (_SB_.SCK2.CP23, DeviceObj) External (_SB_.SCK2.CP24, DeviceObj) External (_SB_.SCK2.CP25, DeviceObj) External (_SB_.SCK2.CP26, DeviceObj) External (_SB_.SCK2.CP27, DeviceObj) External (_SB_.SCK2.CP28, DeviceObj) External (_SB_.SCK2.CP29, DeviceObj) External (_SB_.SCK2.CP2A, DeviceObj) External (_SB_.SCK2.CP2B, DeviceObj) External (_SB_.SCK2.CP2C, DeviceObj) External (_SB_.SCK2.CP2D, DeviceObj) External (_SB_.SCK2.CP2E, DeviceObj) External (_SB_.SCK2.CP2F, DeviceObj) External (_SB_.SCK3.CP00, DeviceObj) External (_SB_.SCK3.CP01, DeviceObj) External (_SB_.SCK3.CP02, DeviceObj) External (_SB_.SCK3.CP03, DeviceObj) External (_SB_.SCK3.CP04, DeviceObj) External (_SB_.SCK3.CP05, DeviceObj) External (_SB_.SCK3.CP06, DeviceObj) External (_SB_.SCK3.CP07, DeviceObj) External (_SB_.SCK3.CP08, DeviceObj) External (_SB_.SCK3.CP09, DeviceObj) External (_SB_.SCK3.CP0A, DeviceObj) External (_SB_.SCK3.CP0B, DeviceObj) External (_SB_.SCK3.CP0C, DeviceObj) External (_SB_.SCK3.CP0D, DeviceObj) External (_SB_.SCK3.CP0E, DeviceObj) External (_SB_.SCK3.CP0F, DeviceObj) External (_SB_.SCK3.CP10, DeviceObj) External (_SB_.SCK3.CP11, DeviceObj) External (_SB_.SCK3.CP12, DeviceObj) External (_SB_.SCK3.CP13, DeviceObj) External (_SB_.SCK3.CP14, DeviceObj) External (_SB_.SCK3.CP15, DeviceObj) External (_SB_.SCK3.CP16, DeviceObj) External (_SB_.SCK3.CP17, DeviceObj) External (_SB_.SCK3.CP18, DeviceObj) External (_SB_.SCK3.CP19, DeviceObj) External (_SB_.SCK3.CP1A, DeviceObj) External (_SB_.SCK3.CP1B, DeviceObj) External (_SB_.SCK3.CP1C, DeviceObj) External (_SB_.SCK3.CP1D, DeviceObj) External (_SB_.SCK3.CP1E, DeviceObj) External (_SB_.SCK3.CP1F, DeviceObj) External (_SB_.SCK3.CP20, DeviceObj) External (_SB_.SCK3.CP21, DeviceObj) External (_SB_.SCK3.CP22, DeviceObj) External (_SB_.SCK3.CP23, DeviceObj) External (_SB_.SCK3.CP24, DeviceObj) External (_SB_.SCK3.CP25, DeviceObj) External (_SB_.SCK3.CP26, DeviceObj) External (_SB_.SCK3.CP27, DeviceObj) External (_SB_.SCK3.CP28, DeviceObj) External (_SB_.SCK3.CP29, DeviceObj) External (_SB_.SCK3.CP2A, DeviceObj) External (_SB_.SCK3.CP2B, DeviceObj) External (_SB_.SCK3.CP2C, DeviceObj) External (_SB_.SCK3.CP2D, DeviceObj) External (_SB_.SCK3.CP2E, DeviceObj) External (_SB_.SCK3.CP2F, DeviceObj) External (ACEN, UnknownObj) External (HWEN, UnknownObj) External (MWOS, UnknownObj) External (PSEN, IntObj) External (SCK0.CP00, DeviceObj) External (SCK0.CP01, DeviceObj) External (SCK0.CP02, DeviceObj) External (SCK0.CP03, DeviceObj) External (SCK0.CP04, DeviceObj) External (SCK0.CP05, DeviceObj) External (SCK0.CP06, DeviceObj) External (SCK0.CP07, DeviceObj) External (SCK0.CP08, DeviceObj) External (SCK0.CP09, DeviceObj) External (SCK0.CP0A, DeviceObj) External (SCK0.CP0B, DeviceObj) External (SCK0.CP0C, DeviceObj) External (SCK0.CP0D, DeviceObj) External (SCK0.CP0E, DeviceObj) External (SCK0.CP0F, DeviceObj) External (SCK0.CP10, DeviceObj) External (SCK0.CP11, DeviceObj) External (SCK0.CP12, DeviceObj) External (SCK0.CP13, DeviceObj) External (SCK0.CP14, DeviceObj) External (SCK0.CP15, DeviceObj) External (SCK0.CP16, DeviceObj) External (SCK0.CP17, DeviceObj) External (SCK0.CP18, DeviceObj) External (SCK0.CP19, DeviceObj) External (SCK0.CP1A, DeviceObj) External (SCK0.CP1B, DeviceObj) External (SCK0.CP1C, DeviceObj) External (SCK0.CP1D, DeviceObj) External (SCK0.CP1E, DeviceObj) External (SCK0.CP1F, DeviceObj) External (SCK0.CP20, DeviceObj) External (SCK0.CP21, DeviceObj) External (SCK0.CP22, DeviceObj) External (SCK0.CP23, DeviceObj) External (SCK0.CP24, DeviceObj) External (SCK0.CP25, DeviceObj) External (SCK0.CP26, DeviceObj) External (SCK0.CP27, DeviceObj) External (SCK0.CP28, DeviceObj) External (SCK0.CP29, DeviceObj) External (SCK0.CP2A, DeviceObj) External (SCK0.CP2B, DeviceObj) External (SCK0.CP2C, DeviceObj) External (SCK0.CP2D, DeviceObj) External (SCK0.CP2E, DeviceObj) External (SCK0.CP2F, DeviceObj) External (SCK1.CP00, DeviceObj) External (SCK1.CP01, DeviceObj) External (SCK1.CP02, DeviceObj) External (SCK1.CP03, DeviceObj) External (SCK1.CP04, DeviceObj) External (SCK1.CP05, DeviceObj) External (SCK1.CP06, DeviceObj) External (SCK1.CP07, DeviceObj) External (SCK1.CP08, DeviceObj) External (SCK1.CP09, DeviceObj) External (SCK1.CP0A, DeviceObj) External (SCK1.CP0B, DeviceObj) External (SCK1.CP0C, DeviceObj) External (SCK1.CP0D, DeviceObj) External (SCK1.CP0E, DeviceObj) External (SCK1.CP0F, DeviceObj) External (SCK1.CP10, DeviceObj) External (SCK1.CP11, DeviceObj) External (SCK1.CP12, DeviceObj) External (SCK1.CP13, DeviceObj) External (SCK1.CP14, DeviceObj) External (SCK1.CP15, DeviceObj) External (SCK1.CP16, DeviceObj) External (SCK1.CP17, DeviceObj) External (SCK1.CP18, DeviceObj) External (SCK1.CP19, DeviceObj) External (SCK1.CP1A, DeviceObj) External (SCK1.CP1B, DeviceObj) External (SCK1.CP1C, DeviceObj) External (SCK1.CP1D, DeviceObj) External (SCK1.CP1E, DeviceObj) External (SCK1.CP1F, DeviceObj) External (SCK1.CP20, DeviceObj) External (SCK1.CP21, DeviceObj) External (SCK1.CP22, DeviceObj) External (SCK1.CP23, DeviceObj) External (SCK1.CP24, DeviceObj) External (SCK1.CP25, DeviceObj) External (SCK1.CP26, DeviceObj) External (SCK1.CP27, DeviceObj) External (SCK1.CP28, DeviceObj) External (SCK1.CP29, DeviceObj) External (SCK1.CP2A, DeviceObj) External (SCK1.CP2B, DeviceObj) External (SCK1.CP2C, DeviceObj) External (SCK1.CP2D, DeviceObj) External (SCK1.CP2E, DeviceObj) External (SCK1.CP2F, DeviceObj) External (SCK2.CP00, DeviceObj) External (SCK2.CP01, DeviceObj) External (SCK2.CP02, DeviceObj) External (SCK2.CP03, DeviceObj) External (SCK2.CP04, DeviceObj) External (SCK2.CP05, DeviceObj) External (SCK2.CP06, DeviceObj) External (SCK2.CP07, DeviceObj) External (SCK2.CP08, DeviceObj) External (SCK2.CP09, DeviceObj) External (SCK2.CP0A, DeviceObj) External (SCK2.CP0B, DeviceObj) External (SCK2.CP0C, DeviceObj) External (SCK2.CP0D, DeviceObj) External (SCK2.CP0E, DeviceObj) External (SCK2.CP0F, DeviceObj) External (SCK2.CP10, DeviceObj) External (SCK2.CP11, DeviceObj) External (SCK2.CP12, DeviceObj) External (SCK2.CP13, DeviceObj) External (SCK2.CP14, DeviceObj) External (SCK2.CP15, DeviceObj) External (SCK2.CP16, DeviceObj) External (SCK2.CP17, DeviceObj) External (SCK2.CP18, DeviceObj) External (SCK2.CP19, DeviceObj) External (SCK2.CP1A, DeviceObj) External (SCK2.CP1B, DeviceObj) External (SCK2.CP1C, DeviceObj) External (SCK2.CP1D, DeviceObj) External (SCK2.CP1E, DeviceObj) External (SCK2.CP1F, DeviceObj) External (SCK2.CP20, DeviceObj) External (SCK2.CP21, DeviceObj) External (SCK2.CP22, DeviceObj) External (SCK2.CP23, DeviceObj) External (SCK2.CP24, DeviceObj) External (SCK2.CP25, DeviceObj) External (SCK2.CP26, DeviceObj) External (SCK2.CP27, DeviceObj) External (SCK2.CP28, DeviceObj) External (SCK2.CP29, DeviceObj) External (SCK2.CP2A, DeviceObj) External (SCK2.CP2B, DeviceObj) External (SCK2.CP2C, DeviceObj) External (SCK2.CP2D, DeviceObj) External (SCK2.CP2E, DeviceObj) External (SCK2.CP2F, DeviceObj) External (SCK3.CP00, DeviceObj) External (SCK3.CP01, DeviceObj) External (SCK3.CP02, DeviceObj) External (SCK3.CP03, DeviceObj) External (SCK3.CP04, DeviceObj) External (SCK3.CP05, DeviceObj) External (SCK3.CP06, DeviceObj) External (SCK3.CP07, DeviceObj) External (SCK3.CP08, DeviceObj) External (SCK3.CP09, DeviceObj) External (SCK3.CP0A, DeviceObj) External (SCK3.CP0B, DeviceObj) External (SCK3.CP0C, DeviceObj) External (SCK3.CP0D, DeviceObj) External (SCK3.CP0E, DeviceObj) External (SCK3.CP0F, DeviceObj) External (SCK3.CP10, DeviceObj) External (SCK3.CP11, DeviceObj) External (SCK3.CP12, DeviceObj) External (SCK3.CP13, DeviceObj) External (SCK3.CP14, DeviceObj) External (SCK3.CP15, DeviceObj) External (SCK3.CP16, DeviceObj) External (SCK3.CP17, DeviceObj) External (SCK3.CP18, DeviceObj) External (SCK3.CP19, DeviceObj) External (SCK3.CP1A, DeviceObj) External (SCK3.CP1B, DeviceObj) External (SCK3.CP1C, DeviceObj) External (SCK3.CP1D, DeviceObj) External (SCK3.CP1E, DeviceObj) External (SCK3.CP1F, DeviceObj) External (SCK3.CP20, DeviceObj) External (SCK3.CP21, DeviceObj) External (SCK3.CP22, DeviceObj) External (SCK3.CP23, DeviceObj) External (SCK3.CP24, DeviceObj) External (SCK3.CP25, DeviceObj) External (SCK3.CP26, DeviceObj) External (SCK3.CP27, DeviceObj) External (SCK3.CP28, DeviceObj) External (SCK3.CP29, DeviceObj) External (SCK3.CP2A, DeviceObj) External (SCK3.CP2B, DeviceObj) External (SCK3.CP2C, DeviceObj) External (SCK3.CP2D, DeviceObj) External (SCK3.CP2E, DeviceObj) External (SCK3.CP2F, DeviceObj) External (TSEN, UnknownObj) Scope (\_SB) { Name (HWOB, 0x00) Name (TYPE, 0xFFFFFFFF) Name (HWAL, 0x00) Name (ZPSS, Package (0x01) { Package (0x06) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Name (PSS0, Package (0x10) { Package (0x06) { 0x0CE5, 0x000222E0, 0x000A, 0x000A, 0xFF00, 0xFF00 }, Package (0x06) { 0x0CE4, 0x000222E0, 0x000A, 0x000A, 0x2100, 0x2100 }, Package (0x06) { 0x0C1C, 0x0001F116, 0x000A, 0x000A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0x0001DB8B, 0x000A, 0x000A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0AF0, 0x0001B1A3, 0x000A, 0x000A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x00019D44, 0x000A, 0x000A, 0x1B00, 0x1B00 }, Package (0x06) { 0x09C4, 0x000175B5, 0x000A, 0x000A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x00016280, 0x000A, 0x000A, 0x1800, 0x1800 }, Package (0x06) { 0x0898, 0x00013D39, 0x000A, 0x000A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x00012B24, 0x000A, 0x000A, 0x1500, 0x1500 }, Package (0x06) { 0x076C, 0x00010817, 0x000A, 0x000A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x0000F71D, 0x000A, 0x000A, 0x1200, 0x1200 }, Package (0x06) { 0x0640, 0x0000D63B, 0x000A, 0x000A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x0000C653, 0x000A, 0x000A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0514, 0x0000A78E, 0x000A, 0x000A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x000098B1, 0x000A, 0x000A, 0x0C00, 0x0C00 } }) Name (PSS1, Package (0x10) { Package (0x06) { 0x0CE5, 0x000222E0, 0x000A, 0x000A, 0xFF00, 0xFF00 }, Package (0x06) { 0x0CE4, 0x000222E0, 0x000A, 0x000A, 0x2100, 0x2100 }, Package (0x06) { 0x0C1C, 0x0001F116, 0x000A, 0x000A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0x0001DB8B, 0x000A, 0x000A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0AF0, 0x0001B1A3, 0x000A, 0x000A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x00019D44, 0x000A, 0x000A, 0x1B00, 0x1B00 }, Package (0x06) { 0x09C4, 0x000175B5, 0x000A, 0x000A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x00016280, 0x000A, 0x000A, 0x1800, 0x1800 }, Package (0x06) { 0x0898, 0x00013D39, 0x000A, 0x000A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x00012B24, 0x000A, 0x000A, 0x1500, 0x1500 }, Package (0x06) { 0x076C, 0x00010817, 0x000A, 0x000A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x0000F71D, 0x000A, 0x000A, 0x1200, 0x1200 }, Package (0x06) { 0x0640, 0x0000D63B, 0x000A, 0x000A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x0000C653, 0x000A, 0x000A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0514, 0x0000A78E, 0x000A, 0x000A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x000098B1, 0x000A, 0x000A, 0x0C00, 0x0C00 } }) Name (PSS2, Package (0x10) { Package (0x06) { 0x0CE5, 0x000222E0, 0x000A, 0x000A, 0xFF00, 0xFF00 }, Package (0x06) { 0x0CE4, 0x000222E0, 0x000A, 0x000A, 0x2100, 0x2100 }, Package (0x06) { 0x0C1C, 0x0001F116, 0x000A, 0x000A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0x0001DB8B, 0x000A, 0x000A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0AF0, 0x0001B1A3, 0x000A, 0x000A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x00019D44, 0x000A, 0x000A, 0x1B00, 0x1B00 }, Package (0x06) { 0x09C4, 0x000175B5, 0x000A, 0x000A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x00016280, 0x000A, 0x000A, 0x1800, 0x1800 }, Package (0x06) { 0x0898, 0x00013D39, 0x000A, 0x000A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x00012B24, 0x000A, 0x000A, 0x1500, 0x1500 }, Package (0x06) { 0x076C, 0x00010817, 0x000A, 0x000A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x0000F71D, 0x000A, 0x000A, 0x1200, 0x1200 }, Package (0x06) { 0x0640, 0x0000D63B, 0x000A, 0x000A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x0000C653, 0x000A, 0x000A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0514, 0x0000A78E, 0x000A, 0x000A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x000098B1, 0x000A, 0x000A, 0x0C00, 0x0C00 } }) Name (PSS3, Package (0x10) { Package (0x06) { 0x0CE5, 0x000222E0, 0x000A, 0x000A, 0xFF00, 0xFF00 }, Package (0x06) { 0x0CE4, 0x000222E0, 0x000A, 0x000A, 0x2100, 0x2100 }, Package (0x06) { 0x0C1C, 0x0001F116, 0x000A, 0x000A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0x0001DB8B, 0x000A, 0x000A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0AF0, 0x0001B1A3, 0x000A, 0x000A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x00019D44, 0x000A, 0x000A, 0x1B00, 0x1B00 }, Package (0x06) { 0x09C4, 0x000175B5, 0x000A, 0x000A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x00016280, 0x000A, 0x000A, 0x1800, 0x1800 }, Package (0x06) { 0x0898, 0x00013D39, 0x000A, 0x000A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x00012B24, 0x000A, 0x000A, 0x1500, 0x1500 }, Package (0x06) { 0x076C, 0x00010817, 0x000A, 0x000A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x0000F71D, 0x000A, 0x000A, 0x1200, 0x1200 }, Package (0x06) { 0x0640, 0x0000D63B, 0x000A, 0x000A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x0000C653, 0x000A, 0x000A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0514, 0x0000A78E, 0x000A, 0x000A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x000098B1, 0x000A, 0x000A, 0x0C00, 0x0C00 } }) Name (CMST, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, 0x01, 0x01, 0x03F8 } }) Name (CIST, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (CST, 0, NotSerialized) { If ((MWOS && (TYPE & 0x0200))) { Return (CMST) /* \_SB_.CMST */ } Return (CIST) /* \_SB_.CIST */ } Name (TSSA, Package (0x01) { Package (0x05) { 0x64, 0x0000979F, 0x00, 0x00, 0x00 } }) Name (TSS0, Package (0x0F) { Package (0x05) { 0x64, 0x0000979F, 0x00, 0x00, 0x00 }, Package (0x05) { 0x5E, 0x00008E27, 0x00, 0x1F, 0x00 }, Package (0x05) { 0x58, 0x000084B0, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x52, 0x00007B38, 0x00, 0x1D, 0x00 }, Package (0x05) { 0x4B, 0x000071C1, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x45, 0x00006849, 0x00, 0x1B, 0x00 }, Package (0x05) { 0x3F, 0x00005ED2, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x39, 0x0000555A, 0x00, 0x19, 0x00 }, Package (0x05) { 0x32, 0x00004BE3, 0x00, 0x18, 0x00 }, Package (0x05) { 0x2C, 0x0000426B, 0x00, 0x17, 0x00 }, Package (0x05) { 0x26, 0x000038F4, 0x00, 0x16, 0x00 }, Package (0x05) { 0x20, 0x00002F7C, 0x00, 0x15, 0x00 }, Package (0x05) { 0x19, 0x00002605, 0x00, 0x14, 0x00 }, Package (0x05) { 0x13, 0x00001C8D, 0x00, 0x13, 0x00 }, Package (0x05) { 0x0D, 0x00001316, 0x00, 0x12, 0x00 } }) Name (TSS1, Package (0x0F) { Package (0x05) { 0x64, 0x0000979F, 0x00, 0x00, 0x00 }, Package (0x05) { 0x5E, 0x00008E27, 0x00, 0x1F, 0x00 }, Package (0x05) { 0x58, 0x000084B0, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x52, 0x00007B38, 0x00, 0x1D, 0x00 }, Package (0x05) { 0x4B, 0x000071C1, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x45, 0x00006849, 0x00, 0x1B, 0x00 }, Package (0x05) { 0x3F, 0x00005ED2, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x39, 0x0000555A, 0x00, 0x19, 0x00 }, Package (0x05) { 0x32, 0x00004BE3, 0x00, 0x18, 0x00 }, Package (0x05) { 0x2C, 0x0000426B, 0x00, 0x17, 0x00 }, Package (0x05) { 0x26, 0x000038F4, 0x00, 0x16, 0x00 }, Package (0x05) { 0x20, 0x00002F7C, 0x00, 0x15, 0x00 }, Package (0x05) { 0x19, 0x00002605, 0x00, 0x14, 0x00 }, Package (0x05) { 0x13, 0x00001C8D, 0x00, 0x13, 0x00 }, Package (0x05) { 0x0D, 0x00001316, 0x00, 0x12, 0x00 } }) Name (TSS2, Package (0x0F) { Package (0x05) { 0x64, 0x0000979F, 0x00, 0x00, 0x00 }, Package (0x05) { 0x5E, 0x00008E27, 0x00, 0x1F, 0x00 }, Package (0x05) { 0x58, 0x000084B0, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x52, 0x00007B38, 0x00, 0x1D, 0x00 }, Package (0x05) { 0x4B, 0x000071C1, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x45, 0x00006849, 0x00, 0x1B, 0x00 }, Package (0x05) { 0x3F, 0x00005ED2, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x39, 0x0000555A, 0x00, 0x19, 0x00 }, Package (0x05) { 0x32, 0x00004BE3, 0x00, 0x18, 0x00 }, Package (0x05) { 0x2C, 0x0000426B, 0x00, 0x17, 0x00 }, Package (0x05) { 0x26, 0x000038F4, 0x00, 0x16, 0x00 }, Package (0x05) { 0x20, 0x00002F7C, 0x00, 0x15, 0x00 }, Package (0x05) { 0x19, 0x00002605, 0x00, 0x14, 0x00 }, Package (0x05) { 0x13, 0x00001C8D, 0x00, 0x13, 0x00 }, Package (0x05) { 0x0D, 0x00001316, 0x00, 0x12, 0x00 } }) Name (TSS3, Package (0x0F) { Package (0x05) { 0x64, 0x0000979F, 0x00, 0x00, 0x00 }, Package (0x05) { 0x5E, 0x00008E27, 0x00, 0x1F, 0x00 }, Package (0x05) { 0x58, 0x000084B0, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x52, 0x00007B38, 0x00, 0x1D, 0x00 }, Package (0x05) { 0x4B, 0x000071C1, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x45, 0x00006849, 0x00, 0x1B, 0x00 }, Package (0x05) { 0x3F, 0x00005ED2, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x39, 0x0000555A, 0x00, 0x19, 0x00 }, Package (0x05) { 0x32, 0x00004BE3, 0x00, 0x18, 0x00 }, Package (0x05) { 0x2C, 0x0000426B, 0x00, 0x17, 0x00 }, Package (0x05) { 0x26, 0x000038F4, 0x00, 0x16, 0x00 }, Package (0x05) { 0x20, 0x00002F7C, 0x00, 0x15, 0x00 }, Package (0x05) { 0x19, 0x00002605, 0x00, 0x14, 0x00 }, Package (0x05) { 0x13, 0x00001C8D, 0x00, 0x13, 0x00 }, Package (0x05) { 0x0D, 0x00001316, 0x00, 0x12, 0x00 } }) Method (PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, CAPA) CreateDWordField (Arg0, 0x00, REVS) CreateDWordField (Arg0, 0x04, SIZE) Local0 = SizeOf (Arg0) Local1 = (Local0 - 0x08) CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 // .... }) Concatenate (STS0, TEMP, Local2) OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2) } Method (OSC, 4, NotSerialized) { CreateDWordField (Arg3, 0x04, CAPA) TYPE = CAPA /* \_SB_.OSC_.CAPA */ CreateDWordField (Arg3, 0x00, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, 0x00, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) CreateDWordField (UID0, 0x00, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (!(((IID0 == EID0) && (IID1 == EID1)) && (( IID2 == EID2) && (IID3 == EID3)))) { STS0 [0x00] = 0x06 Return (Arg3) } If ((Arg1 != 0x01)) { STS0 [0x00] = 0x0A Return (Arg3) } If ((STS0 & 0x01)) { CAP0 &= 0x0BFF Return (Arg3) } HWOB = 0x00 If ((HWEN == 0x02)) { HWOB = 0x01 } CAP0 &= 0x0BFF TYPE = CAP0 /* \_SB_.OSC_.CAP0 */ Return (Arg3) } Scope (SCK0.CP00) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP00.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP00.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP00.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP00.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP01) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x01, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x01, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x01, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP01.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP01.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP01.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP01.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP02) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x02, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x02, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x02, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP02.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP02.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP02.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP02.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP03) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x03, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x03, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x03, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP03.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP03.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP03.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP03.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP04) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x04, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x04, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x04, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP04.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP04.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP04.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP04.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP05) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x05, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x05, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x05, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP05.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP05.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP05.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP05.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP06) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x06, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x06, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x06, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP06.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP06.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP06.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP06.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP07) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x07, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x07, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x07, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP07.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP07.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP07.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP07.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP08) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x08, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x08, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x08, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP08.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP08.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP08.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP08.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP09) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x09, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x09, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x09, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP09.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP09.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP09.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP09.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0A) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0A.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0B) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0B.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0C) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0C.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0D) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0D.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0E) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0E.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP0F) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x0F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP0F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP0F.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP0F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP0F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP10) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x10, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x10, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x10, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP10.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP10.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP10.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP10.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP11) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x11, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x11, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x11, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP11.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP11.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP11.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP11.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP12) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x12, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x12, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x12, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP12.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP12.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP12.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP12.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP13) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x13, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x13, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x13, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP13.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP13.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP13.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP13.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP14) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x14, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x14, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x14, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP14.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP14.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP14.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP14.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP15) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x15, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x15, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x15, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP15.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP15.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP15.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP15.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP16) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x16, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x16, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x16, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP16.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP16.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP16.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP16.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP17) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x17, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x17, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x17, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP17.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP17.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP17.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP17.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP18) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x18, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x18, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x18, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP18.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP18.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP18.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP18.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP19) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x19, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x19, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x19, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP19.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP19.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP19.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP19.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1A) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1A.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1B) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1B.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1C) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1C.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1D) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1D.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1E) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1E.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP1F) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x1F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP1F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP1F.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP1F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP1F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP20) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x20, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x20, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x20, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP20.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP20.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP20.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP20.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP21) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x21, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x21, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x21, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP21.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP21.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP21.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP21.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP22) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x22, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x22, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x22, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP22.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP22.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP22.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP22.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP23) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x23, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x23, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x23, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP23.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP23.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP23.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP23.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP24) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x24, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x24, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x24, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP24.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP24.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP24.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP24.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP25) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x25, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x25, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x25, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP25.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP25.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP25.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP25.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP26) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x26, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x26, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x26, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP26.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP26.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP26.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP26.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP27) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x27, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x27, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x27, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP27.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP27.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP27.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP27.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP28) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x28, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x28, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x28, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP28.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP28.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP28.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP28.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP29) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x29, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x29, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x29, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP29.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP29.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP29.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP29.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2A) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2A.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2B) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2B.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2C) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2C.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2D) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2D.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2E) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2E.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK0.CP2F) { Name (SCKN, 0x00) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x2F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK0.CP2F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK0.CP2F.PSDD */ } Return (PSDC) /* \_SB_.SCK0.CP2F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS0) /* \_SB_.PSS0 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK0.CP2F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS0) /* \_SB_.TSS0 */ } } Scope (SCK1.CP00) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x30, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x30, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x30, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP00.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP00.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP00.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP00.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP01) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x31, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x31, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x31, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP01.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP01.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP01.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP01.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP02) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x32, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x32, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x32, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP02.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP02.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP02.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP02.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP03) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x33, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x33, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x33, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP03.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP03.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP03.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP03.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP04) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x34, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x34, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x34, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP04.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP04.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP04.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP04.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP05) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x35, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x35, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x35, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP05.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP05.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP05.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP05.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP06) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x36, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x36, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x36, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP06.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP06.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP06.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP06.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP07) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x37, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x37, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x37, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP07.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP07.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP07.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP07.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP08) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x38, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x38, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x38, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP08.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP08.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP08.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP08.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP09) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x39, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x39, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x39, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP09.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP09.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP09.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP09.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0A) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0A.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0B) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0B.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0C) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0C.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0D) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0D.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0E) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0E.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP0F) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x3F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP0F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP0F.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP0F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP0F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP10) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x40, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x40, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x40, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP10.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP10.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP10.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP10.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP11) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x41, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x41, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x41, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP11.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP11.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP11.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP11.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP12) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x42, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x42, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x42, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP12.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP12.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP12.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP12.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP13) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x43, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x43, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x43, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP13.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP13.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP13.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP13.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP14) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x44, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x44, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x44, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP14.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP14.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP14.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP14.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP15) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x45, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x45, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x45, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP15.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP15.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP15.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP15.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP16) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x46, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x46, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x46, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP16.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP16.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP16.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP16.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP17) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x47, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x47, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x47, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP17.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP17.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP17.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP17.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP18) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x48, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x48, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x48, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP18.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP18.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP18.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP18.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP19) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x49, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x49, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x49, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP19.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP19.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP19.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP19.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1A) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1A.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1B) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1B.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1C) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1C.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1D) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1D.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1E) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1E.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP1F) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x4F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP1F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP1F.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP1F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP1F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP20) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x50, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x50, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x50, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP20.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP20.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP20.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP20.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP21) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x51, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x51, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x51, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP21.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP21.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP21.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP21.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP22) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x52, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x52, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x52, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP22.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP22.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP22.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP22.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP23) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x53, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x53, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x53, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP23.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP23.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP23.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP23.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP24) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x54, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x54, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x54, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP24.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP24.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP24.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP24.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP25) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x55, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x55, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x55, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP25.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP25.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP25.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP25.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP26) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x56, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x56, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x56, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP26.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP26.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP26.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP26.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP27) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x57, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x57, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x57, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP27.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP27.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP27.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP27.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP28) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x58, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x58, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x58, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP28.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP28.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP28.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP28.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP29) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x59, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x59, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x59, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP29.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP29.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP29.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP29.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2A) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2A.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2B) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2B.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2C) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2C.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2D) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2D.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2E) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2E.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK1.CP2F) { Name (SCKN, 0x01) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x5F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK1.CP2F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK1.CP2F.PSDD */ } Return (PSDC) /* \_SB_.SCK1.CP2F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS1) /* \_SB_.PSS1 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK1.CP2F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS1) /* \_SB_.TSS1 */ } } Scope (SCK2.CP00) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x60, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x60, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x60, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP00.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP00.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP00.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP00.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP01) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x61, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x61, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x61, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP01.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP01.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP01.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP01.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP02) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x62, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x62, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x62, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP02.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP02.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP02.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP02.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP03) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x63, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x63, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x63, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP03.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP03.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP03.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP03.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP04) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x64, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x64, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x64, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP04.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP04.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP04.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP04.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP05) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x65, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x65, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x65, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP05.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP05.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP05.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP05.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP06) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x66, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x66, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x66, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP06.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP06.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP06.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP06.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP07) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x67, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x67, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x67, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP07.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP07.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP07.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP07.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP08) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x68, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x68, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x68, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP08.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP08.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP08.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP08.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP09) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x69, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x69, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x69, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP09.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP09.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP09.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP09.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0A) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0A.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0B) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0B.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0C) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0C.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0D) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0D.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0E) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0E.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP0F) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x6F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP0F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP0F.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP0F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP0F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP10) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x70, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x70, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x70, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP10.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP10.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP10.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP10.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP11) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x71, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x71, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x71, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP11.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP11.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP11.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP11.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP12) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x72, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x72, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x72, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP12.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP12.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP12.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP12.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP13) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x73, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x73, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x73, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP13.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP13.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP13.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP13.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP14) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x74, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x74, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x74, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP14.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP14.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP14.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP14.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP15) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x75, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x75, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x75, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP15.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP15.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP15.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP15.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP16) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x76, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x76, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x76, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP16.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP16.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP16.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP16.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP17) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x77, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x77, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x77, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP17.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP17.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP17.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP17.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP18) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x78, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x78, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x78, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP18.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP18.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP18.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP18.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP19) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x79, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x79, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x79, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP19.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP19.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP19.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP19.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1A) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1A.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1B) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1B.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1C) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1C.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1D) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1D.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1E) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1E.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP1F) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x7F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP1F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP1F.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP1F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP1F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP20) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x80, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x80, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x80, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP20.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP20.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP20.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP20.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP21) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x81, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x81, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x81, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP21.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP21.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP21.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP21.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP22) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x82, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x82, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x82, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP22.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP22.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP22.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP22.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP23) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x83, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x83, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x83, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP23.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP23.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP23.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP23.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP24) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x84, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x84, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x84, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP24.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP24.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP24.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP24.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP25) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x85, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x85, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x85, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP25.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP25.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP25.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP25.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP26) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x86, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x86, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x86, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP26.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP26.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP26.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP26.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP27) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x87, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x87, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x87, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP27.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP27.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP27.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP27.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP28) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x88, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x88, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x88, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP28.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP28.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP28.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP28.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP29) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x89, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x89, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x89, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP29.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP29.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP29.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP29.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2A) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2A.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2B) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2B.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2C) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2C.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2D) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2D.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2E) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2E.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK2.CP2F) { Name (SCKN, 0x02) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x8F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK2.CP2F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK2.CP2F.PSDD */ } Return (PSDC) /* \_SB_.SCK2.CP2F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS2) /* \_SB_.PSS2 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK2.CP2F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS2) /* \_SB_.TSS2 */ } } Scope (SCK3.CP00) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x90, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x90, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x90, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP00.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP00.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP00.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP00.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP01) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x91, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x91, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x91, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP01.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP01.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP01.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP01.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP02) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x92, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x92, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x92, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP02.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP02.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP02.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP02.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP03) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x93, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x93, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x93, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP03.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP03.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP03.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP03.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP04) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x94, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x94, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x94, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP04.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP04.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP04.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP04.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP05) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x95, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x95, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x95, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP05.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP05.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP05.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP05.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP06) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x96, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x96, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x96, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP06.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP06.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP06.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP06.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP07) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x97, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x97, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x97, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP07.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP07.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP07.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP07.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP08) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x98, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x98, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x98, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP08.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP08.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP08.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP08.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP09) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x99, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x99, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x99, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP09.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP09.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP09.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP09.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0A) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9A, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9A, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9A, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0A.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0B) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9B, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9B, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9B, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0B.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0C) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9C, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9C, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9C, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0C.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0D) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9D, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9D, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9D, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0D.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0E) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9E, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9E, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9E, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0E.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP0F) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9F, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9F, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x9F, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP0F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP0F.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP0F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP0F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP10) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA0, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA0, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA0, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP10.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP10.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP10.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP10.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP11) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA1, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA1, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA1, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP11.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP11.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP11.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP11.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP12) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA2, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA2, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA2, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP12.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP12.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP12.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP12.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP13) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA3, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA3, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA3, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP13.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP13.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP13.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP13.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP14) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA4, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA4, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA4, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP14.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP14.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP14.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP14.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP15) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA5, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA5, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA5, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP15.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP15.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP15.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP15.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP16) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA6, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA6, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA6, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP16.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP16.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP16.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP16.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP17) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA7, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA7, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA7, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP17.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP17.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP17.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP17.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP18) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA8, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA8, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA8, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP18.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP18.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP18.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP18.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP19) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA9, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA9, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xA9, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP19.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP19.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP19.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP19.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1A) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAA, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAA, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAA, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1A.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1B) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAB, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAB, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAB, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1B.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1C) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAC, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAC, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAC, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1C.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1D) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAD, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAD, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAD, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1D.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1E) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAE, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAE, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAE, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1E.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP1F) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAF, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAF, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xAF, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP1F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP1F.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP1F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP1F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP20) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB0, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB0, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB0, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP20.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP20.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP20.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP20.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP21) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB1, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB1, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB1, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP21.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP21.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP21.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP21.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP22) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB2, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB2, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB2, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP22.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP22.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP22.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP22.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP23) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB3, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB3, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB3, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP23.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP23.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP23.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP23.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP24) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB4, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB4, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB4, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP24.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP24.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP24.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP24.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP25) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB5, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB5, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB5, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP25.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP25.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP25.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP25.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP26) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB6, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB6, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB6, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP26.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP26.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP26.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP26.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP27) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB7, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB7, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB7, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP27.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP27.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP27.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP27.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP28) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB8, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB8, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB8, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP28.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP28.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP28.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP28.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP29) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB9, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB9, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xB9, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP29.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP29.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP29.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP29.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2A) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBA, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBA, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBA, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2A.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2A.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2A.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2A.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2B) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBB, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBB, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBB, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2B.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2B.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2B.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2B.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2C) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBC, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBC, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBC, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2C.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2C.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2C.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2C.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2D) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBD, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBD, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBD, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2D.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2D.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2D.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2D.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2E) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBE, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBE, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBE, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2E.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2E.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2E.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2E.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } Scope (SCK3.CP2F) { Name (SCKN, 0x03) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { PDC (Arg0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Return (OSC (Arg0, Arg1, Arg2, Arg3)) } Name (PSDC, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBF, 0xFC, 0x01 } }) Name (PSDD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBF, 0xFD, 0x01 } }) Name (PSDE, Package (0x01) { Package (0x05) { 0x05, 0x00, 0xBF, 0xFE, 0x01 } }) Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities { Return (0x00) } Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If ((((TYPE & 0x0820) == 0x0820) && (HWAL == 0x00))) { Return (PSDE) /* \_SB_.SCK3.CP2F.PSDE */ } If ((((TYPE & 0x0820) == 0x20) && (HWAL == 0x02))) { Return (PSDD) /* \_SB_.SCK3.CP2F.PSDD */ } Return (PSDC) /* \_SB_.SCK3.CP2F.PSDC */ } Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States { If (PSEN) { If ((HWOB == 0x00)) { Return (PSS3) /* \_SB_.PSS3 */ } } Return (ZPSS) /* \_SB_.ZPSS */ } Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) Name (CST1, Package (0x02) { 0x01, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, 0x01, 0x01, 0x03F8 } }) Method (_CST, 0, NotSerialized) // _CST: C-States { If ((ACEN == 0x00)) { Return (CST ()) } Return (CST1) /* \_SB_.SCK3.CP2F.CST1 */ } Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities { Return (0x00) } Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States { If (((TSEN == 0x00) || (PSEN == 0x00))) { Return (TSSA) /* \_SB_.TSSA */ } Return (TSS3) /* \_SB_.TSS3 */ } } } } SSDT2 ----- DefinitionBlock ("", "SSDT", 1, "SataRe", "SataTabl", 0x00001000) { External (_SB_.PCI0.SAT1, DeviceObj) External (DSSP, UnknownObj) External (FHPP, UnknownObj) Scope (\) { Name (STFE, Buffer (0x07) { 0x10, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF // ....... }) Name (STFD, Buffer (0x07) { 0x90, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF // ....... }) Name (FZTF, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5 // ....... }) Name (DCFL, Buffer (0x07) { 0xC1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1 // ....... }) Name (SCBF, Buffer (0x15){}) Name (CMDC, Zero) Method (GTFB, 2, Serialized) { Local0 = (CMDC * 0x38) CreateField (SCBF, Local0, 0x38, CMDX) Local0 = (CMDC * 0x07) CreateByteField (SCBF, (Local0 + One), A001) CMDX = Arg0 A001 = Arg1 CMDC++ } } Scope (\_SB.PCI0.SAT1) { Name (REGF, One) Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x02)) { REGF = Arg1 } } Name (TMD0, Buffer (0x14){}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { PIO0 = 0x78 DMA0 = 0x14 PIO1 = 0x78 DMA1 = 0x14 CHNF |= 0x05 Return (TMD0) /* \_SB_.PCI0.SAT1.TMD0 */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { } Device (SPT0) { Name (_ADR, 0xFFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT1) { Name (_ADR, 0x0001FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT2) { Name (_ADR, 0x0002FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT3) { Name (_ADR, 0x0003FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT4) { Name (_ADR, 0x0004FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT5) { Name (_ADR, 0x0005FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } } } UEFI ---- [000h 0000 4] Signature : "UEFI" [UEFI Boot Optimization Table] [004h 0004 4] Table Length : 00000042 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : F7 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 01072009 [01Ch 0028 4] Asl Compiler ID : "" [020h 0032 4] Asl Compiler Revision : 00000000 [024h 0036 16] UUID Identifier : C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332 [034h 0052 2] Data Offset : 0036 Raw Table Data: Length 66 (0x42) 0000: 55 45 46 49 42 00 00 00 01 F7 41 4C 41 53 4B 41 // UEFIB.....ALASKA 0010: 41 20 4D 20 49 20 00 00 09 20 07 01 00 00 00 00 // A M I ... ...... 0020: 00 00 00 00 E2 D8 8E C6 C6 9D BD 4C 9D 94 DB 65 // ...........L...e 0030: AC C5 C3 32 36 00 01 00 00 00 00 00 00 00 00 00 // ...26........... 0040: 00 00 // .. WDDT ---- [000h 0000 4] Signature : "WDDT" [Watchdog Description Table] [004h 0004 4] Table Length : 00000040 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 85 [00Ah 0010 6] Oem ID : "ALASKA" [010h 0016 8] Oem Table ID : "A M I " [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20091013 [024h 0036 2] Specification Version : 0000 [026h 0038 2] Table Version : 0100 [028h 0040 2] PCI Vendor ID : 0100 [02Ah 0042 12] Timer Register : [Generic Address Structure] [02Ah 0042 1] Space ID : 01 [SystemIO] [02Bh 0043 1] Bit Width : FF [02Ch 0044 1] Bit Offset : 00 [02Dh 0045 1] Encoded Access Width : 00 [Undefined/Legacy] [02Eh 0046 8] Address : 0000000000000000 [036h 0054 2] Max Count : 003F [038h 0056 2] Min Count : 0004 [03Ah 0058 2] Period : 0258 [03Ch 0060 2] Status (decoded below) : 0001 Available : 1 Active : 0 OS Owns : 0 User Reset : 0 Timeout Reset : 0 Power Fail Reset : 0 Unknown Reset : 0 [03Eh 0062 2] Capability (decoded below) : 0000 Auto Reset : 0 Timeout Alert : 0 Raw Table Data: Length 64 (0x40) 0000: 57 44 44 54 40 00 00 00 01 85 41 4C 41 53 4B 41 // WDDT@.....ALASKA 0010: 41 20 4D 20 49 20 00 00 00 00 00 00 49 4E 54 4C // A M I ......INTL 0020: 13 10 09 20 00 00 00 01 00 01 01 FF 00 00 00 00 // ... ............ 0030: 00 00 00 00 00 00 3F 00 04 00 58 02 01 00 00 00 // ......?...X.....